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Preface
The SH7040 series (SH7040/41/42/43/44/45) CMOS single-chip microprocessors integrate a
Hitachi-original architecture, high-speed CPU with peripheral functions required for system
configuration.
The CPU has a RISC-type instruction set. Most instructions can be executed in one clock cycle,
which greatly improves instruction execution speed. In addition, the 32-bit internal-bus
architecture enhances data processing power. With this CPU, it has become possible to assemble
low cost, high performance/high-functioning systems, even for applications that were previously
impossible with microprocessors, such as real-time control, which demands high speeds. In
particular, the SH7040 series has a 1-kbyte on-chip cache, which allows an improvement in CPU
performance during external memory access.
In addition, the SH7040 series includes on-chip peripheral functions necessary for system
configuration, such as large-capacity ROM and RAM, timers, a serial communication interface
(SCI), an A/D converter, an interrupt controller, and I/O ports. Memory or peripheral LSIs can be
connected efficiently with an external memory access support function. This greatly reduces
system cost.
There are versions of on-chip ROM: mask ROM, PROM, and flash memory. The flash memory
can be programmed with a programmer that supports SH7040 series programming, and can also
be programmed and erased by software.
This hardware manual describes the SH7040 series hardware. Refer to the programming manual
for a detailed description of the instruction set.
Related Manual
SH7040 series instructions
SH-1/SH-2/SH-DSP Programming Manual
Please consult your Hitachi sales representative for details for development environment system.
FPGA/CPLD
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