Hitachi Single-Chip Microcomputer
H8/3577 Series, H8/3567 Series
H8/3577
H8/3574
H8/3567
H8/3564
H8/3567U
H8/3564U
HD6433577, HD6473577
HD6433574
HD6433567, HD6473567
HD6433564-20, HD6433564-10
HD6433567U, HD6473567U
HD6433564U
Hardware Manual
ADE-602-200A
Rev. 2.0
11/30/00
Hitachi, Ltd.
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s
patent, copyright, trademark, or other intellectual property rights for information contained in
this document. Hitachi bears no responsibility for problems that may arise with third party’s
rights, including intellectual property rights, in connection with use of the information
contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you
have received the latest product standards or specifications before final design, purchase or
use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability.
However, contact Hitachi’s sales office before using the product in an application that
demands especially high quality and reliability or where its failure or malfunction may directly
threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear
power, combustion control, transportation, traffic, safety equipment or medical equipment for
life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi
particularly for maximum rating, operating supply voltage range, heat radiation characteristics,
installation conditions and other characteristics. Hitachi bears no responsibility for failure or
damage when used beyond the guaranteed ranges. Even within the guaranteed ranges,
consider normally foreseeable failure rates or failure modes in semiconductor devices and
employ systemic measures such as fail-safes, so that the equipment incorporating Hitachi
product does not cause bodily injury, fire or other consequential damage due to operation of
the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document
without written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi
semiconductor products.
Preface
The H8/3577 Series and H8/3567 Series comprise single-chip microcomputers built around the
H8/300 CPU and equipped with on-chip supporting functions required for system configuration.
Versions are available with PROM (ZTAT™) or mask ROM as on-chip ROM.
On-chip supporting functions include a16-bit free-running timer (FRT), 8-bit timer (TMR),
watchdog timer (WDT), two PWM timers (PWM and PWMX), a serial communication interface
(SCI), I
2
C bus interface (IIC), A/D converter (ADC), and I/O ports.
The H8/3577 Series comprises 64-pin models with the above supporting functions on-chip. The
H8/3567 Series comprises the 42-pin H8/3567 and H8/3564 with fewer PWM, ADC, and I/O port
channels, and the 64-pin H8/3567U and H8/3564U with on-chip universal serial bus (USB) hubs
and function.
Use of the H8S/3577 Series or H8S/3567 Series enables compact, high-performance systems to be
implemented easily. The comprehensive timer functions and their interconnectability (timer
connection facility) make these series ideal for applications such as PC monitor systems.
This manual describes the hardware of the H8/3577 Series and H8/3567 Series. Refer to the
H8/300 Series Programming Manual
for a detailed description of the instruction set.
Note: * ZTAT (Zero Turn-Around Time) is a trademark of Hitachi, Ltd.
On-Chip Supporting Modules
Series
Product names
Universal serial bus (USB)
8-bit PWM timer (PWM)
14-bit PWM timer (PWMX)
16-bit free-running timer (FRT)
8-bit timer (TMR)
Timer connection
Watchdog timer (WDT)
Serial communication interface (SCI)
I
2
C bus interface (IIC)
A/D converter
H8/3577 Series
H8/3577, H8/3574
—
×16
×2
×1
×4
Available
×1
×1
×2
×8
H8/3567 Series
H8/3567, H8/3564,
H8/3567U, H8/3564U
—/Available
(H8/3567U, H8/3564U)
×8
×2
×1
×4
Available
×1
×1
×2
×4
Contents
Section 1
1.1
1.2
1.3
Overview
............................................................................................................
Overview............................................................................................................................
Internal Block Diagrams ....................................................................................................
Pin Arrangement and Functions.........................................................................................
1.3.1 Pin Arrangement ...................................................................................................
1.3.2 List of Pin Functions.............................................................................................
1.3.3 Pin Functions ........................................................................................................
1
1
6
8
8
14
22
Section 2
2.1
CPU
..................................................................................................................... 29
29
29
30
30
31
31
31
33
33
34
35
36
36
38
42
44
46
47
47
49
53
55
56
58
58
59
60
60
61
61
i
2.2
2.3
2.4
2.5
2.6
2.7
Overview............................................................................................................................
2.1.1 Features .................................................................................................................
2.1.2 Address Space.......................................................................................................
2.1.3 Register Configuration..........................................................................................
Register Descriptions .........................................................................................................
2.2.1 General Registers..................................................................................................
2.2.2 Control Registers ..................................................................................................
2.2.3 Initial Register Values ..........................................................................................
Data Formats......................................................................................................................
2.3.1 Data Formats in General Registers .......................................................................
2.3.2 Memory Data Formats..........................................................................................
Addressing Modes..............................................................................................................
2.4.1 Addressing Modes ................................................................................................
2.4.2 Effective Address Calculation ..............................................................................
Instruction Set ....................................................................................................................
2.5.1 Data Transfer Instructions ....................................................................................
2.5.2 Arithmetic Operations ..........................................................................................
2.5.3 Logic Operations ..................................................................................................
2.5.4 Shift Operations ....................................................................................................
2.5.5 Bit Manipulations..................................................................................................
2.5.6 Branching Instructions..........................................................................................
2.5.7 System Control Instructions..................................................................................
2.5.8 Block Data Transfer Instruction............................................................................
Basic Operational Timing ..................................................................................................
2.6.1 Access to On-Chip Memory (RAM, ROM) .........................................................
2.6.2 Access to On-Chip Peripheral Modules................................................................
CPU States .........................................................................................................................
2.7.1 Overview...............................................................................................................
2.7.2 Reset State ............................................................................................................
2.7.3 Program Execution State ......................................................................................
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