FEATURES
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LTC1407-1/LTC1407A-1
Serial 12-Bit/14-Bit, 3Msps
Simultaneous Sampling
ADCs with Shutdown
DESCRIPTION
The LTC
®
1407-1/LTC1407A-1 are 12-bit/14-bit, 3Msps
ADCs with two 1.5Msps simultaneously sampled differ-
ential inputs. The devices draw only 4.7mA from a single
3V supply and come in a tiny 10-lead MS package. A sleep
shutdown feature lowers power consumption to 10μW.
The combination of speed, low power and tiny package
makes the LTC1407-1/LTC1407A-1 suitable for high speed,
portable applications.
The LTC1407-1/LTC1407A-1 contain two separate differ-
ential inputs that are sampled simultaneously on the rising
edge of the CONV signal. These two sampled inputs are
then converted at a rate of 1.5Msps per channel.
The 80dB common mode rejection allows users to eliminate
ground loops and common mode noise by measuring
signals differentially from the source.
The devices convert –1.25V to 1.25V bipolar inputs differ-
entially. The absolute voltage swing for CH0
+
, CH0
–
, CH1
+
and CH1
–
extends from ground to the supply voltage.
The serial interface sends out the two conversion results in 32
clocks for compatibility with standard serial interfaces.
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Protected by U.S. Patents including 6084440, 6522187.
3Msps Sampling ADC with Two Simultaneous
Differential Inputs
1.5Msps Throughput per Channel
Low Power Dissipation: 14mW (Typ)
3V Single Supply Operation
±1.25V Differential Input Range
Pin Compatible 0V to 2.5V Input Range Version
(LTC1407/LTC1407A)
2.5V Internal Bandgap Reference with External
Overdrive
3-Wire Serial Interface
Sleep (10μW) Shutdown Mode
Nap (3mW) Shutdown Mode
80dB Common Mode Rejection at 100kHz
Tiny 10-Lead MS Package
APPLICATIONS
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Telecommunications
Data Acquisition Systems
Uninterrupted Power Supplies
Multiphase Motor Control
I & Q Demodulation
Industrial Radio
BLOCK DIAGRAM
CH0
+
1
10μF
3V
7
THD, 2nd and 3rd vs Input Frequency
for Differential Input Signals
V
DD
14-BIT LATCH
LTC1407A-1
–44
–50
–56
THD, 2ND, 3RD (dB)
THREE-
STATE
SERIAL
OUTPUT
PORT
–62
–68
–74
–80
–86
–92
–98
9
SCK
–104
0.1
1
FREQUENCY (MHz)
2ND
10
20
THD
3RD
+
S&H
CH0
–
2
–
MUX
3Msps
14-BIT ADC
8
SDO
CH1
+
4
+
S&H
CH1
–
5
–
V
REF
GND
2.5V
REFERENCE
14-BIT LATCH
10
TIMING
LOGIC
CONV
3
10μF
6
11
EXPOSED PAD
1407A1 BD
14071 TA01b
14071fb
1
LTC1407-1/LTC1407A-1
ABSOLUTE MAXIMUM RATINGS
(Notes 1, 2)
PIN CONFIGURATION
TOP VIEW
CH0
+
1
CH0
–
2
V
REF
3
CH1
+
4
CH1
–
5
11
10
9
8
7
6
CONV
SCK
SDO
V
DD
GND
Supply Voltage (V
DD
) .................................................4V
Analog Input Voltage (Note 3) ..... –0.3V to (V
DD
+ 0.3V)
Digital Input Voltage .................... –0.3V to (V
DD
+ 0.3V)
Digital Output Voltage ................. –0.3V to (V
DD
+ 0.3V)
Power Dissipation ...............................................100mW
Operation Temperature Range
LTC1407C-1/LTC1407AC-1 ...................... 0°C to 70°C
LTC1407I-1/LTC1407AI-1 .....................–40°C to 85°C
Storage Temperature Range...................–65°C to 150°C
Lead Temperature (Soldering, 10 sec) .................. 300°C
MSE PACKAGE
10-LEAD PLASTIC MSOP
T
JMAX
= 125°C,
θ
JA
= 40°C/W
EXPOSED PAD IS GND (PIN 11), MUST BE SOLDERED TO PCB
ORDER INFORMATION
LEAD FREE FINISH
LTC1407CMSE-1#PBF
LTC1407IMSE-1#PBF
LTC1407ACMSE-1#PBF
LTC1407AIMSE-1#PBF
TAPE AND REEL
LTC1407CMSE-1#TRPBF
LTC1407IMSE-1#TRPBF
LTC1407ACMSE-1#TRPBF
LTC1407AIMSE-1#TRPBF
PART MARKING
LTBGT
LTBGV
LTBGW
LTBGX
PACKAGE DESCRIPTION
10-Lead Plastic MSOP
10-Lead Plastic MSOP
10-Lead Plastic MSOP
10-Lead Plastic MSOP
TEMPERATURE RANGE
0°C to 70°C
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. With internal reference, V
DD
= 3V.
PARAMETER
Resolution (No Missing Codes)
Integral Linearity Error
Offset Error
Offset Match from CH0 to CH1
Gain Error
Gain Match from CH0 to CH1
Gain Tempco
(Notes 5, 17)
(Notes 4, 17)
(Note 17)
(Notes 4, 17)
(Note 17)
Internal Reference (Note 4)
External Reference
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CONVERTER CHARACTERISTICS
CONDITIONS
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MIN
12
–2
–10
–5
–30
–5
LTC1407-1
TYP MAX
±0.25
±1
±0.5
±5
±1
±15
±1
2
10
5
30
5
MIN
14
–4
–20
–10
–60
–10
LTC1407A-1
TYP MAX
Bits
±0.5
±2
±1
±10
±2
±15
±1
4
20
10
60
10
LSB
LSB
LSB
LSB
LSB
ppm/°C
ppm/°C
14071fb
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LTC1407-1/LTC1407A-1
The
l
denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at T
A
= 25°C. With internal reference, V
DD
= 3V.
SYMBOL PARAMETER
V
IN
V
CM
I
IN
C
IN
t
ACQ
t
AP
t
JITTER
t
SK
CMRR
Analog Differential Input Range (Notes 3, 8, 9)
Analog Common Mode + Differential
Input Range (Note 10)
Analog Input Leakage Current
Analog Input Capacitance
Sample-and-Hold Acquisition Time
Sample-and-Hold Aperture Delay Time
Sample-and-Hold Aperture Delay Time Jitter
Sample-and-Hold Aperture Skew from CH0 to CH1
Analog Input Common Mode Rejection Ratio
f
IN
= 1MHz, V
IN
= 0V to 3V
f
IN
= 100MHz, V
IN
= 0V to 3V
(Note 18)
(Note 6)
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ANALOG INPUT
CONDITIONS
2.7V ≤ V
DD
≤ 3.3V
MIN
TYP
–1.25 to 1.25
0 to V
DD
MAX
UNITS
V
V
1
13
39
1
0.3
200
–60
–15
μA
pF
ns
ns
ps
ps
dB
dB
DYNAMIC ACCURACY
SYMBOL PARAMETER
SINAD
Signal-to-Noise Plus
Distortion Ratio
The
l
denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at T
A
= 25°C. With internal reference, V
DD
= 3V. Single-ended signal drive CH0
+
/CH1
+
with
CHO
–
/CH1
–
= 1.5V DC. Differential signals drive both inputs of each channel with V
CM
= 1.5V DC.
CONDITIONS
100kHz Input Signal (Note 19)
750kHz Input Signal (Note 19)
100kHz Input Signal, External V
REF
= 3.3V,
V
DD
≥ 3.3V (Note 19)
750kHz Input Signal, External V
REF
= 3.3V,
V
DD
≥ 3.3V (Note 19)
100kHz First 5 Harmonics (Note 19)
750kHz First 5 Harmonics (Note 19)
100kHz Input Signal (Note 19)
750kHz Input Signal (Note 19)
0.625V
P-P
1.4MHz Summed with 0.625V
P-P
, 1.56MHz
into CH0
+
and Inverted into CHO
–
. Also Applicable
to CH1
+
and CH1
–
V
REF
= 2.5V (Note 17)
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MIN
68
LTC1407-1
TYP MAX
70.5
70.5
72.0
72.0
–87
–83
87
83
–82
LTC1407A-1
MIN
TYP MAX
70
73.5
73.5
76.3
76.3
–90
–86
90
86
–82
UNITS
dB
dB
dB
dB
dB
dB
dB
dB
dB
THD
SFDR
IMD
Total Harmonic
Distortion
Spurious Free
Dynamic Range
Intermodulation
Distortion
Code-to-Code
Transition Noise
Full Linear Bandwidth
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–77
–80
0.25
50
5
1
50
5
LSB
RMS
MHz
MHz
Full Power Bandwidth V
IN
= 2.5V
P-P
, SDO = 11585LSB
P-P
(–3dBFS) (Note 15)
S/(N + D) ≥ 68dB
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LTC1407-1/LTC1407A-1
INTERNAL REFERENCE CHARACTERISTICS
PARAMETER
V
REF
Output Voltage
V
REF
Output Tempco
V
REF
Line Regulation
V
REF
Output Resistance
V
REF
Setting Time
V
DD
= 2.7V to 3.6V, V
REF
= 2.5V
Load Current = 0.5mA
CONDITIONS
I
OUT
= 0
T
A
= 25°C. V
DD
= 3V.
MIN
TYP
2.5
15
600
0.2
2
MAX
UNITS
V
ppm/°C
μV/V
Ω
ms
DIGITAL INPUTS AND DIGITAL OUTPUTS
SYMBOL
V
IH
V
IL
I
IN
C
IN
V
OH
V
OL
I
OZ
C
OZ
I
SOURCE
I
SINK
PARAMETER
High Level Input Voltage
Low Level Input Voltage
Digital Input Current
Digital Input Capacitance
High Level Output Voltage
Low Level Output Voltage
Hi-Z Output Leakage D
OUT
Hi-Z Output Capacitance D
OUT
Output Short-Circuit Source Current
Output Short-Circuit Sink Current
V
OUT
= 0V, V
DD
= 3V
V
OUT
= V
DD
= 3V
CONDITIONS
V
DD
= 3.3V
V
DD
= 2.7V
V
IN
= 0V to V
DD
The
l
denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at T
A
= 25°C. V
DD
= 3V.
MIN
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TYP
MAX
0.6
±10
UNITS
V
V
μA
pF
V
V
V
μA
pF
mA
mA
2.4
5
V
DD
= 3V, I
OUT
= –200μA
V
DD
= 2.7V, I
OUT
= 160μA
V
DD
= 2.7V, I
OUT
= 1.6mA
V
OUT
= 0V to V
DD
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2.5
2.9
0.05
0.10
1
20
15
0.4
±10
POWER REQUIREMENTS
SYMBOL
V
DD
I
DD
PARAMETER
Supply Voltage
Supply Current
The
l
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. With internal reference, V
DD
= 3V.
CONDITIONS
Active Mode, f
SAMPLE
= 1.5Msps
Nap Mode
Sleep Mode (LTC1407)
Sleep Mode (LTC1407A)
Active Mode with SCK in Fixed State (Hi or Lo)
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MIN
2.7
TYP
4.7
1.1
2.0
2.0
12
MAX
3.6
7.0
1.5
15
10
UNITS
V
mA
mA
μA
μA
mW
PD
Power Dissipation
14071fb
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LTC1407-1/LTC1407A-1
The
l
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. V
DD
= 3V.
SYMBOL
f
SAMPLE(MAX)
t
THROUGHPUT
t
SCK
t
CONV
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
9
t
10
t
12
PARAMETER
Maximum Sampling Frequency per Channel
(Conversion Rate)
Minimum Sampling Period (Conversion + Acquisition Period)
Clock Period
Conversion Time
Minimum Positive or Negative SCLK Pulse Width
CONV to SCK Setup Time
SCK Before CONV
Minimum Positive or Negative CONV Pulse Width
SCK to Sample Mode
CONV to Hold Mode
32nd SCK↑ to CONV↑ Interval (Affects Acquisition Period)
Minimum Delay from SCK to Valid Bits 0 Through 11
SCK to Hi-Z at SDO
Previous SDO Bit Remains Valid After SCK
V
REF
Settling Time After Sleep-to-Wake Transition
(Note 16)
(Note 6)
(Note 6)
(Notes 6, 10)
(Note 6)
(Note 6)
(Note 6)
(Notes 6, 11)
(Notes 6, 7, 13)
(Notes 6, 12)
(Notes 6, 12)
(Notes 6, 12)
(Notes 6, 14)
CONDITIONS
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TIMING CHARACTERISTICS
MIN
1.5
TYP
MAX
UNITS
MHz
667
19.6
32
2
3
0
4
4
1.2
45
8
6
2
2
10000
34
10000
ns
ns
SCLK cycles
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
All voltage values are with respect to ground GND.
Note 3:
When these pins are taken below GND or above V
DD
, they will be
clamped by internal diodes. This product can handle input currents greater
than 100mA below GND or greater than V
DD
without latchup.
Note 4:
Offset and range specifications apply for a single-ended CH0
+
or CH1
+
input with CH0
–
or CH1
–
grounded and using the internal 2.5V
reference.
Note 5:
Integral linearity is tested with an external 2.55V reference and is
defined as the deviation of a code from the straight line passing through
the actual endpoints of a transfer curve. The deviation is measured from
the center of quantization band.
Note 6:
Guaranteed by design, not subject to test.
Note 7:
Recommended operating conditions.
Note 8:
The analog input range is defined for the voltage difference
between CH0
+
and CH0
–
or CH1
+
and CH1
–
. Performance is specified
with CHO
–
= 1.5V DC while driving CHO
+
and with CH1
–
= 1.5V DC while
driving CH1
+
.
Note 9:
The absolute voltage at CH0
+
, CH0
–
, CH1
+
and CH1
–
must be
within this range.
Note 10:
If less than 3ns is allowed, the output data will appear one
clock cycle later. It is best for CONV to rise half a clock before SCK, when
running the clock at rated speed.
Note 11:
Not the same as aperture delay. Aperture delay (1ns) is the
difference between the 2.2ns delay through the sample-and-hold and the
1.2ns CONV to hold mode delay.
Note 12:
The rising edge of SCK is guaranteed to catch the data coming
out into a storage latch.
Note 13:
The time period for acquiring the input signal is started by the
32nd rising clock and it is ended by the rising edge of CONV.
Note 14:
The internal reference settles in 2ms after it wakes up from sleep
mode with one or more cycles at SCK and a 10μF capacitive load.
Note 15:
The full power bandwidth is the frequency where the output code
swing drops by 3dB with a 2.5V
P-P
input sine wave.
Note 16:
Maximum clock period guarantees analog performance during
conversion. Output data can be read with an arbitrarily long clock period.
Note 17:
The LTC1407A-1 is measured and specified with 14-bit
Resolution (1LSB = 152μV) and the LTC1407-1 is measured and specified
with 12-bit Resolution (1LSB = 610μV).
Note 18:
The sampling capacitor at each input accounts for 4.1pF of the
input capacitance.
Note 19:
Full-scale sinewaves are fed into the noninverting inputs while
the inverting inputs are kept at 1.5V DC.
14071fb
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测试/测量
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