DEMO MANUAL DC1948A
LT3090
–36V, 600mA Negative Linear Regulator
with Programmable Current Limit
Description
Demonstration circuit 1948A is a 600mA low dropout
negative linear regulator featuring the
LT
®
3090.
This device
is designed for applications requiring negative output volt-
age, high current with no heat sink, output adjustability to
zero and low dropout voltage.
The LT3090 features fast transient response, high PSRR
and low output noise. The LT3090 supplies 600mA at a
typical dropout voltage of 300mV. Operating quiescent cur-
rent is nominally 1mA and drops to << 1μA in shutdown.
A single resistor adjusts the LT3090’s precision program-
mable current limit. The LT3090’s positive or negative
current monitor either sources a current (0.5mA/A) or
sinks a current (1mA/A) proportional to output current.
Built-in protection includes reverse output protection,
internal current limit with foldback and thermal shutdown
with hysteresis.
The LT3090 is offered in a 10 pin DFN package and a
16-lead MSOP package.
The LT3090 data sheet gives a complete description of
the device, operation and application information. The data
sheet should be read in conjunction with this quick start
guide for working on or modifying the demo circuit 1948A.
Design files for this circuit board are available at
http://www.linear.com/demo/DC1948A
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
performance summary
SYMBOL
V
IN
V
OUT
PARAMETER
Input Supply Range
Output Voltage
Specifications are at T
A
= 25°C
MIN
–36
–1.286
–2.575
–5.15
–12.36
–15.45
–18.54
600
–1.25
–2.5
–5
–12
–15
–18
TYP
MAX
–1.5
–1.213
–2.425
–4.85
–11.64
–14.55
–17.46
UNITS
V
V
V
V
V
V
V
mA
CONDITIONS
V
OUT
= 1.2V, I
OUT1
= 1mA
Shunt at 1, 2 for JP1
Shunt at 3, 4 for JP1
Shunt at 5, 6 for JP1
Shunt at 7, 8 for JP1
Shunt at 9, 10 for JP1
Shunt at 11, 12 for JP1 and R10 Stuffed as 357kΩ
I
OUT
Output Current
R1 = 10k, (Note 1)
Note 1. This is for the typical condition when V
IN
– V
OUT
< 5V. Current limit varies with different values of V
IN
– V
OUT
. Refer to the LT3090 data sheet
for details.
dc1948af
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DEMO MANUAL DC1948A
Quick start proceDure
Demonstration circuit 1948A is easy to set up to evalu-
ate the performance of the LT3090. Refer to Figure 1 for
proper measurement equipment setup and follow the
procedure below:
NOTE.
When measuring the input or output voltage
ripple, care must be taken to avoid a long ground lead
on the oscilloscope probe. Measure the input or output
voltage ripple by touching the probe tip directly across
the terminals of the input or output capacitors. See
Figure 2 for proper scope probe technique.
1. Use JP2 to set the desired output voltage.
2. Put JP4 on ON position.
3. With power off, connect the input power supply to VIN
and GND.
4. Turn on the power at the VIN.
NOTE.
Make sure that the VIN voltage does not exceed
–36V.
5. Check for the proper output voltages:
NOTE.
If there is no output, temporarily disconnect the
load to make sure that the load is not set too high or
is shorted.
6. Once the proper output voltages are established, adjust
the loads within the operating range and observe the
output voltage regulation, efficiency and other param-
eters.
NOTE.
Make sure that the power dissipation is limited
below the thermal limit.
Figure 1. DC1948A Proper Equipment Setup
Figure 2. Measuring Input or Output Ripple
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DEMO MANUAL DC1948A
positive or negative current monitor configuration
There are both positive and negative current monitors on
the LT3090. The configurations for these two monitors are
different. When the positive current monitor is in use, JP1
needs to be configured on IMP position and JP3 needs to
be configured on +3V position. Meantime a +3V external
power supply needs to be connected to +3V turret. Figure 3
shows this configuration.
When the negative current monitor is in use, JP1 needs
to be configured on VIN position and JP3 needs to be
configured on IMN position. There is no external power
supply needed. Figure 4 shows this configuration.
Figure 4. Negative Current Monitor Configuration
Figure 3. Positive Current Monitor Configuration
cable Drop compensation configuration
Demo Circuit 1948A can be configured to evaluate the
cable drop compensation on the LT3090. Note that cable
drop compensation is only using negative current monitor
configuration. JP1, JP3 and R12 shall be configured. JP1
needs to be configured on VIN position. JP3 needs to be
configured on CDC position. R12 needs be replaced by a
calculated value which has the following relationship with
the total output cable impedance (R
CBL
) below. R12 and
R
CBL
are both in kΩ:
R12 = R
CBL
• 1k
thermal image
An example thermal image shows the temperature distri-
bution on board. The test is complete in still air at room
temperature with 2.1W power dissipation in the LT3090.
This gives the IC case-to-ambient thermal resistance of
about
θ
JA
= 24°C/W on the demo board.
Figure 5. Temperature Rise at 2.1W Dissipation
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DEMO MANUAL DC1948A
parts list
ITEM QTY REFERENCE
Required Circuit Components
1
2
3
4
5
6
7
8
9
10
11
12
13
14
1
2
3
1
2
3
4
5
6
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
8
1
1
1
1
4
C1, CIN2
C2
C4
R1
R2
R4
R5
R6
R7
R8
R9
R11
R12, R14
U1
CIN1
C3 (OPT)
CAP, X7R 4.7µF 50V 10% 1206
CAP, X7R 0.1µF 16V 10% 0603
CAP, X7R 1µF 10V 10% 0603
RES, CHIP 10k 0.1W 1% 0805
RES, CHIP 49.9k 0.1W 1% 0805
RES, CHIP 2k 0.06W 1% 0603
RES, CHIP 24.9k 0.06W 1% 0603
RES, CHIP 49.9k 0.06W 1% 0603
RES, CHIP 100k 0.06W 1% 0603
RES, CHIP 243k 0.06W 1% 0603
RES, CHIP 301k 0.06W 1% 0603
RES, CHIP 1k 0.06W 1% 0603
RES, CHIP 0Ω 0.25W 5A 0603
IC, NEGATIVE LINEAR REG DFN(10) (DD) 3mm × 3mm
CAP, ALUM 10µF 50V 10%
CAP, 1206
TDK C3216X7R1H475KT
AVX 0603YC104KAT2A
TAIYO YUDEN LMK107BJ105KA
VISHAY CRCW080510K0FKTA
VISHAY CRCW080549K9FKTA
VISHAY CRCW06032K00FKEA
VISHAY CRCW060324K9FKEA
VISHAY CRCW060349K9FKEA
VISHAY CRCW0603100KFKEA
VISHAY CRCW0603243KFKEA
VISHAY CRCW0603301KFKEA
VISHAY CRCW06031K00FKEA
VISHAY CRCW06030000Z0EA
LINEAR TECHNOLOGY CORPORATION LT3090EDD
SUNCON 50CE10BSS
PART DESCRIPTION
MANUFACTURER/PART NUMBER
Additional Demo Board Circuit Components
R10, R13, R15 (OPT) RES, 0603
E1, E2, E3, E4, E6,
E7, E8, E9
JP1
JP2
JP3
JP4
XJP1, XJP2, XJP3,
XJP4
TURRET, TESTPOINT
HEADERS, DBL ROW 2 × 2 2mm CTRS
HEADERS, DBL ROW 2 × 6 2mm CTRS
HEADERS, DBL ROW 2 × 3 2mm CTRS
HEADERS, 2mm CTRS
SHUNT, 2mm CTRS
MILL MAX 2501-2-00-80-00-00-07-0
SAMTEC TMM-102-02-L-D
SAMTEC TMM-106-02-L-D
SAMTEC TMM-103-02-L-D
SAMTEC ASP-157349-01
SAMTEC 2SN-BK-G
Hardware: For Demo Board Only
dc1948af
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5
4
3
2
1
ECO REV
DATE
2
PRODUCTION
REVISION HISTORY
APPROVED
DESCRIPTION
EDWIN LI
Aug 20, 2013
VOUT
-600mA
Max
D
D
GND
schematic Diagram
SHDN
IMONP
C
B
IMONN
+3V
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
B
A
5
+
*
GND
C
CUSTOMER NOTICE
APPROVALS
EDWIN LI
TECHNOLOGY
TITLE: SCHEMATIC
www.linear.com
A
LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A
CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS;
HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES.
VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL
APP ENG.
APPLICATION. COMPONENT SUBSTITUTION AND PRINTED
CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT
PERFORMANCE OR RELIABILITY. CONTACT LINEAR
TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE.
SIZE
THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND
SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS.
½½
½
IC NO.
REV.
2
SCALE = NONE
3
MODIFY DATE:
4
2
1
SHEET
1
OF
1
DEMO MANUAL DC1948A
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