Switchtec PFX-L Fanout-Lite PCIe Gen3 Switch Family
PM8566, PM8565, PM8564, PM8563, PM8562, and PM8561
The Switchtec PFX-L Fanout-Lite PCIe Gen3 Switch Family is composed of
PCIe Base Specification 3.1-compliant switches supporting up to 96 lanes,
six virtual switch partitions, two non-transparent bridges (NTBs), six hot-plug
controllers, and comprehensive diagnostics and debug capabilities.
Typical applications for the PFX-L include data center equipment, defense
and industrial servers, workstations, test equipment, video production and
broadcasting equipment, cellular infrastructure, access networks, metro
networks, and core networking.
Features
High-Performance Non-Blocking Switches
• Up to 174 GB/s switching capacity
• 96-lane, 80-lane, 64-lane, 48-lane, 32-lane, and 24-lane variants
• Ports bifurcate to x4/x8/x16 lanes
• Up to two NTBs assignable to any port
• Logical non-transparent (NT) interconnect allows for larger topologies
• Supports 1+1 and N+1 failover mechanisms
• NT address translation using direct windows and multiple sub-windows
per BAR
• Supports multicast groups per port
Highlights
• Hot-plug controllers, end-to-end data integrity
protection, high-quality, and low-power fifth-
generation SERDES
• Comprehensive diagnostics and debugging:
PCIe generator and analyzer, per-port
performance and error counters, multiple
loopback modes, and real-time eye capture
• Up to 24 ports, two NTBs, and six virtual switch
partitions
• Flexible x4, x8, and x16 port bifurcation with
no restrictions on configuring ports as either
upstream or downstream, or on mapping ports
to NTBs
Error Containment
• Advanced Error Reporting (AER) on all ports
• Hot-plug controllers
• GPIOs configurable for different cable/connector standards
PCIe Interfaces
• Passive, managed, and optical cables
• SHPC-enabled slot and edge connectors
Diagnostics and Debug
• Transaction Layer Packet (TLP) generator for testing and debugging of links
and error handling
• Real-time eye capture
• Any-to-any port mirroring for debug purposes
• External loopback at PHY and TLP layers
• Errors, statistics, performance, and TLP latency counters
Peripheral I/O Interfaces
• Up to two (master/slave) two-wire interfaces (TWIs) with SMBus support
• Up to 78 parallel GPIO pins
• 1 UART
• 1 QSPI with optional inline ECC
• JTAG and EJTAG interface
Switchtec PFX-L Fanout-Lite PCIe Gen3 Switch Family
PM8566, PM8565, PM8564, PM8563, PM8562, and PM8561
High-Speed I/O
• PCIe Gen3 8 GT/s
• Supports PCIe-compliant link training and manual PHY
configuration
Example Application
Host
x16
NVMe
SSD
Host
x16
Power Management
• Active State Power Management (ASPM)
• Software controlled power management
Chiplink Diagnostic Tools
• Extensive debug, diagnostics, configuration, and analysis
tools with an intuitive GUI
• Access to configuration data, management capabilities, and
signal integrity analysis tools (such as real-time eye capture)
• Connects to device over in-band PCIe or sideband signals
(UART, TWI, and EJTAG)
NVMe
SSD
x4
NVMe
SSD
x4
Evaluation Kit
The evaluation kit is a device evaluation environment supporting
multiple host and SSD interfaces. The following kits are available
for evaluating PFX, PSX, and PFX-L features using the populated
PSX 96xG3 device on the PM5461-KIT and the PSX 48xG3
device on the PM5462-KIT:
• PM5461-KIT—PSX/PFX/PFX-L 96/80/64xG3, 1-Slot, 16 HD
Evaluation Kit (PMC-2151996)
• PM5462-KIT—PSX/PFX/PFX-L 48/32/24xG3, 3-Slot
Evaluation Kit (PMC-2151645)
Ordering Information
Product
PFX-L 96xG3
PFX-L 80xG3
PFX-L 64xG3
PFX-L 48xG3
PFX-L 32xG3
PFX-L 24xG3
Lanes
96
80
64
48
32
24
Ports/NTBs
24/2
20/2
16/2
12/2
8/2
6/2
Virtual Switch
Hot-Plug Controllers
Partitions
6
6
6
6
6
4
3
Package
37.5 mm × 37.5 mm
37.5 mm × 37.5 mm
37.5 mm × 37.5 mm
27 mm × 27 mm
27 mm × 27 mm
27 mm × 27 mm
Ordering Number
PM8566B-FEI
PM8565B-FEI
PM8564B-FEI
PM8563B-F3EI
PM8562B-F3EI
PM8561B-F3EI
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Outside the USA: +1 (949) 380-6100
Fax: +1 (949) 215-4996
Email: sales.support@microsemi.com
www.microsemi.com
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