256K X 32 BIT HIGH SPEED CMOS SRAM
AS7C325632-10BIN
Revision History
AS7C325632-10BIN
90ball
TFBGA
PACKAGE
Revision
Rev 1.0
Details
Initial Issue
Date
Jan.
2017
Alliance Memory Inc. 511 Taylor Way, San Carlos, CA 94070 TEL: (650) 610-6800 FAX: (650) 620-9211
Alliance Memory Inc. reserves the right to change products or specification without notice
Confidential
- 1/12 -
Rev.1.0 Jan. 2017
256K X 32 BIT HIGH SPEED CMOS SRAM
FEATURES
Fast access time : 10ns
Low power consumption:
Operating current : 125mA (TYP.)
Standby current : 4mA (TYP.)
Single 3.3V power supply
All inputs and outputs TTL compatible
Fully static operation
Tri-state output
Data byte control : B0# (DQ0 ~ DQ7)
B1# (DQ8 ~ DQ15)
B2# (DQ16~DQ23)
B3# (DQ24~DQ31)
Data retention voltage : 1.5V (MIN.)
ROHS Compliant/Pb and Halogen free
Package : 90-ball 8mm x 13mm TFBGA
AS7C325632-10BIN
GENERAL DESCRIPTION
The AS7C325632-10BIN is a 8M-bit high speed
CMOS static random access memory organized
as 256K words by 32 bits. It is fabricated using
very high performance, high reliability CMOS
technology. Its standby current is stable within the
range of operating temperature.
The AS7C325632-10BIN operates from a single
power supply of 3.3V and all inputs and outputs
are fully TTL compatible
FUNCTIONAL BLOCK DIAGRAM
Vcc
Vss
PIN DESCRIPTION
SYMBOL
A0 - A17
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Enable Input
Write Enable Input
Output Enable Input
Byte Control
Power Supply
Ground
No Connection
A0-A17
DECODER
256Kx32
MEMORY ARRAY
DQ0 - DQ31
CE#, CE2
WE#
OE#
B0# - B3#
DQ0-DQ7
DQ8-DQ15
DQ16-DQ23
DQ24-DQ31
I/O DATA
CIRCUIT
COLUMN I/O
V
CC
V
SS
NC
CE#
CE2
WE#
OE#
B0#-B3#
CONTROL
CIRCUIT
PRODUCT FAMILY
Product
Family
AS7C325632-10BIN
Operating
Temperature
-40 ~ 85℃
V
CC
Range
2.7 ~ 3.6V
Speed
10ns
Power Dissipation
Standby(I
SB1,
TYP.) Operating(I
CC
,TYP.)
4mA
125mA
ORDERING INFORMATION
Package Type
90-ball
(8mm x 13mm)
TFBGA
10
-40℃~85℃
Access Time
(Speed/ns)
Temperature
Range(℃)
Packing
Type
Tray
Tape Reel
Alliance Part Number
AS7C325632-10BIN
AS7C325632-10BINTR
Confidential
- 2/12 -
Rev.1.0 Jan. 2017
256K X 32 BIT HIGH SPEED CMOS SRAM
AS7C325632-10BIN
PIN CONFIGURATION
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
DQ1 DQ0 Vss
DQ2 Vcc
Vss
Vcc DQ31 DQ30
Vcc
Vss DQ29
Vss DQ3 DQ4
Vss DQ6 DQ5
Vcc DQ7
Vss
A0
A15
B0#
A1
A14
NC
A3
A2
A13
A16
NC
DQ27 DQ28 Vcc
DQ26 DQ25 Vcc
NC DQ24 Vss
A4
A10
A8
A9
B3#
A5
A7
Vcc
A6
A11
AS7C325632-10BIN
XXXXXXXX
XXXXXXXX
CE2 A17
B1#
NC
A12 CE#
OE# WE# B2#
Vcc DQ23 Vss
DQ21 DQ22 Vcc
DQ20 DQ19 Vcc
Vcc
Vss DQ18
Vcc DQ8 Vss
Vss DQ9 DQ10
Vss DQ12 DQ11
DQ13 Vcc
Vss
DQ14 DQ15 Vss
Vcc DQ16 DQ17
1
2
3
7
8
TFBGA(See through with Top View)
9
TFBGA (Top View)
Confidential
- 3/12 -
Rev.1.0 Jan. 2017
256K X 32 BIT HIGH SPEED CMOS SRAM
AS7C325632-10BIN
ABSOLUTE MAXIMUM RATINGS*
PARAMETER
Voltage on V
CC
relative to V
SS
Voltage on any other pin relative to V
SS
Operating Temperature
Storage Temperature
Power Dissipation
DC Output Current
SYMBOL
V
T1
V
T2
T
A
T
STG
P
D
I
OUT
RATING
-0.5 to 4.6
-0.5 to V
CC
+0.5
-40 to 85(I grade)
-65 to 150
1
50
UNIT
V
V
℃
℃
W
mA
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating
only and functional operation of the device or any other conditions above those indicated in the operational sections of this specification is
not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.
TRUTH TABLE
MODE
Standby
Output Disable
CE# CE2 OE# WE# B0# B1# B0# B1#
H
X
L
L
L
L
L
L
L
L
L
L
L
L
X
L
H
H
H
H
H
H
H
H
H
H
H
H
X
X
H
X
L
L
L
L
L
X
X
X
X
X
X
X
H
X
H
H
H
H
H
L
L
L
L
L
X
X
X
H
L
H
H
H
L
L
H
H
H
L
X
X
X
H
H
L
H
H
L
H
L
H
H
L
X
X
X
H
H
H
L
H
L
H
H
L
H
L
X
X
X
H
H
H
H
L
L
H
H
H
L
L
I/O OPERATION
DQ0-7
DQ8-15
Read
Write
Note:
H = V
IH
, L = V
IL
, X = Don't care.
High-Z
High-Z
High-Z
High-Z
D
OUT
High-Z
High-Z
High-Z
D
OUT
D
IN
High-Z
High-Z
High-Z
D
IN
High-Z
High-Z
High-Z
High-Z
High-Z
D
OUT
High-Z
High-Z
D
OUT
High-Z
D
IN
High-Z
High-Z
D
IN
SUPPLY
DQ16-23 DQ24-31
CURRENT
High-Z High-Z
I
SB1
High-Z High-Z
High-Z High-Z
I
CC
High-Z High-Z
High-Z High-Z
High-Z High-Z
D
OUT
High-Z
I
CC
High-Z D
OUT
D
OUT
D
OUT
High-Z High-Z
High-Z High-Z
D
IN
High-Z
I
CC
High-Z
D
IN
D
IN
D
IN
Confidential
- 4/12 -
Rev.1.0 Jan. 2017
256K X 32 BIT HIGH SPEED CMOS SRAM
AS7C325632-10BIN
DC ELECTRICAL CHARACTERISTICS
PARAMETER
Supply Voltage
Input High Voltage
Input Low Voltage
Input Leakage Current
Output Leakage
Current
Output High Voltage
Output Low Voltage
Average Operating
Power supply
Current
Standby Power
Supply Current
SYM.
TEST CONDITION
V
CC
V
IH*1
V
IL*2
I
LI
V
CC
≧
V
IN
≧
V
SS
V
CC
≧
V
OUT
≧
V
SS
,
I
LO
Output Disabled
V
OH
I
OH
= -4mA
V
OL
I
OL
= 8mA
CE#
≦
0.2V and CE2
≧
V
CC
-0.2V,
-10
I
CC
other pins at 0.2V or V
CC
-0.2V,
I
I/O
= 0mA; f=max.
CE#
≧
V
CC
- 0.2V;
I
SB1
other pins at 0.2V or V
CC
-0.2V.
MIN.
2.7
2.2
- 0.3
-1
-1
2.4
-
-
-
TYP.
*4
MAX.
3.3
3.6
-
V
CC
+0.3
-
0.8
-
1
-
-
-
125
4
1
-
0.4
180
40
UNIT
V
V
V
µA
µA
V
V
mA
mA
Notes:
1. V
IH
(MAX.)
= V
CC
+ 2.0V for pulse width less than 6ns.
2. V
IL
(MIN.)
= V
SS
- 2.0V for pulse width less than 6ns.
3. Over/Undershoot specifications are characterized on engineering evaluation stage, not for mass production test.
4. Typical values are included for reference only and are not guaranteed or tested.
Typical valued are measured at V
CC
= V
CC
(TYP.)
and T
A
= 25℃
CAPACITANCE
(T
A
= 25℃, f = 1.0MHz)
PARAMETER
Input Capacitance
Input/Output Capacitance
SYMBOL
C
IN
C
I/O
MIN.
Note : These parameters are guaranteed by device characterization, but not production tested.
-
-
MAX.
8
10
UNIT
pF
pF
AC TEST CONDITIONS
Speed
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Reference Levels
Output Load
10 ns
0.2V to V
CC
-0.2V
3ns
V
CC
/2
C
L
= 30pF + 1TTL, I
OH
/I
OL
= -4mA/8mA
Confidential
- 5/12 -
Rev.1.0 Jan. 2017
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