converters with an integrated precision reference and
a selectable 208sps or 833sps output rate. They use a
single 2.7V to 5.5V supply and communicate through an
I
2
C Interface. The LTC2471 is single-ended with a 0V to
V
REF
input range and the LTC2473 is differential with a
±V
REF
input range. Both ADCs include a 1.25V integrated
reference with 2ppm/°C drift performance and 0.1% initial
accuracy. The converters are available in a 12-pin DFN
3mm × 3mm package or an MSOP-12 package. They
include an integrated oscillator and perform conversions
with no latency for multiplexed applications. The LTC2471/
LTC2473 include a proprietary input sampling scheme
that reduces the average input current several orders of
magnitude when compared to conventional delta sigma
converters.
Following a single conversion, the LTC2471/LTC2473
automatically power down the converter and can also be
configured to power down the reference. When both the
ADC and reference are powered down, the supply current
is reduced to 200nA.
The LTC2471/LTC2473 include a user selectable 208sps
or 833sps output rate and due to a large oversampling
ratio (8,192 at 208sps and 2,048 at 833sps) have relaxed
anti-aliasing requirements.
n
n
n
n
n
n
16-Bit Resolution
Internal, High Accuracy Reference—10ppm/°C (Max)
Single-Ended (LTC2471) or Differential (LTC2473)
Selectable 208sps/833sps Output Rate
1mV Offset Error
0.01% Gain Error
Single Conversion Settling Time Simplifies
Multiplexed Applications
Single-Cycle Operation with Auto Shutdown
3.5mA (Typ) Supply Current
2µA (Max) Sleep Current
Internal Oscillator—No External Components
Required
I
2
C Interface
Small 12-Lead, 3mm × 3mm DFN and MSOP
Packages
System Monitoring
Environmental Monitoring
Direct Temperature Measurements
Instrumentation
Industrial Process Control
Data Acquisition
Embedded ADC Upgrades
applicaTions
n
n
n
n
n
n
n
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation and Easy Drive and No Latency ∆∑ is a trademark of Linear Technology
Corporation. All other trademarks are the property of their respective owners. Protected by U.S.
Patents, including 6208279, 6411242, 7088280, 7164378.
Typical applicaTion
2.7V TO 5.5V
0.1µF
0.1µF
10k
10k
0.1µF
IN
+
LTC2473
IN
–
10k
R
REF
–
AO
REFOUT
0.1µF
COMP V
CC
SCL
SDA
GND
24713 TA01a
V
REF
vs Temperature
1.2520
REFERENCE OUTPUT VOLTAGE (V)
1.2515
1.2510
1.2505
1.2500
1.2495
1.2490
1.2485
1.2480
–50
–30
–10 10
30
50
TEMPERATURE (°C)
70
90
0.1µF
10µF
I
2
C
INTERFACE
24713 TA01b
24713fb
For more information
www.linear.com/LTC2471
1
LTC2471/LTC2473
absoluTe MaxiMuM raTings
(Notes 1, 2)
Supply Voltage (V
CC
) ................................... –0.3V to 6V
Analog Input Voltage (V
IN+
, V
IN –
,
V
IN
, V
REF –
, V
COMP
, V
REFOUT
) ..........–0.3V to (V
CC
+ 0.3V)
Digital Voltage (V
SDA
, V
SCL
, V
AO
) ....–0.3V to (V
CC
+ 0.3V)
Storage Temperature Range .................. –65°C to 150°C
Operating Temperature Range
LTC2471C/LTC2473C ............................... 0°C to 70°C
LTC2471I/LTC2473I .............................–40°C to 85°C
pin conFiguraTion
LTC2473
TOP VIEW
REFOUT
COMP
AO
GND
SCL
SDA
1
2
3
4
5
6
13
GND
12 V
CC
11 GND
10 IN
–
LTC2473
TOP VIEW
REFOUT
COMP
AO
GND
SCL
SDA
1
2
3
4
5
6
12
11
10
9
8
7
V
CC
GND
IN
–
IN
+
REF
–
GND
9 IN
+
8 REF
–
7 GND
DD PACKAGE
12-LEAD (3mm
×
3mm) PLASTIC DFN
T
JMAX
= 125°C,
θ
JA
= 43°C/W
EXPOSED PAD (PIN 13) PCB GROUND CONNECTION
LTC2471
TOP VIEW
REFOUT
COMP
AO
GND
SCL
SDA
1
2
3
4
5
6
13
GND
12 V
CC
11 GND
10 GND
9 IN
8 REF
–
7 GND
LTC2471
MS PACKAGE
12-LEAD PLASTIC MSOP
T
JMAX
= 125°C,
θ
JA
= 130°C/W
TOP VIEW
REFOUT
COMP
AO
GND
SCL
SDA
1
2
3
4
5
6
12
11
10
9
8
7
V
CC
GND
GND
IN
REF
–
GND
DD PACKAGE
12-LEAD (3mm
×
3mm) PLASTIC DFN
T
JMAX
= 125°C,
θ
JA
= 43°C/W
EXPOSED PAD (PIN 13) PCB GROUND CONNECTION
MS PACKAGE
12-LEAD PLASTIC MSOP
T
JMAX
= 125°C,
θ
JA
= 130°C/W
orDer inForMaTion
LEAD FREE FINISH
LTC2471CDD#PBF
LTC2471IDD#PBF
LTC2471CMS#PBF
LTC2471IMS#PBF
LTC2473CDD#PBF
LTC2473IDD#PBF
LTC2473CMS#PBF
LTC2473IMS#PBF
TAPE AND REEL
LTC2471CDD#TRPBF
LTC2471IDD#TRPBF
LTC2471CMS#TRPBF
LTC2471IMS#TRPBF
LTC2473CDD#TRPBF
LTC2473IDD#TRPBF
LTC2473CMS#TRPBF
LTC2473IMS#TRPBF
PART MARKING*
LFPW
LFPW
2471
2471
LFPX
LFPX
2473
2473
PACKAGE DESCRIPTION
12-Lead Plastic (3mm × 3mm) DFN
12-Lead Plastic (3mm × 3mm) DFN
12-Lead Plastic MSOP
12-Lead Plastic MSOP
12-Lead Plastic (3mm × 3mm) DFN
12-Lead Plastic (3mm × 3mm) DFN
12-Lead Plastic MSOP
12-Lead Plastic MSOP
TEMPERATURE RANGE
0°C to 70°C
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
24713fb
2
For more information
www.linear.com/LTC2471
LTC2471/LTC2473
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 2)
PARAMETER
Resolution
Integral Nonlinearity
Offset Error
Offset Error Drift
Gain Error
Gain Error Drift
Transition Noise
Power Supply Rejection DC
l
l
elecTrical characTerisTics
CONDITIONS
MIN
l
l
l
TYP
16
2
8
±1
0.05
±0.01
0.15
3
80
MAX
8.5
16
±2.5
±0.25
UNITS
Bits
LSB
LSB
mV
LSB/°C
% of FS
LSB/°C
µV
RMS
dB
Output Rate 208sps (Note 4)
Output Rate 833sps (Note 4)
analog inpuTs
specifications are at T
A
= 25°C.
PARAMETER
SYMBOL
V
IN+
V
IN–
V
IN
V
OR+
, V
UR+
V
OR–
, V
UR–
C
IN
The
l
denotes the specifications which apply over the full operating temperature range, otherwise
CONDITIONS
LTC2473
LTC2473
LTC2471
V
IN–
= 0.625V
V
IN+
= 0.625V
V
IN
= GND (Note 8)
V
IN
= V
CC
(Note 8)
l
l
l
l
l
MIN
0
0
0
TYP
MAX
V
REF
V
REF
V
REF
UNITS
V
V
V
LSB
LSB
pF
Positive Input Voltage Range
Negative Input Voltage Range
Input Voltage Range
Overrange/Underrange Voltage, IN
+
Overrange/Underrange Voltage, IN–
IN
+
, IN
–
, IN Sampling Capacitance
8
8
0.35
–10
–10
1.247
±1
±1
50
l
I
DC_LEAK(IN+, IN–, IN)
IN
+
, IN
–
DC Leakage Current (LTC2473)
IN DC Leakage Current (LTC2471)
I
CONV
V
REF
Input Sampling Current (Notes 5, 8)
Reference Output Voltage
Reference Voltage Coefficient
10
10
1.253
±10
nA
nA
nA
V
ppm/°C
ppm/°C
dB
mA
µA
mV/mA
nV/√Hz
1.25
±2
±5
–90
(Note 9)
C-Grade
I-Grade
2.7V ≤ V
CC
≤ 5.5V
V
CC
= 5.5, Forcing Output to GND (Note 8)
V
CC
= 5.5, Forcing Output to GND (Note 8)
2.7V ≤ V
CC
≤ 5.5V, I
OUT
= 100μA Sourcing
,
,
C
COMP
= 0.1μF C
REFOUT
= 0.1μF At f =
1ksps
l
Reference Line Regulation
Reference Short-Circuit Current
COMP Pin Short-Circuit Current
Reference Load Regulation
Reference Output Noise Density
l
l
35
200
3.5
30
The
l
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C.
SYMBOL
V
CC
I
CC
PARAMETER
Supply Voltage
Supply Current
Conversion
Conversion
Nap
Sleep
LTC2473 (Note 8)
LTC2471 (Note 8)
(Note 8)
(Note 8)
CONDITIONS
l
l
l
l
l
power requireMenTs
MIN
2.7
TYP
MAX
5.5
UNITS
V
mA
mA
µA
µA
3.5
2.5
800
0.2
5
4
1500
2
24713fb
For more information
www.linear.com/LTC2471
3
LTC2471/LTC2473
i
2
c inpuTs anD ouTpuTs
SYMBOL
V
IH
V
IL
I
I
V
HYS
V
OL
I
IN
C
I
C
B
V
IH(A0)
V
IL(A0)
PARAMETER
High Level Input Voltage
Low Level Input Voltage
Digital Input Current
Hysteresis of Schmidt Trigger Inputs
Low Level Output Voltage (SDA)
Input Leakage
Capacitance for Each I/O Pin
Capacitance Load for Each Bus Line
High Level Input Voltage for Address Pin
Low Level Input Voltage for Address Pin
(Note 8)
(Note 3)
I = 3mA
0.1V
CC
≤ V
IN
≤ 0.9V
CC
The
l
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Notes 2, 7)
CONDITIONS
l
l
l
l
l
l
l
l
l
l
MIN
0.7V
CC
TYP
MAX
0.3V
CC
UNITS
V
V
µA
V
V
µA
pF
pF
V
V
–10
0.05V
CC
10
0.4
1
10
400
0.95V
CC
0.05V
CC
i
2
c TiMing characTerisTics
SYMBOL
t
CONV1
t
CONV2
f
SCL
t
HD(SDA,STA)
t
LOW
t
HIGH
t
SU(STA)
t
HD(DAT)
t
SU(DAT)
t
r
t
f
t
SU(STO)
t
BUF
t
OF
t
SP
PARAMETER
Conversion Time
Conversion Time
SCL Clock Frequency
Hold Time (Repeated) START Condition
LOW Period of the SCL Pin
HIGH Period of the SCL Pin
Set-Up Time for a Repeated START
Condition
Data Hold Time
Data Set-Up Time
Rise Time for SDA, SCL Signals
Fall Time for SDA, SCL Signals
Set-Up Time for STOP Condition
Bus Free Time Between a STOP and
START Condition
Output Fall Time V
IHMIN
to V
ILMAX
Input Spike Suppression
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Notes 2, 7)
CONDITIONS
SPD = 0
SPD = 1
l
l
l
l
l
l
l
l
l
MIN
TYP
4
1
MAX
4.8
1.2
400
UNITS
ms
ms
kHz
µs
µs
µs
µs
0
0.6
1.3
0.6
0.6
0
100
20 + 0.1C
B
20 + 0.1C
B
0.6
1.3
20 + 0.1C
B
0.9
300
300
µs
ns
ns
ns
µs
µs
(Note 6)
(Note 6)
l
l
l
l
Bus Load C
B
= 10pF to 400pF (Note 6)
l
l
250
50
ns
ns
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2.
All voltage values are with respect to GND. V
CC
= 2.7V to 5.5V
unless otherwise specified.
V
REFCM
= V
REF
/2, FS = V
REF
, –V
REF
≤ V
IN
≤ V
REF
V
IN
= V
IN+
– V
IN –
, V
INCM
= (V
IN+
+ V
IN –
)/2. (LTC2473)
Note 3.
Guaranteed by design, not subject to test.
Note 4.
Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
Note 5:
Input sampling current is the average input current drawn from
the input sampling network while the LTC2471/LTC2473 are converting.
Note 6:
C
B
= capacitance of one bus line in pF.
Note 7:
All values refer to V
IH(MIN
) and V
IL(MAX)
levels.
Note 8:
A positive current is flowing into the DUT pin.
Note 9:
Voltage temperature coefficient is calculated by dividing the
maximum change in output voltage by the specified temperature range.
FPGA/CPLD
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