Si4730/31-C40
B
ROADCAST
AM/FM R
ADIO
R
ECEIVER
Features
Worldwide FM band support
EN55020 compliant
No manual alignment necessary
Programmable reference clock
Volume control
Adjustable soft mute control
RDS/RBDS processor (Si4731)
Optional digital audio out (Si4731)
2-wire and 3-wire control interface
Integrated LDO regulator
2.0 to 5.5 V supply voltage (SSOP)
2.7 to 5.5 V supply voltage (QFN)
Wide range of ferrite loop sticks and
GPO3/DCLK
17
10
VIO
24
23
22
21
20
19
18
17
16
15
14
13
LOUT
ROUT
DBYP
VDD
VIO
RCLK
SDIO
SCLK
SEN
RST
GND
GND
(64–108 MHz)
Worldwide AM band support
(520–1710 kHz)
Excellent real-world performance
Freq synthesizer with integrated VCO
Advanced AM/FM seek tuning
Automatic frequency control (AFC)
Automatic gain control (AGC)
Digital FM stereo decoder
Programmable AVC max gain
Programmable de-emphasis
Seven selectable AM channel filters
AM/FM digital tuning
Ordering Information:
See page 31.
Pin Assignments
Si4730/31 (QFN)
GPO2/INT
GPO1
air loop antennas supported
QFN and SSOP packages
RoHS compliant
NC
Applications
1
20
19
18
16
15 DOUT
Table and portable radios
Stereos
Mini/micro systems
CD/DVD players
Boom boxes
Modules
Clock radios
Mini HiFi
Entertainment systems
FMI 2
RFGND 3
AMI 4
RST 5
6
SEN
7
SCLK
8
SDIO
9
RCLK
GND
PAD
11 VDD
Description
The Si4730/31 is the first digital CMOS AM/FM radio receiver IC that integrates
the complete tuner function from antenna input to audio output.
Si4730/31 (SSOP)
DOUT
DFS
GPO3/DCLK
GPO2/INT
1
2
3
4
5
6
7
8
9
10
11
12
Functional Block Diagram
Si473x
AMI
AM
ANT
RFGND
LNA
AGC
ADC
FMI
LNA
AGC
2.7– 5.5 V (QFN)
2.0– 5.5 V (SSOP) VDD
GND
LDO
AFC
ADC
DSP
DAC
LOUT
RDS
(Si4731)
LOW-IF
DIGITAL
AUDIO
(Si4731)
DOUT
DFS
GPO/DCLK
GPO1
NC
NC
FMI
RFGND
NC
FM
ANT
DAC
ROUT
NC
AMI
CONTROL
INTERFACE
VIO
1.85–3.6 V
This product, its features, and/or its
architecture is covered by one or more of
the following patents, as well as other
patents, pending and issued, both
foreign and domestic: 7,127,217;
7,272,373;
7,272,375;
7,321,324;
7,355,476;
7,426,376;
7,471,940;
7,339,503; 7,339,504.
SEN
Rev. 1.0 12/09
Copyright © 2009 by Silicon Laboratories
RCLK
SCLK
SDIO
RST
Si4730/31-C40
DFS
14 LOUT
13 ROUT
12 GND
NC
Si4730/31-C40
T
ABLE
Section
OF
C
ONTENTS
Page
1. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
2. Typical Application Schematic (QFN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3. Typical Application Schematic (SSOP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
4. Bill of Materials (QFN/SSOP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5. Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.1. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.2. Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
5.3. FM Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
5.4. AM Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
5.5. Digital Audio Interface (Si4731 Only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
5.6. Stereo Audio Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.7. De-emphasis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.8. Stereo DAC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
5.9. Soft Mute . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.10. RDS/RBDS Processor (Si4731 Only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
5.11. Tuning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.12. Seek . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.13. Reference Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.14. Control Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.15. GPO Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
5.16. Firmware Upgrades . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
5.17. Reset, Powerup, and Powerdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
5.18. Programming with Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
6. Commands and Properties . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
7. Pin Descriptions: Si4730/31-GM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
8. Pin Descriptions: Si4730/31-GU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
9. Ordering Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
10. Package Markings (Top Marks) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
10.1. Si4730/31 Top Mark (QFN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
10.2. Top Mark Explanation (QFN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
10.3. Si4730/31 Top Mark (SSOP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
10.4. Top Mark Explanation (SSOP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
11. Package Outline: Si4730/31 QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
12. PCB Land Pattern: Si4730/31 QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
13. Package Outline: Si4730/31 SSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
14. PCB Land Pattern: Si4730/31 SSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
15. Additional Reference Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Document Change List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40
Contact Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42
Rev. 1.0
3
Si4730/31-C40
1. Electrical Specifications
Table 1. Recommended Operating Conditions
1
Parameter
Supply Voltage
2
Interface Supply Voltage
Power Supply Powerup Rise Time
Interface Power Supply Powerup Rise Time
Ambient Temperature
Symbol
V
DD
V
IO
V
DDRISE
V
IORISE
T
A
Test Condition
Min
2.7
1.85
10
10
–20
Typ
—
—
—
—
25
Max
5.5
3.6
—
—
85
Unit
V
V
µs
µs
C
Note:
1.
All minimum and maximum specifications apply across the recommended operating conditions. Typical values apply at
V
DD
= 3.3 V and 25
C
unless otherwise stated.
2.
SSOP devices operate down to V
DD
= 2 V at 25 °C.
Table 2. Absolute Maximum Ratings
1,2
Parameter
Supply Voltage
Interface Supply Voltage
Input Current
3
Input Voltage
3
Operating Temperature
Storage Temperature
RF Input Level
4
Symbol
V
DD
V
IO
I
IN
V
IN
T
OP
T
STG
Value
–0.5 to 5.8
–0.5 to 3.9
10
–0.3 to (V
IO
+ 0.3)
–40 to 95
–55 to 150
0.4
Unit
V
V
mA
V
C
C
V
PK
Notes:
1.
Permanent device damage may occur if the above Absolute Maximum Ratings are exceeded. Functional operation
should be restricted to the conditions as specified in the operational sections of this data sheet. Exposure beyond
recommended operating conditions for extended periods may affect device reliability.
2.
The Si4730/31 devices are high-performance RF integrated circuits with certain pins having an ESD rating of < 2 kV
HBM. Handling and assembly of these devices should only be done at ESD-protected workstations.
3.
For input pins SCLK, SEN, SDIO, RST, RCLK, DCLK, DFS, GPO1, GPO2, and GPO3.
4.
At RF input pins, FMI and AMI.
4
Rev. 1.0
Si4730/31-C40
Table 3. DC Characteristics
(V
DD
= 2.7 to 5.5 V, V
IO
= 1.85 to 3.6 V, T
A
= –20 to 85 °C)
Parameter
FM Mode
Supply Current
1
Supply Current
2
RDS Supply Current
1
AM Mode
Supply Current
1
Supplies and Interface
Interface Supply Current
V
DD
Powerdown Current
V
IO
Powerdown Current
High Level Input Voltage
3
Low Level Input Voltage
3
High Level Input Current
3
Low Level Input Current
3
High Level Output Voltage
4
Low Level Output Voltage
4
Symbol
Test Condition
Min
Typ
Max
Unit
I
FM
I
FM
I
FM
Low SNR level
—
—
—
19.2
19.9
19.2
22
23
23
mA
mA
mA
I
AM
Analog Output Mode
—
15.4
20.5
mA
I
IO
I
DDPD
I
IOPD
V
IH
V
IL
I
IH
I
IL
V
OH
V
OL
V
IN
= V
IO
= 3.6 V
V
IN
= 0 V,
V
IO
= 3.6 V
I
OUT
= 500 µA
I
OUT
= –500 µA
SCLK, RCLK inactive
—
—
—
0.7 x V
IO
–0.3
–10
–10
0.8 x V
IO
—
320
10
1
—
—
—
—
—
—
600
20
10
V
IO
+ 0.3
0.3 x V
IO
10
10
—
0.2 x V
IO
µA
µA
µA
V
V
µA
µA
V
V
Notes:
1.
Specifications are guaranteed by characterization.
2.
LNA is automatically switched to higher current mode for optimum sensitivity in weak signal conditions.
3.
For input pins SCLK, SEN, SDIO, RST, RCLK, DCLK, DFS, GPO1, GPO2, and GPO3.
4.
For output pins SDIO, DOUT, GPO1, GPO2, and GPO3.
Rev. 1.0
5
嵌入式系统
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
