8GB (x72, QR) 240-Pin DDR2 SDRAM FBDIMM
Features
DDR2 SDRAM FBDIMM
MT72HTS1G72FZ – 8GB
Features
• 240-pin, DDR2 fully buffered DIMM (FBDIMM)
• Fast data transfer rates: PC2-4200, PC2-5300, or
PC2-6400
• 8GB (1 Gig x 72)
• 3.2 Gb/s, 4 Gb/s, and 4.8 Gb/s link transfer rates
• High-speed, 1.5V differential, point-to-point link
between host memory controller and the advanced
memory buffer (AMB)
• Fault-tolerant; can work around a bad bit lane in
each direction
• High-density scaling with up to eight FBDIMM
devices per channel
• SMBus interface to AMB for configuration register
access
• In-band and out-of-band command access
• Deterministic protocol
– Enables memory controller to optimize DRAM
accesses for maximum performance
– Delivers precise control and repeatable
memory behavior
• Automatic DDR2 SDRAM bus and channel
calibration
• Transmitter de-emphasis to reduce ISI
• MBIST and IBIST test functions
• Transparent mode for DRAM test support
Table 1: Key Timing Parameters
Speed
Grade
-80E
-667
-53E
Industry
Nomenclature
PC2-6400
PC2-5300
PC2-4200
Data Rate (MT/s)
CL = 6
800
–
–
CL = 5
800
667
–
CL = 4
533
553
553
CL = 3
400
400
400
t
RCD
t
RP
t
RC
Figure 1: 240-Pin FBDIMM (MO-256)
Module height: 30.35mm (1.19in)
Options
• Package
– 240-pin DIMM (halogen-free)
• Frequency/CAS latency
– 2.5ns @ CL = 5 (DDR2-800)
– 3.0ns @ CL = 5 (DDR2-667)
Marking
Z
-80E
-667
Features (Continued)
• V
DD
= V
DDQ
= 1.8V for DRAM
• V
REF
= 0.9V SDRAM command and address
termination
• V
CC
= 1.5V for AMB
• V
DDSPD
= 3–3.6V for AMB and EEPROM
• Serial presence-detect (SPD) EEPROM
• Gold edge contacts
• Full module heat spreader
• Halogen-free
• Quad rank, using 2Gb TwinDie™ devices
• Supports 95°C operation with 2x refresh
(ns)
12.5
15
15
(ns)
12.5
15
15
(ns)
55
55
55
PDF: 09005aef840ecabe
hts72c1gx72fz.pdf - Rev. B 4/14 EN
1
Products and specifications discussed herein are subject to change by Micron without notice.
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2010 Micron Technology, Inc. All rights reserved.
8GB (x72, QR) 240-Pin DDR2 SDRAM FBDIMM
Features
Table 2: Addressing
Parameter
Refresh count
Device bank address
Device configuration
Row address
Column address
Module rank address
8GB
8K
8 BA[2:0]
2Gb TwinDie (512 Meg x 4)
16K A[13:0]
2K A[11, 9:0]
4 S#[3:0]
Table 3: Part Numbers and Timing Parameters – 8GB
Base device: MT47H512M4,
1
2Gb TwinDie DDR2 SDRAM
Module
Density
8GB
8GB
Module
Configuration Bandwidth
1 Gig x 72
1 Gig x 72
6.4 GB/s
5.3 GB/s
Memory
Clock/
Data Rate
2.5ns/800 MT/s
3.0ns/667 MT/s
Clock Cycles Link Transfer
(CL-
t
RCD-
t
RP)
Rate
5-5-5
5-5-5
4.8 GT/s
4.0 GT/s
Part
Number
2
MT72HTS1G72FZ-80E__
MT72HTS1G72FZ-667__
Notes:
1. The data sheet for the base device can be found on Micron’s Web site.
2. All part numbers end with a four-place code (not shown) that designates component, PCB, and AMB revi-
sions. Consult factory for current revision codes. Example: MT72HTS1G72FZ-80EM1D6.
PDF: 09005aef840ecabe
hts72c1gx72fz.pdf - Rev. B 4/14 EN
2
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2010 Micron Technology, Inc. All rights reserved.
8GB (x72, QR) 240-Pin DDR2 SDRAM FBDIMM
Pin Assignments and Descriptions
Pin Assignments and Descriptions
Table 4: Pin Assignments
240-Pin FBDIMM Front
Pin Symbol Pin Symbol Pin Symbol Pin Symbol
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
V
DD
V
DD
V
DD
V
SS
V
DD
V
DD
V
DD
V
SS
V
CC
V
CC
V
SS
V
CC
V
CC
V
SS
V
TT
NC
RESET#
V
SS
NC
NC
V
SS
PN0
PN0#
V
SS
PN1
PN1#
V
SS
PN2
PN2#
V
SS
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
PN3
PN3#
V
SS
PN4
PN4#
V
SS
PN5
PN5#
V
SS
PN13
1
PN13#
1
V
SS
V
SS
NC
NC
V
SS
V
SS
PN12
1
PN12#
1
V
SS
PN6
PN6#
V
SS
PN7
PN7#
V
SS
PN8
PN8#
V
SS
PN9
Note:
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
PN9#
V
SS
PN10
PN10#
V
SS
PN11
PN11#
V
SS
V
SS
PS0
PS0#
V
SS
PS1
PS1#
V
SS
PS2
PS2#
V
SS
PS3
PS3#
V
SS
PS4
PS4#
V
SS
V
SS
NC
NC
V
SS
V
SS
PS9
1
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
PS9#
1
V
SS
PS5
PS5#
V
SS
PS6
PS6#
V
SS
PS7
PS7#
V
SS
PS8
PS8#
V
SS
NC
NC
V
SS
V
DD
V
DD
V
SS
V
DD
V
DD
V
DD
V
SS
V
DD
V
DD
V
TT
SA2
SDA
SCL
Pin Symbol
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
V
DD
V
DD
V
DD
V
SS
V
DD
V
DD
V
DD
V
SS
V
CC
V
CC
V
SS
V
CC
V
CC
V
SS
V
TT
NC
M_TEST
(DNU)
V
SS
NC
NC
V
SS
SN0
SN0#
V
SS
SN1
SN1#
V
SS
SN2
SN2#
V
SS
240-Pin FBDIMM Back
Pin Symbol Pin Symbol Pin Symbol
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
SN3
SN3#
V
SS
SN4
SN4#
V
SS
SN5
SN5#
V
SS
SN13
1
SN13#
1
V
SS
V
SS
NC
NC
V
SS
V
SS
SN12
1
SN12#
1
V
SS
SN6
SN6#
V
SS
SN7
SN7#
V
SS
SN8
SN8#
V
SS
SN9
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
SN9#
V
SS
SN10
SN10#
V
SS
SN11
SN11#
V
SS
V
SS
SS0
SS0#
V
SS
SS1
SS1#
V
SS
SS2
SS2#
V
SS
SS3
SS3#
V
SS
SS4
SS4#
V
SS
V
SS
NC
NC
V
SS
V
SS
SS9
1
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
SS9#
1
V
SS
SS5
SS5#
V
SS
SS6
SS6#
V
SS
SS7
SS7#
V
SS
SS8
SS8#
V
SS
NC
NC
V
SS
SCK
SCK#
V
SS
V
DD
V
DD
V
DD
V
SS
V
DD
V
DD
V
TT
V
DDSPD
SA0
SA1
1. The following signals are cyclical redundancy code (CRC) bits and thus appear out of the
normal sequence: PN12/PN12#, SN12/SN12#, PN13/PN13#, SN13/SN13#, PS9/PS9#, and
SS9/SS9#.
PDF: 09005aef840ecabe
hts72c1gx72fz.pdf - Rev. B 4/14 EN
3
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2010 Micron Technology, Inc. All rights reserved.
8GB (x72, QR) 240-Pin DDR2 SDRAM FBDIMM
Pin Assignments and Descriptions
Table 5: Pin Descriptions
Symbol
PS[9:0]
PS#[9:0]
SCK
SCK#
SCL
SS[9:0]
SS#[9:0]
PN[13:0]
PN#[13:0]
SN[13:0]
SN#[13:0]
SA[2:0]
SDA
RESET#
V
CC
V
DD
V
TT
V
DDSPD
V
SS
M_TEST
Type
Input
Input
Input
Input
Input
Input
Input
Output
Output
Output
Output
I/O
I/O
Supply
Supply
Supply
Supply
Supply
Supply
–
Description
Primary southbound data, positive lines.
Primary southbound data, negative lines.
System clock input, positive line.
System clock input, negative line.
Serial presence-detect (SPD) EEPROM clock input.
Secondary southbound data, positive lines.
Secondary southbound data, negative lines.
Primary northbound data, positive lines.
Primary northbound data, negative lines.
Secondary northbound data, positive lines.
Secondary northbound data, negative lines.
SPD address inputs, also used to select the FBDIMM number in the AMB.
SPD data input/output.
AMB reset signal.
AMB core power and AMB channel interface power (1.5V).
DRAM power and AMB DRAM I/O power (1.8V).
DRAM clock, command, and address termination power (V
DD
/2).
SPD/AMB SMBus power (3.3V).
Ground.
The M_TEST pin provides an external connection for testing the margin of V
REF
, which is pro-
duced by a voltage divider on the module. It is not intended to be used in normal system op-
eration and must not be connected (DNU) in a system. This test pin may have other features
on future card designs and will be included in this specification at that time.
Do not use.
No connect: These pins are not connected on the module.
DNU
NC
–
–
PDF: 09005aef840ecabe
hts72c1gx72fz.pdf - Rev. B 4/14 EN
4
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2010 Micron Technology, Inc. All rights reserved.
8GB (x72, QR) 240-Pin DDR2 SDRAM FBDIMM
System Block Diagram
System Block Diagram
Figure 2: System Block Diagram
DDR2 connector with unique key
DDR2
component
DDR2
component
DDR2
component
DDR2
component
DDR2
component
DDR2
component
DDR2
component
DDR2
component
DDR2
component
DDR2
component
DDR2
component
Commodity
DDR2 SDRAM
devices
DDR2
component
DDR2
component
DDR2
component
10
DDR2
component
Up to 8 modules
DDR2
component
AMB
Memory
controller
14
DDR2
component
DDR2
component
DDR2
component
AMB
DDR2
component
DDR2
component
DDR2
component
DDR2
component
AMB
DDR2
component
DDR2
component
DDR2
component
DDR2
component
• • •
AMB
DDR2
component
DDR2
component
DDR2
component
DDR2
component
SMBus
DDR2
component
CK
source
Common clock source
SMBus access
to buffer registers
PDF: 09005aef840ecabe
hts72c1gx72fz.pdf - Rev. B 4/14 EN
5
Micron Technology, Inc. reserves the right to change products or specifications without notice.
©
2010 Micron Technology, Inc. All rights reserved.
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