TSZ181, TSZ182
Datasheet
Very high accuracy (25 µV) high bandwidth (3 MHz) zero drift 5 V operational
amplifiers
Features
•
DFN6 1.2x1.3
(TSZ181)
SOT23-5
(TSZ181)
DFN8 2x2
(TSZ182)
MiniSO8
(TSZ182)
SO8
(TSZ182)
•
•
•
•
•
•
•
•
Very high accuracy and stability: offset voltage 25 µV max. at 25 °C, 35 µV over
full temperature range (-40 °C to 125 °C)
Rail-to-rail input and output
Low supply voltage: 2.2 - 5.5 V
Low power consumption: 1 mA max. at 5 V
Gain bandwidth product: 3 MHz
Automotive qualification
Extended temperature range: -40 to 125 °C
Micropackages: DFN8 2x2, SO8 and MiniSO8
Benefits:
–
Higher accuracy without calibration
–
Accuracy virtually unaffected by temperature change
Applications
•
•
•
High accuracy signal conditioning
Automotive current measurement and sensor signal conditioning
Medical instrumentation
Description
Maturity status link
TSZ181
TSZ182
Related products
TSZ121
TSZ122
TSZ124
TSV711
TSV731
For zero drift
amplifiers with more
power savings
(400 kHz for 40 μA)
For continuous-time
precision amplifiers
The
TSZ181, TSZ182
are single and dual operational amplifiers featuring very low
offset voltages with virtually zero drift versus temperature changes.
The
TSZ181, TSZ182
offer rail-to-rail input and output, excellent speed/power
consumption ratio, and 3 MHz gain bandwidth product, while consuming just 1 mA at
5 V. The device also features an ultra-low input bias current.
These features make the TSZ18x ideal for high-accuracy high-bandwidth sensor
interfaces.
DS11863
-
Rev 5
-
August 2018
For further information contact your local STMicroelectronics sales office.
www.st.com
TSZ181, TSZ182
Package pin connections
1
Package pin connections
Figure 1.
Pin connections for each package (top view)
SOT23-5 (TSZ181)
DFN6 1.2x1.3 (TSZ181)
DFN8 2x2 (TSZ182)
1.
MiniSO8 and SO8 (TSZ182)
The exposed pad of the DFN8 2x2 can be connected to V
CC-
or left floating.
DS11863
-
Rev 5
page 2/43
TSZ181, TSZ182
Absolute maximum ratings and operating conditions
2
Absolute maximum ratings and operating conditions
Table 1.
Absolute maximum ratings (AMR)
Symbol
V
CC
V
id
V
in
I
in
T
stg
T
j
Parameter
Supply voltage
(1)
Differential input voltage
(2)
Input voltage
(3)
Input current
(4)
Storage temperature
Maximum junction temperature
DFN8 2x2
DFN6 1.2x1.3
R
thja
Thermal resistance junction-to-ambient
(5) (6)
SOT23-5
MiniSO8
SO8
ESD
HBM: human body model
(7)
CDM: charged device model
(8)
Latch-up immunity
1. All voltage values, except differential voltage, are with respect to network ground terminal.
2. The differential voltage is the non-inverting input terminal with respect to the inverting input terminal.
3. V
CC
- V
in
must not exceed 6 V, V
in
must not exceed 6 V.
4. Input current must be limited by a resistor in series with the inputs.
5. R
th
are typical values.
6. Short-circuits can cause excessive heating and destructive dissipation.
7. Human body model: 100 pF discharged through a 1.5 kΩ resistor between two pins of the device, done for all couples of pin
combinations with other pins floating.
8. Charged device model: all pins plus package are charged together to the specified voltage and then discharged directly to
ground.
Value
6
±V
CC
(V
CC -
) - 0.2 to (V
CC +
) + 0.2
10
-65 to 150
150
57
232
250
190
125
4
1.5
200
kV
mA
°C/W
mA
°C
V
Unit
Table 2.
Operating conditions
Symbol
V
CC
V
icm
T
oper
Parameter
Supply voltage
Common mode input voltage range
Operating free-air temperature range
Value
2.2 to 5.5
(V
CC -
) - 0.1 to (V
CC +
) + 0.1
-40 to 125
Unit
V
°C
DS11863
-
Rev 5
page 3/43
TSZ181, TSZ182
Electrical characteristics
3
Electrical characteristics
Table 3.
Electrical characteristics at V
CC+
= 2.2 V with V
CC-
= 0 V, V
icm
= V
CC
/2, T = 25 °C, and R
L
= 10 kΩ connected to
V
CC
/2 (unless otherwise specified)
Symbol
Parameter
Conditions
DC performance
V
io
ΔV
io
/ΔT
I
ib
Input offset voltage
Input offset voltage drift
(1)
Input bias current (V
out
= V
CC
/2)
T = 25 °C
-40 °C < T< 125 °C
-40 °C < T< 125 °C
T = 25 °C
-40 °C < T< 125 °C
T = 25 °C
-40 °C < T< 125 °C
T = 25 °C
-40 °C < T< 125 °C
T = 25 °C
-40 °C < T< 125 °C
T = 25 °C
-40 °C < T< 125 °C
T = 25 °C
-40 °C < T< 125 °C
T = 25 °C
-40 °C < T< 125 °C
T = 25 °C
-40 °C < T< 125 °C
T = 25 °C
-40 °C < T< 125 °C
T = 25 °C
-40 °C < T< 125 °C
AC performance
T = 25 °C, R
L
= 10 kΩ,
GBP
Gain bandwidth product
C
L
= 100 pF
-40 °C < T< 125 °C,
R
L
= 10 kΩ, C
L
= 100 pF
Φ
m
G
m
SR
t
s
Phase margin
Gain margin
Slew rate
(3)
Settling time
R
L
= 10 kΩ, C
L
= 100 pF
T = 25 °C
-40 °C < T< 125 °C
To 0.1%, V
in
= 0.8 Vpp
3
2.5
500
1.6
2.3
MHz
1.2
59
16
4.6
degrees
dB
V/µs
ns
4
2.5
3.5
2
0.7
1
1.2
4
mA
6
10
96
94
102
100
112
100
15
40
70
30
70
mV
130
120
dB
115
60
30
3.5
35
45
0.1
200
(2)
300
(2)
400
(2)
600
(2)
pA
µV
µV/°C
Min.
Typ.
Max.
Unit
I
io
Input offset current (V
out
= V
CC
/2)
Common-mode rejection ratio, 20 log (ΔV
icm
/
ΔV
io
), V
ic
= 0 V to V
CC
, V
out
= V
CC
/2,
R
L
> 1 MΩ
Common mode rejection ratio, 20 log (ΔV
icm
/
ΔV
io
), V
ic
= 1.1 V to V
CC
, V
out
= V
CC
/2,
R
L
> 1 MΩ
Large signal voltage gain, V
out
= 0.5 V to
(V
cc
- 0.5 V)
High-level output voltage, V
OH
= V
cc
- V
out
CMR1
CMR3
A
vd
V
OH
V
OL
Low-level output voltage
I
sink
(V
out
= V
CC
)
I
out
I
source
(V
out
= 0 V)
Supply current (per channel, V
out
= V
CC
/2,
R
L
> 1 MΩ)
I
CC
DS11863
-
Rev 5
page 4/43
TSZ181, TSZ182
Electrical characteristics
Symbol
e
n
e
n-pp
C
s
t
init
Parameter
Equivalent input noise voltage density
Voltage noise
Channel separation
Initialization time, G = 100
(4)
Conditions
f = 1 kHz
f = 10 kHz
f = 0.1 to 10 Hz
f = 1 kHz
T = 25 °C
-40 °C < T< 125 °C
Min.
Typ.
50
50
0.6
120
60
100
Max.
Unit
nV/√Hz
µVpp
dB
µs
1. See
Section 5.5 Input offset voltage drift over temperature.
Input offset measurements are performed on
x100 gain configuration. The amplifiers and the gain setting resistors are at the same temperature.
2. Guaranteed by design.
3. Slew rate value is calculated as the average between positive and negative slew rates.
4. Initialization time is defined as the delay between the moment when supply voltage exceeds 2.2 V and
output voltage stabilization
Table 4.
Electrical characteristics at V
CC+
= 3.3 V with V
CC-
= 0 V, V
icm
= V
CC
/2, T = 25 °C, and R
L
= 10 kΩ connected to
V
CC
/2 (unless otherwise specified)
Symbol
Parameter
Conditions
DC performance
V
io
ΔV
io
/ΔT
I
ib
Input offset voltage
Input offset voltage drift
(1)
Input bias current (V
out
= V
CC
/2)
T = 25 °C
-40 °C < T< 125 °C
-40 °C < T< 125 °C
T = 25 °C
-40 °C < T< 125 °C
T = 25 °C
-40 °C < T< 125 °C
V
ic
= 0 V to V
CC
,
CMR1
Common mode rejection ratio, 20 log (ΔV
icm
/
ΔV
io
), V
out
= V
CC
/2, R
L
> 1 MΩ
T = 25 °C
V
ic
= 0 V to V
CC
,
-40 °C < T< 125 °C
V
ic
= 0 V to V
CC
- 1.8 V,
CMR2
Common mode rejection ratio, 20 log (ΔV
icm
/
ΔV
io
), V
out
= V
CC
/2, R
L
> 1 MΩ
T = 25 °C
V
ic
= 0 V to V
CC
- 2 V,
-40 °C < T< 125 °C
A
vd
Large signal voltage gain, V
out
= 0.5 V to
(V
CC
- 0.5 V)
High-level output voltage, V
OH
= V
cc
- V
out
T = 25 °C
-40 °C < T< 125 °C
T = 25 °C
-40 °C < T< 125 °C
T = 25 °C
-40 °C < T< 125 °C
11
104
120
60
30
2
30
40
0.1
200
(2)
300
(2)
400
(2)
600
(2)
pA
µV
µV/°C
Min.
Typ.
Max.
Unit
I
io
Input offset current (V
out
= V
CC
/2)
102
106
132
dB
106
120
110
16
40
70
30
70
mV
138
V
OH
V
OL
Low-level output voltage
DS11863
-
Rev 5
page 5/43
stm32/stm8
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