EXPOSED PAD (PIN 13) PCB CONNECTION TO GND IS OPTIONAL
ORDER INFORMATION
LEAD FREE FINISH
LTC4315CDE#PBF
LTC4315IDE#PBF
LTC4315CMS#PBF
LTC4315IMS#PBF
TAPE AND REEL
LTC4315CDE#TRPBF
LTC4315IDE#TRPBF
LTC4315CMS#TRPBF
LTC4315IMS#TRPBF
PART MARKING*
4315
4315
4315
4315
PACKAGE DESCRIPTION
12-Lead (4mm × 3mm) DFN
12-Lead (4mm × 3mm) DFN
12-Lead Plastic MSOP
12-Lead Plastic MSOP
TEMPERATURE RANGE
0°C to 70°C
–40°C to 85°C
0°C to 70°C
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
4315f
2
LTC4315
ELECTRICAL CHARACTERISTICS
SYMBOL
V
CC
V
DD,BUS
V
CC2
I
CC
I
CC(DISABLED)
I
CC2
I
CC2(DISABLED)
V
TH_UVLO
PARAMETER
Input Supply Voltage
2-Wire Bus Supply Voltage
Output Side Accelerator
Supply Voltage
Input Supply Current
Input Supply Current
V
CC2
Supply Current
V
CC2
Supply Current
V
CC
UVLO Threshold
V
ENABLE
= V
CC
= V
CC2
= 5.5V, V
SDAIN,SCLIN
= 0V (Note 4)
V
ENABLE
= 0V, V
CC
= V
CC2
= 5.5V, V
SDAIN,SCLIN
= 0V
V
ENABLE
= V
CC
= V
CC2
= 5.5V, V
SDAIN,SCLIN
= 0V (Note 4)
V
ENABLE
= 0V, V
CC
= V
CC2
= 5.5V, V
SDAIN,SCLIN
= 0V
V
CC
Rising
(Note 3)
CONDITIONS
l
l
l
l
l
l
l
l
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
CC
= V
CC2
= 3.3V unless otherwise noted.
MIN
2.9
1.4
2.25
6
2.3
0.2
0.15
2.55
8.1
3.3
0.31
0.25
2.7
200
SDA, SCL Pins Open
I
OL
= 4mA, Driven V
SDA,SCL
= 50mV
I
OL
= 500μA, Driven V
SDA,SCL
= 50mV
I
OL
= 4mA, Driven V
SDA,SCL
= 200mV
I
OL
= 500μA, Driven V
SDA,SCL
= 200mV
(Notes 5 and 6)
l
l
l
l
l
l
TYP
MAX
5.5
5.5
5.5
10
4.3
0.4
0.35
2.85
UNITS
V
V
V
mA
mA
mA
mA
V
mV
Power Supply/Start-Up
V
CC_UVLO(HYST)
UVLO Threshold Hysteresis
Voltage
V
PRE
Buffers
V
OS(SAT)
V
OS
V
IL(FALLING)
V
IL(HYST)
I
LEAK
C
IN
dV
dt
(RTA)
V
RTA(TH)
ΔV
ACC
I
RTA
Buffer Offset Voltage
Buffer Offset Voltage
Buffer Input Logic Low
Voltage
V
IL
Hysteresis Voltage
Input Leakage Current
Input Capacitance
Minimum Slew Rate
Requirement
Rise Time Accelerator DC
Threshold Voltage
Buffers Off to Accelerator On
Voltage
SDA, SCL Pins = 5.5V, V
CC
= 5.5V, 0V
SDA, SCL Pins (Note 7)
SDA, SCL Pins, V
CC
= V
CC2
= 5V
V
CC
= V
CC2
= 5V (Note 5)
SDA, SCL Pins, V
CC
= V
CC2
= 5V (Note 5)
l
l
Precharge Voltage
0.8
100
15
50
15
1
190
60
120
60
1.2
280
120
180
115
V
mV
mV
mV
mV
V
mV
0.3 • V
MIN
0.33 • V
MIN
0.36 • V
MIN
50
±10
10
0.1
0.2
0.4
μA
pF
V/μs
V
V
Rise Time Accelerators
l
l
l
0.38 • V
MIN
0.41 • V
MIN
0.44 • V
MIN
0.05 • V
MIN
0.07 • V
MIN
Rise Time Accelerator Pull-Up SDA, SCL Pins
Current
ACC
Grounded, V
CC
= V
CC2
= 5V (Note 8)
ACC
Open, V
CC
= V
CC2
= 5V (Note 8)
l
l
l
l
l
l
l
l
15
1.5
1
1
0.2 • V
CC
0.7 • V
CC
25
2.5
1.4
1.4
0.1
0.3 • V
CC
0.8 • V
CC
±23
40
3.5
1.8
1.8
±1
0.4 • V
CC
0.9 • V
CC
±40
mA
mA
V
V
μA
V
V
μA
Enable/Control
V
EN(TH)
V
DISCEN(TH)
I
LEAK
V
ACC(L,TH)
V
ACC(H,TH)
I
ACC(IN,HL)
ENABLE Threshold Voltage
DISCEN Threshold Voltage
Input Leakage Current
ACC
Input Low Threshold
Voltage
ACC
Input High Threshold
Voltage
ACC
High, Low Input Current
DISCEN, ENABLE Pins, V
CC
= 5.5V
V
CC
= 5V
V
CC
= 5V
V
CC
= V
CC2
= 5V, V
ACC
= 5V, 0V
4315f
3
LTC4315
ELECTRICAL CHARACTERISTICS
SYMBOL
I
ACC(IN,
Z)
V
READY(OL)
I
READY(OH)
t
TIMEOUT
V
FAULT(OL)
I
FAULT(OH)
f
SCL(MAX)
t
PDHL
t
f
t
IDLE
PARAMETER
Allowable Leakage Current in
the Open State
READY Output Low Voltage
READY Off Leakage Current
Bus Stuck Low Timer
FAULT
Output Low voltage
FAULT
Off Leakage Current
I
2
C Frequency Max
SCL, SDA Fall Delay
SCL, SDA Fall Times
Bus Idle Time
V
CC
= V
CC2
= V
DD(BUS)
= 5V, C
BUS
= 100pF
,
R
BUS
= 10kΩ (Note 7)
V
CC
= V
CC2
= V
DD(BUS)
= 5V, C
BUS
= 100pF
,
R
BUS
= 10kΩ (Note 7)
l
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
CC
= V
CC2
= 3.3V unless otherwise noted.
CONDITIONS
V
CC
= V
CC2
= 5V
I
READY
= 3mA, V
CC
= 5V
V
CC
= V
READY
= 5V
SDAOUT or SCLOUT < 0.3 • V
MIN
(Note 5)
I
FAULT
= 3mA
V
CC
= V
FAULT
= 5V
l
l
l
l
l
l
l
MIN
TYP
MAX
±5
0.4
UNITS
μA
V
μA
ms
V
μA
kHz
0.1
35
45
0.1
400
130
20
55
95
±5
55
0.4
±5
Stuck Low Timeout Circuitry
I
2
C Interface Timing
250
300
175
ns
ns
μs
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
All currents into pins are positive and all voltages are referenced
to GND unless otherwise indicated.
Note 3:
The LTC4315 can level translate bus voltages ranging from
2.25V to 5.5V. In special cases, it can also level translate down to 1.4V.
See the Applications Information section for more details.
Note 4:
Test performed with SDA, SCL buffers active.
Note 5:
V
MIN
= minimum of V
CC
and V
CC2
if V
CC2
> 2.25V, otherwise
V
MIN
= V
CC
.
Note 6:
V
IL
is tested for the following (V
CC
, V
CC2
) combinations;
(2.9V, 5.5V), (5.5V, 2.25V), (3.3V, 3.3V) and (5V, 0V).
Note 7:
Guaranteed by design and not tested.
Note 8:
Measured in a special DC mode with V
SDA,SCL
= V
RTA(TH)
+ 1V.
The transient I
RTA
during rising edges, when
ACC
is LOW, will depend on
the bus loading condition and the slew rate of the bus. The LTC4315’s
internal slew rate control circuitry limits the maximum bus rise rate to
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