FEATURES
s
s
s
s
s
s
s
s
s
s
s
s
s
LTC1402
Serial 12-Bit, 2.2Msps
Sampling ADC with Shutdown
DESCRIPTIO
The LTC
®
1402 is a 12-bit, 2.2Msps sampling A/D con-
verter. This high performance device includes a high dy-
namic range sample-and-hold and a precision reference.
It operates from a single 5V supply or dual
±5V
supplies
and draws only 90mW from 5V.
The versatile differential input offers a unipolar range of
4.096V and a bipolar range of
±2.048V
for dual supply
systems where high performance op amps perform best,
eliminating the need for special translation circuitry.
The high common mode rejection allows users to elimi-
nate ground loops and common mode noise by measuring
signals differentially from the source.
Outstanding AC performance includes 72dB S/(N + D) and
–93dB SFDR at the Nyquist input frequency of 1.1MHz
with dual
±5V
supplies and –84dB SFDR with a single 5V
supply.
The LTC1402 has two power saving modes: Nap and
Sleep. Nap mode consumes only 15mW of power and can
wake up and convert immediately. In Sleep mode, it
typically consumes 10µW of power. Upon power-up from
Sleep mode, a reference ready (REFRDY) signal is avail-
able in the serial data word to indicate that the reference
has settled and the chip is ready to convert.
The 3-wire serial port allows compact and efficient data
transfer to a wide range of microprocessors, microcon-
trollers and DSPs. A digital output driver power supply pin
allows direct connection to 3V or lower logic.
Sample Rate: 2.2Msps
72dB S/(N + D) and –89dB THD at Nyquist
Power Dissipation: 90mW (Typ)
80MHz Full Power Bandwidth Sampling
No Missing Codes over Temperature
Available in 16-Pin Narrow SSOP Package
Single Supply 5V or
±5V
Operation
Nap Mode with Instant Wake-Up: 15mW
Sleep Mode: 10µW
True Differential Inputs Reject Common Mode Noise
Input Range (1mV/LSB): 0V to 4.096V or
±2.048V
Internal Reference Can Be Overdriven Externally
3-Wire Interface to DSPs and Processors (SPI and
MICROWIRE
TM
Compatible)
APPLICATIO S
s
s
s
s
s
s
s
s
Telecommunications
High Speed Data and Signal Acquisition
Digitally Multiplexed Data Acquisition Systems
Digital Radio Receivers
Spectrum Analysis
Low Power and Battery-Operated Systems
Handheld or Portable Instruments
Imaging Systems
, LTC and LT are registered trademarks of Linear Technology Corporation.
MICROWIRE is a trademark of National Semiconductor Corp.
BLOCK DIAGRA
10µF
A
IN+
A
IN–
V
REF
10µF
3
SAMPLE-
AND-HOLD
5V
1 AV
DD
12 DV
DD
3V OR 5V
11 OV
DD
5 Harmonic THD, 2nd, 3rd and SFDR
vs Input Frequency (Unipolar)
0
–10
–20
THD, SFDR, 2ND 3RD (dB)
12-BIT ADC
4
5
OUTPUT
BUFFER
10
D
OUT
–30
–40
–50
–60
–70
–80
–90
–100
–110
4.096V
64k
–
8
2.048
REFERENCE
2 AGND1
6 AGND2
TIMING
LOGIC
13 DGND
9 OGND
16
15
1402 TA01
GAIN
7
64k
LTC1402
14
+
BIP/UNI
CONV
SCK
V
SS
10µF
–5V OR 0V
–120
10
4
U
W
U
THD
SFDR
2ND
3RD
f
SAMPLE
= 2.22MHz
10
5
10
6
INPUT FREQUENCY (Hz)
10
7
1401 G05
1
LTC1402
ABSOLUTE
MAXIMUM
RATINGS
AV
DD
= DV
DD
= OV
DD
= V
DD
(Notes 1, 2)
PACKAGE/ORDER INFORMATION
TOP VIEW
AV
DD
1
AGND1 2
A
IN+
3
A
IN–
4
V
REF
5
AGND2 6
GAIN 7
BIP/UNI 8
16 CONV
15 SCK
14 VSS
13 DGND
12 DV
DD
11 0V
DD
10 D
OUT
9
OGND
Supply Voltage (V
DD
) ................................................. 6V
Negative Supply Voltage (V
SS
) ............................... – 6V
Total Supply Voltage (V
DD
to V
SS
) .......................... 12V
Analog Input Voltage
(Note 3) .......................... (V
SS
– 0.3V) to (V
DD
+ 0.3V)
Digital Input Voltage
(Note 4) .......................... (V
SS
– 0.3V) to (V
DD
+ 0.3V)
Digital Output Voltage ......... (V
SS
– 0.3V) to (V
DD
+ 0.3V)
Power Dissipation .............................................. 250mW
Operation Temperature Range
LTC1402C ............................................... 0°C to 70°C
LTC1402I ............................................ – 40°C to 85°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
ORDER PART
NUMBER
LTC1402CGN
LTC1402IGN
GN PART MARKING
1402
1402I
GN PACKAGE
16-LEAD NARROW PLASTIC SSOP
T
JMAX
= 125°C,
θ
JA
= 150°C/ W
Consult factory for Military grade parts.
CONVERTER CHARACTERISTICS
PARAMETER
Resolution (No Missing Codes)
Integral Linearity Error
Differential Linearity
Offset Error
Full-Scale Error
Full-Scale Tempco
The
q
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. With internal reference (Note 5).
CONDITIONS
q
MIN
12
q
q
q
q
TYP
±0.35
±0.25
±2
±10
±15
±1
MAX
±1
±1
±
10
±15
UNITS
Bits
LSB
LSB
LSB
LSB
ppm/°C
ppm/°C
(Note 6)
(Note 6)
(Note 6)
(Note 6)
Internal Reference (Note 6)
External Reference
A ALOG I PUT
SYMBOL
V
IN
PARAMETER
The
q
denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at T
A
= 25°C. (Note 5)
CONDITIONS
Bipolar Mode with BIP/UNI High
4.75V
≤
V
DD
≤
5.25V
– 5.25V
≤
V
SS
≤
–4.75V
Unipolar Mode with BIP/UNI Low
4.75V
≤
V
DD
≤
5.25V
– 5.25V
≤
V
SS
≤
0V
V
CM
I
IN
C
IN
t
ACQ
t
AP
t
JITTER
CMRR
Analog Common Mode + Differential
Input Range (Note 12)
Analog Input Leakage Current
Analog Input Capacitance
Sample-and-Hold Acquisition Time
Sample-and-Hold Aperture Delay Time
Sample-and-Hold Aperture Delay Time Jitter
Analog Input Common Mode Rejection Ratio
f
IN
= 1MHz, V
IN
= 2V to – 2V
f
IN
= 100MHz, V
IN
= 2V to – 2V
(Note 9)
q
q
MIN
TYP
±2.048
MAX
UNITS
V
Analog Differential Input Range (Notes 3, 11)
q
0 to 4.096
Dual
±5V
Supply
Single 5V Supply
q
–2.5 to 5
0 to 5
1
10
57
2.6
1
– 62
– 24
2
U
W
U
U
W W
W
U
U
U
V
V
V
µA
pF
ns
ns
ps
dB
dB
LTC1402
DYNAMIC ACCURACY
SYMBOL
S/(N + D)
THD
PARAMETER
Signal-to-Noise Plus
Distortion Ratio
Total Harmonic
Distortion
The
q
denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at T
A
= 25°C. Bipolar mode with
±
5V supplies and unipolar mode with 5V supply. (Note 5)
CONDITIONS
100kHz Input Signal
1.1MHz Input Signal
100kHz First 5 Harmonics, Bipolar Mode
1.1MHz First 5 Harmonics, Bipolar Mode
100kHz First 5 Harmonics, Unipolar Mode
1.1MHz First 5 Harmonics, Unipolar Mode
100kHz Input Signal, Bipolar Mode
1.1MHz Input Signal, Bipolar Mode
100kHz Input Signal, Unipolar Mode
1.1MHz Input Signal, Unipolar Mode
±1V
1.25MHz into A
IN+
, 1.2MHz into A
IN–
Bipolar Mode
1.5V to 3.5V 1.25MHz into A
IN+
, 1.2MHz into A
IN–
Unipolar Mode
V
REF
= 4.096V, 1LSB = 1mV
V
IN
= 4V
P-P
, D
OUT
= 2828LSB
P-P
(Note 18)
S/(N + D)
≥
68dB Bipolar Mode
Unipolar Mode
q
q
SFDR
IMD
INTERNAL REFERENCE CHARACTERISTICS
PARAMETER
V
REF
Output Voltage
V
REF
Output Tempco
V
REF
Line Regulation
V
REF
Output Resistance
V
REF
Settling Time
CONDITIONS
I
OUT
= 0
The
q
denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at T
A
= 25°C. (Note 5)
MIN
TYP
4.096
15
AV
DD
= 4.75V to 5.25V, V
REF
= 4.096V
Load Current = 0.5mA
1
2
2
MAX
UNITS
V
ppm/°C
LSB/V
Ω
ms
DIGITAL I PUTS A D DIGITAL OUTPUTS
SYMBOL
V
IH
V
IL
I
IN
C
IN
V
OH
PARAMETER
High Level Input Voltage
Low Level Input Voltage
Digital Input Current
Digital Input Capacitance
High Level Output Voltage
CONDITIONS
V
DD
= 5.25V
V
DD
= 4.75V
V
IN
= 0V to V
DD
The
q
denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at T
A
= 25°C. (Note 5)
MIN
q
q
q
V
OL
I
OZ
C
OZ
I
SOURCE
I
SINK
Low Level Output Voltage
Hi-Z Output Leakage D
OUT
Hi-Z Output Capacitance D
OUT
Output Short-Circuit Source Current
Output Short-Circuit Sink Current
U
U
U
W U
U
MIN
69
TYP
72.5
72.0
–89
–89
–87
–82
–93
–93
–93
–84
–84
–84
0.18
82
5.0
3.5
MAX
UNITS
dB
dB
–74.5
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
LSB
RMS
MHz
MHz
MHz
Spurious Free
Dynamic Range
Intermodulation
Distortion
Code-to-Code
Transition Noise
Full Power Bandwidth
Full Linear Bandwidth
U
TYP
MAX
0.8
±10
UNITS
V
V
µA
pF
V
V
V
2.4
5
OV
DD
= 4.75V, I
OUT
= – 10µA
OV
DD
= 4.75V, I
OUT
= – 200µA
OV
DD
= 3V, I
OUT
= – 200µA
V
DD
= 4.75V, I
OUT
= 160µA
V
DD
= 4.75V, I
OUT
= 1.6mA
V
OUT
= 0V to V
DD
V
OUT
= 0V, OV
DD
= 5V
V
OUT
= 0V, OV
DD
= 3V
V
OUT
= OV
DD
= 5V
4.7
q
q
q
q
4
2.5
2.9
0.05
0.10
15
– 40
– 15
40
0.4
±10
V
V
µA
pF
mA
mA
mA
3
LTC1402
POWER REQUIRE E TS
SYMBOL
V
DD
V
SS
I
DD
PARAMETER
Positive Supply Voltage
Negative Supply Voltage
Positive Supply Current
Active Mode
Nap Mode
Sleep Mode
Active, Sleep or Nap Modes with SCK Off
Active Mode with SCK in Fixed State (Hi or Lo)
q
q
q
The
q
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 5)
CONDITIONS
MIN
4.75
– 5.25
18
3
2
90
TYP
MAX
5.25
0
30
5
10
2
150
UNITS
V
V
mA
mA
µA
µA
mW
I
SS
PD
Negative Supply Current
Power Dissipation
The
q
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 5)
SYMBOL
f
SAMPLE(MAX)
t
THROUGHPUT
t
SCK
t
CONV
t
0
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
8a
t
9
t
10
t
11
t
12
PARAMETER
Maximum Sampling Frequency (Conversion Rate)
Minimum Sampling Period (Conversion + Acquisiton Period)
Minimum Clock Period
Conversion Time
14th SCLK↑ to CONV↑ Interval
Minimum Positive or Negative SCK Pulse Width
CONV to SCK Setup Time
SCK After CONV
Minimum Positive or Negative CONV Pulse Width
SCK to Sample Mode
CONV to Hold Mode
Minimum Delay Between Conversions
Minimum Delay from SCK to Valid Bits 0 Through 11
Minimum Delay from SCK to Valid REFREADY
SCK to Hi-Z at D
OUT
Previous D
OUT
Bit Remains Valid After SCK
REFREADY Bit Delay After Sleep-to-Wake Transition
V
REF
Settling Time After Sleep-to-Wake Transition
(Note 9)
(Notes 9, 10, 16)
(Note 9)
(Notes 9, 13)
(Note 9)
(Note 9)
(Note 9)
(Notes 9, 14)
(Note 9)
(Notes 9, 15)
(Notes 9, 15)
(Notes 9, 15)
(Notes 9, 15)
(Notes 9, 17)
(Notes 9, 17)
q
q
q
q
q
q
q
q
q
q
q
q
q
q
TI I G CHARACTERISTICS
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
All voltage values are with respect to ground with DGND, AGND1
and AGND2 wired together.
Note 3:
When these pins are taken below V
SS
or above V
DD
, they will be
clamped by internal diodes. This product can handle input currents greater
than 100mA below V
SS
or greater than V
DD
without latchup.
Note 4:
When these pins are taken below V
SS
, they will be clamped by
internal diodes. This product can handle input currents greater than
100mA below V
SS
or greater than V
DD
. These pins are not clamped to V
DD
.
Note 5:
V
DD
= 5V, f
SAMPLE
= 2.2MHz, V
SS
= 0V for unipolar mode
specifications and V
SS
= – 5V for bipolar specifications.
4
U W
UW
CONDITIONS
q
q
q
MIN
2.2
TYP
MAX
455
UNITS
MHz
ns
ns
SCK cycles
ns
28
14
57
3.8
7.3
0
3.5
9
3.4
48
9
15
11.4
4
7
10
2
10000
6
12
5
14
5
12
20
16
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ms
Note 6:
Linearity, offset and full-scale specifications apply for a single-
ended A
IN+
input with A
IN–
grounded and using the internal reference in
bipolar mode with
±5V
supplies.
Note 7:
Integral linearity is defined as the deviation of a code from the
straight line passing through the actual endpoints of a transfer curve. The
deviation is measured from the center of quantization band.
Note 8:
Bipolar offset is the offset measured from – 0.5LSB when the input
flickers between 1000 0000 0000 and 0111 1111 1111.
Note 9:
Guaranteed by design, not subject to test.
Note 10:
Recommended operating conditions.
Note 11:
The analog input range is defined as the voltage difference
between A
IN+
and A
IN–
. The bipolar
±2.048V
input range could be used
with a single 5V supply if the absolute voltages of the inputs remain within
the single 5V supply voltage.
LTC1402
ELECTRICAL CHARACTERISTICS
Note 12:
The absolute voltage at A
IN+
and A
IN–
must be within this range.
Note 13:
If less than 7.3ns is allowed, the output data will appear one
clock cycle later. It is best for CONV to rise half a clock before SCK, when
running the clock at rated speed.
Note 14:
Not the same as aperture delay. Aperture delay is smaller (2.6ns)
because the 0.8ns delay through the sample-and-hold is subtracted from
the CONV to Hold mode delay.
Note 15:
The rising edge of SCK is guaranteed to catch the data coming
out into a storage latch.
Note 16:
The time period for acquiring the input signal is started by the
14th rising clock and it is ended by the rising edge of convert.
Note 17:
The internal reference settles in 2ms after it wakes up from Sleep
mode with one or more cycles at SCK and a 10µF capacitive load. The
Sleep mode resets the REFREADY bit in the D
OUT
sequence. The
REFREADY bit goes high again 10ms after the V
REF
has stopped slewing in
wake up. This ensures valid REFREADY bit operation even with higher load
capacitances at V
REF
.
Note 18:
The full power bandwidth is the frequency where the output code
swing drops to 2828LSBs with a 4V
P-P
input sine wave.
(Bipolar Mode Plots Run with Dual
±5V
Supplies.
Unipolar Mode Plots Run with a Single 5V Supply. V
DD
= 5V, V
SS
= – 5V for Bipolar, V
DD
= 5V, V
SS
= 0V for Unipolar), T
A
= 25°C.
5 Harmonic THD, 2nd, 3rd and
SFDR vs Input Frequency
(Bipolar)
74
68
62
56
50
44
38
32
26
20
14
f
SAMPLE
= 2.22MHz
10
5
10
6
INPUT FREQUENCY (Hz)
8
2
10
7
1401 G01
TYPICAL PERFOR A CE CHARACTERISTICS
ENOBs and SINAD
vs Input Frequency (Bipolar)
12
11
10
9
8
7
6
5
4
3
2
1
0
10
4
0
–10
–20
EFFECTIVE NUMBER OF BITS
THD, SFDR, 2ND 3RD (dB)
–60
–70
–80
–90
–100
–110
–120
10
4
10
5
10
6
INPUT FREQUENCY (Hz)
10
7
1401 G02
SNR (dB)
ENOBs and SINAD
vs Input Frequency (Unipolar)
12
11
10
9
8
7
6
5
4
3
2
1
0
10
4
f
SAMPLE
= 2.22MHz
10
5
10
6
INPUT FREQUENCY (Hz)
74
68
62
56
50
44
38
32
26
20
14
8
2
10
7
1401 G04
EFFECTIVE NUMBER OF BITS
THD, SFDR, 2ND 3RD (dB)
SNR (dB)
U W
SNR vs Input Frequency (Bipolar)
–2
–8
–14
–20
–26
–32
–38
–44
–50
–56
–62
–68
–74
10
4
10
5
10
6
INPUT FREQUENCY (Hz)
10
7
1401 G03
–30
–40
–50
THD
SFDR
2ND
3RD
f
SAMPLE
= 2.22MHz
f
SAMPLE
= 2.22MHz
SIGNAL-TO-NOISE + DISTORTION (dB)
SIGNAL-TO-NOISE + DISTORTION (dB)
5 Harmonic THD, 2nd, 3rd and
SFDR vs Input Frequency
(Unipolar)
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
10
4
10
5
10
6
INPUT FREQUENCY (Hz)
10
7
1401 G05
SNR vs Input Frequency (Unipolar)
–2
–8
–14
–20
–26
–32
–38
–44
–50
–56
–62
–68
–74
10
4
10
5
10
6
INPUT FREQUENCY (Hz)
10
7
1401 G06
THD
SFDR
2ND
3RD
f
SAMPLE
= 2.22MHz
f
SAMPLE
= 2.22MHz
5
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
