RT9104
3W Stereo Class-D Audio Power Amplifier with DC Volume
Control
General Description
The RT9104 is a stereo, high efficiency, filter free Class-D
audio amplifier capable of delivering 3W per channel into
3Ω speakers. For application flexibility, the gain can be
set by external DC volume control. Thermal protection as
well as overcurrent protection functions are included in
the stereo amplifier. The SOP-16 packaging without
additional heat sink makes the RT9104 Class-D amplifier
an ideal choice for monitor applications. The RT9104 is
also well suited for battery powered applications because
of its operating voltage (from 4.5V to 5.5V) and very low
shutdown current.
The RT9104 is available in WQFN-16L 3x3, SOP-16 and
DIP-16 packages.
Features
4.5V to 5.5V Input Supply Range
3W Per Channel into 3Ω Speakers (THD+N = 10%)
Ω
300kHz High Internal Switching Frequency
Efficiency Greater than 85%
DC Volume Control from
−
70dB to 20dB
Fade In at Enable and Power On
Thin 16-Lead WQFN and SOP-16 and DIP-16
Packages
RoHS Compliant and Halogen Free
Applications
LCD Monitors
Consumer Device
Powered Speakers
Ordering Information
RT9104
Package Type
QW : WQFN-16L 3x3 (W-Type)
S : SOP-16
N : DIP-16
Lead Plating System
G : Green (Halogen Free and Pb Free)
Note :
Richtek products are :
RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
Suitable for use in SnPb or Pb-free soldering processes.
Pin Configurations
(TOP VIEW)
BYPASS
INR
INL
VOLUME_IN
16 15 14 13
ROUT+
PVDD
GND
ROUT-
1
2
3
4
5
6
7
8
12
GND
17
11
10
9
LOUT+
PVDD
GND
LOUT-
WQFN-16L 3x3
GND
SHDN
AVDD
GND
INR
BYPASS
ROUT+
PVDD
GND
ROUT-
GND
SHDN
16
2
3
4
5
6
7
8
15
14
13
12
11
10
9
INL
VOLUME_IN
LOUT+
PVDD
GND
LOUT-
GND
AVDD
SOP-16/DIP-16
DS9104-01 April 2011
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1
RT9104
Marking Information
RT9104GQW
GU=YM
DNN
RT9104GS
GU= : Product Code
YMDNN : Date Code
RT9104
GSYMDNN
RT9104GS : Product Number
YMDNN : Date Code
RT9104GN
RichTek
RT9104
GNYMDNN
RT9104GN : Product Number
YMDNN : Date Code
Typical Application Circuit
RT9104
V
DD
AVDD
C
AVDD
0.1µF
VOLUME_IN
PVDD
BYPASS
C
B
2.2µF
INR
Audio Input
C
INL
0.22µF
INL
R
L
C
ROUT+
1nF
Ferrite Bead
Ferrite Bead
C
ROUT-
1nF
Ferrite Bead
ROUT+
ROUT-
LOUT+
Ferrite Bead
LOUT-
GND
C
LOUT-
1nF
C
LOUT+
1nF
R
L
SHDN
C
VOL
1µF
In from DAC or
Potentiometer
(DC Volatge)
C
PVDD1
10µF
C
PVDD2
0.1µF
C
INR
0.22µF
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DS9104-01 April 2011
RT9104
Functional Pin Description
Pin No.
SOP-16/DIP-16
1
2
3
4, 13
5, 7, 10, 12
6
8
9
11
14
15
16
WQFN-16L 3x3
15
16
1
Pin Name
INR
BYPASS
ROUT+
Pin Function
Right Channel Audio Signal Input.
Common Mode Voltage Output.
Positive Right Channel BTL Output.
Power Supply.
Ground. The exposed pad must be soldered to a large PCB
and connected to GND for maximum power dissipation.
Negative Right Channel BTL Output.
Shutdown Pin, Enable when SHDN = ’1’,
Disable when SHDN = ’0’ .
Analog Reference Input Voltage. Connect to a regulator
output voltage as better.
Negative Left Channel BTL Output.
Positive Left Channel BTL Output.
2, 11
PVDD
3, 10, 5, 8,
GND
17 (Exposed Pad)
4
ROUT−
6
7
9
12
13
14
SHDN
AVDD
LOUT−
LOUT+
VOLUME_IN Volume Control Pin. DC in for controlling volume.
INL
Left Channel Audio Signal Input.
Function Block Diagram
INR
Bypass
AVDD
-
+
PWM
Generator
Output
Power
Stage
PVDD
ROUT+
ROUT-
PGND
Bypass
VOLUME_IN
-
+
SHDN
DC
Volume
Control
Circuit
Over Temperature
/Over Current
Protection
Depop
Circuit
BYPASS
INL
Bypass
-
+
PWM
Generator
Output
Power
Stage
PVDD
LOUT+
LOUT-
PGND
GND
Bypass
-
+
DS9104-01 April 2011
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3
RT9104
Absolute Maximum Ratings
(Note 1)
0.3V to 6V
0.3V to (V
DD
+ 0.3V)
1.471W
1.176W
1.333W
Supply Voltage, AVDD, PVDD ----------------------------------------------------------------------------------
Input Voltage, INL, INR -------------------------------------------------------------------------------------------
Power Dissipation, P
D
@ T
A
= 25°C
WQFN-16L 3x3 -----------------------------------------------------------------------------------------------------
SOP-16 --------------------------------------------------------------------------------------------------------------
DIP-16 ----------------------------------------------------------------------------------------------------------------
Package Thermal Resistance (Note 2)
WQFN-16L 3x3,
θ
JA
----------------------------------------------------------------------------------------------- 68°C/W
WQFN-16L 3x3,
θ
JC
----------------------------------------------------------------------------------------------- 7.5°C/W
SOP-16,
θ
JA
--------------------------------------------------------------------------------------------------------- 85°C/W
DIP-16,
θ
JA
-----------------------------------------------------------------------------------------------------------
Junction Temperature ---------------------------------------------------------------------------------------------
Lead Temperature (Soldering, 10 sec.) -----------------------------------------------------------------------
Storage Temperature Range -------------------------------------------------------------------------------------
75°C/W
150°C
260°C
−
65°C to 150°C
ESD Susceptibility (Note 3)
HBM (Human Body Mode) --------------------------------------------------------------------------------------- 2kV
MM (Machine Mode) ---------------------------------------------------------------------------------------------- 200V
Recommended Operating Conditions
(Note 4)
Supply Voltage Range, AVDD, PVDD --------------------------------------------------------------------------- 4.5V to 5.5V
Junction Temperature Range -------------------------------------------------------------------------------------
−
40°C to 125°C
Ambient Temperature Range -------------------------------------------------------------------------------------
−
40°C to 85°C
Electrical Characteristics
(V
DD
= 5V, Gain = 6dB, R
L
= 8Ω, T
A
= 25°C, unless otherwise specified)
Parameter
Under Voltage Lockout
Threshold
V
DD
Under Voltage Lockout
Hysteresis
SHDN Input
Threshold Voltage
Quiescent Current
Shutdown Current
Output Impedance in SHDN
Switching Frequency
Resistance from Shutdown to
GND
Thermal Shutdown
Logic-High
Logic-Low
Symbol
V
UVLO
Test Conditions
V
DD
Rising
Min
--
--
Typ
4
100
--
--
3
--
>1
300
--
150
Max
--
--
--
0.4
--
10
--
--
--
170
Unit
V
mV
V
mA
μA
kΩ
kHz
kΩ
°C
V
IH
V
IL
I
Q
I
SHDN
f
SW
V
DD
= 5.5V, No Load ,
V
SHDN
= 0V, V
DD
= 4.5 V to 5.5V
V
SHDN
= 0V
V
DD
= 4.5V to 5.5V
2
--
--
--
--
--
20
T
SD
130
To be continued
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DS9104-01 April 2011
RT9104
Parameter
Symbol
Test Conditions
THD+N = 10%, f = 1kHz, R
L
= 3Ω
THD+N = 1%, f = 1kHz, R
L
= 3Ω
Output Power
(Per Channel)
P
O
THD+N = 10%, f = 1kHz, R
L
= 4Ω
THD+N = 1%, f = 1kHz, R
L
= 4Ω
THD+N = 10%, f = 1kHz, R
L
= 8Ω
THD+N = 1%, f = 1kHz, R
L
= 8Ω
Total Harmonic
Distortion Plus Noise
Crosstalk
Signal-to-Noise Ratio
Start-Up Time from
Shutdown
Efficiency
SNR
THD+N
P
O
= 1W, R
L
= 8Ω, f = 1kHz
f = 1kHz, V
DD
= 4.5V to 5.5V, P
O
= 2W,
R
L
= 4Ω
P
O
= 1W, R
L
= 8Ω, A Weighting
Min
--
--
--
--
--
--
--
--
--
--
Load = (8Ω + 33μH)
--
Typ
3
2.35
2.7
2.3
1.6
1.25
0.2
−85
90
300
85
Max
--
--
--
--
--
--
--
--
--
--
--
%
dB
dB
ms
%
W
Unit
Note 1.
Stresses listed as the above
“
Absolute Maximum Ratings
”
may cause permanent damage to the device. These
are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated
in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions
for extended periods may remain possibility to affect device reliability.
Note 2.
θ
JA
is measured in natural convection at T
A
= 25°C on a high effective thermal conductivity four-layer test board of
JEDEC 51-7 thermal measurement standard. The measurement case position of
θ
JC
is on the exposed pad of
the package
Note 3.
Devices are ESD sensitive. Handling precaution is recommended.
Note 4.
The device is not guaranteed to function outside its operating conditions.
DS9104-01 April 2011
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