CM1753
1-Channel ESD Protector
Product Description
The CM1753 provides robust ESD protection for sensitive parts that
may be subjected to electrostatic discharge (ESD). The tiny form
factor and single wirebond requirement enable it to be used in very
confined spaces. This device is designed and characterized to safely
dissipate ESD strikes of at least
±8
kV, according to the
MIL−STD−883 (Method 3015) specification for Human Body Model
(HBM) ESD.
Features
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ELECTRICAL SCHEMATIC
Au (Gold) bondpad on topside
(“Signal” node mentioned in
Electrical Specification table)
•
Compact Die Protects from ESD Discharges
•
Almost No Conduction at Signal Amplitudes Smaller than
−45
V
•
ESD Protection Over
±8
kV Contact Discharge per MIL_STD_883
International ESD Standard
Applications
•
LED Lighting
•
Modules
•
Interface Circuits
Bare Silicon on backside
(Reference node)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
©
Semiconductor Components Industries, LLC, 2012
February, 2012
−
Rev. 4
1
Publication Order Number:
CM1753/D
CM1753
ORDERING INFORMATION
Ordering Part Number
CM1753−1004YT
Topside Metal
Au (Gold)
Backside Metal
Bare Silicon
BG Thickness
4 mils
Shipping Method
Wafer Form
OPERATING CONDITIONS
Parameter
Rating
Unit
Operating Temperature Range
Storage Temperature Range
−40
to +125
−65
to +150
°C
°C
ELECTRICAL OPERATING CHARACTERISTICS
Symbol
I
LEAK
V
CL
Leakage Current
Parameter
Conditions
V =
−35
V, 25°C
V =
−45
V, 25°C
Signal Clamp Voltage
Positive polarity on signal node (V
CL+
)
Negative polarity on signal node (V
CL−
)
ESD Protection
−
withstand voltage:
Human Body Model
(MIL−STD−883, Method 3015)
T
A
= 25°C;
at 10 mA (I
CL+
)
at
−10
mA (I
CL−
) (Note 1)
T
A
= 25°C
(Note 2)
0.4
−57.0
±8
0.8
−52.0
Min
Typ
Max
100
500
1.5
−47.0
Unit
nA
nA
V
V
ESD
kV
1. V
CL−
is measured with a
−10
mA pulse at 1 ms.
2. This parameter is guaranteed by design.
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2
CM1753
MECHANICAL DETAILS
MECHANICAL SPECIFICATIONS
Parameter
Composition
Wafer Diameter
Die shape
Length (Stepping Size)
Width (Stepping Size)
Thickness
Top Pad Length
Top Pad Width
Top Pad Composition
Back Metal (Backside)
Die (Stepping Size)
Passivation Opening
Active Size
Active to PA Opening
Condition
Silicon wafer,
n+ doped
150
Square
270
270
100
190
190
Au (Gold)
None (Bare Silicon)
270
60
160
25
mm
mm
mm
mm
Stepping = 270 um
190 um
Unit
190 um
mm
Pad
Opening
Stepping = 270 um
mm
mm
mm
mm
mm
Passivation free= 60 um
Figure 1. Wafer Array
ON Semiconductor
and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone:
303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax:
303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email:
orderlit@onsemi.com
N. American Technical Support:
800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
ON Semiconductor Website: www.onsemi.com
Order Literature:
http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
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3
CM1753/D
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