TDA8029
Low power single card reader
Rev. 3.4 — 12 June 2018
Product data sheet
COMPANY PUBLIC
1
General description
The TDA8029 is a complete one chip, low cost, low power, robust smart card reader.
Its different power reduction modes and its wide supply voltage range allow its use in
portable equipment. Due to specific versatile hardware, a small embedded software
program allows the control of most cards available in the market. The control from the
host may be done through a standard serial interface.
The TDA8029 may be delivered with standard embedded software. For details on
standard embedded software, please refer to
"AN10207"
for the TDA8029HL/C2.
2
Features and benefits
•
80C51 core with 16 kB ROM, 256 byte RAM and 512 byte XRAM
•
Specific ISO7816 UART, accessible with MOVX instructions for automatic convention
processing, variable baud rate, error management at character level for T = 0 and T = 1
protocols, extra guard time, etc.
•
Specific versatile 24-bit Elementary Time Unit (ETU) counter for timing processing
during Answer To Reset (ATR) and for T = 1 protocol
•
V
CC
generation with controlled rise and fall times see
Section 11
•
Card clock generation up to 20 MHz with three times synchronous frequency doubling
1
1
1
(f
XTAL
, ⁄
2
f
XTAL
, ⁄
4
f
XTAL
and ⁄
8
f
XTAL
)
•
Card clock stop HIGH or LOW or 1.25 MHz from an integrated oscillator for card power
reduction modes
•
Automatic activation and deactivation sequences through an independent sequencer
•
Supports asynchronous protocols T = 0 and T = 1 in accordance with:
–
ISO 7816
and
EMVCo4.3
(TDA8029HL/C2).
–
for EMVCo4.3c support it is recommended to use PN7412AU as TDA8029 is not
anymore compliant.
•
1 to 8 characters FIFO in reception mode
•
Parity error counter in reception mode and in transmission mode with automatic
retransmission
•
Versatile 24-bit time-out counter for ATR and waiting times processing
•
Specific ETU counter for Block Guard Time (BGT) (22 ETU in T = 1 and 16 ETU in T =
0)
•
Minimum delay between two characters in reception mode:
–
In protocol T = 0:
11.8 ETU (TDA8029HL/C2).
–
In protocol T = 1:
10.8 ETU (TDA8029HL/C2).
•
Supports synchronous cards which do not use C4/C8
•
Current limitations on card contacts
NXP Semiconductors
Low power single card reader
•
Supply supervisor for power-on/off reset and spikes killing
•
DC-to-DC converter (supply voltage from 2.7 to 6 V), doubler, tripler or follower
according to V
CC
and V
DD
•
Shut-down input for very low power consumption
•
Enhanced ESD protection on card contacts (6 kV minimum)
•
Software library for easy integration
•
Communication with the host through a standard full duplex serial link at programmable
baud rates
•
One external interrupt input and four general purpose I/Os.
TDA8029
3
Applications
•
Portable card readers
•
General purpose card readers
•
EMV compliant card readers.
4
Quick reference data
Table 1. Quick reference data
Symbol
V
DD
V
DCIN
I
DD(sd)
I
DD(pd)
Parameter
supply voltage
NDS conditions
input voltage for the DC-to-
DC converter
supply current in Shut-down V
DD
= 3.3 V
mode
supply current in Power-
down mode
supply current in Sleep
mode
V
DD
= 3.3 V; card inactive;
microcontroller in Power-
down mode
V
DD
= 3.3 V; card active at
V
CC
= 5 V; clock stopped;
microcontroller in Power-
down mode; I
CC
= 0 A
I
CC
= 65 mA; f
XTAL
= 20
MHz; f
CLK
= 10 MHz; 5 V
card; V
DD
= 2.7 V
active mode; I
CC
< 65 mA;
5 V card
active mode; I
CC
< 65 mA
if V
DD
> 3.0 V else I
CC
< 50
mA; 3 V card
active mode; I
CC
< 30 mA;
1.8 V card
active mode; current pulses
of 40 nAs with I < 200 mA,
t < 400 ns, f < 20 MHz; 5 V
card
Conditions
Min
2.7
3
V
DD
-
-
Typ
-
-
-
-
-
Max Unit
6.0
6.0
6.0
20
110
V
V
V
μA
μA
I
DD(sl)
-
-
800
μA
I
DD(om)
supply current in operating
mode
card supply voltage
-
-
250
mA
V
CC
4.75 5
2.80 3
5.25 V
3.20 V
1.62 1.8
4.6
-
1.98 V
5.3
V
TDA8029
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2018. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.4 — 12 June 2018
2 / 62
NXP Semiconductors
Low power single card reader
Symbol
Parameter
Conditions
active mode; current pulses
of 40 nAs with I < 200 mA,
t < 400 ns, f < 20 MHz; 3 V
card
active mode; current pulses
of 12 nAs with I < 200 mA,
t < 400 ns, f < 20 MHz; 1.8
V card
I
CC
card supply current
5 V card; V
CC
= 0 V to 5 V
3 V card; V
CC
= 0 V to 3 V;
V
DD
> 3.0 V
3 V card; V
CC
= 0 V to 3 V;
V
DD
< 3.0 V
1.8 V card; V
CC
= 0 V to 1.8
V;
I
CC(det)
overload detection current
maximum load capacitor
300 nF
SR
r
, SR
f
rise and fall slew rate on
V
CC
t
de
t
act
f
XTAL
deactivation sequence
duration
activation sequence
duration
crystal frequency
V
DD
= 5 V
V
DD
< 3 V
external input
T
amb
ambient temperature
Min
Typ
Max Unit
3.25 V
TDA8029
2.75 -
1.62 -
1.98 V
-
-
-
-
-
-
-
-
-
100
65
65
50
30
-
mA
mA
mA
mA
mA
0.05 0.16 0.22 V/μs
-
-
4
4
0
-40
-
-
-
-
-
-
100
225
27
16
27
+90
μs
μs
MHz
MHz
MHz
°C
5
Ordering information
Table 2. Ordering information
Type number
TDA8029HL/C207
Package
Name
LQFP32
Description
plastic low profile quad flat package; 32 leads;
body 7 × 7 × 1.4 mm
Version
SOT358-1
TDA8029
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2018. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.4 — 12 June 2018
3 / 62
NXP Semiconductors
Low power single card reader
TDA8029
6
Block diagram
V
DD
CDEL
6
RESET
SDWN_N
28
5
SUPPLY
SUPERVISOR
DC-to-DC
CONVERTER
CLOCK
CIRCUITRY
80C51
CONTROLLER
16 kB ROM
256 byte RAM
TIMER 2
3
SAM
19
SAP SBM
14
17
SBP
15
13
VUP
220 nF
18
16
PGND
DCIN
10 µF
P33/INT1_N
P16
P17
P27
P26
P30/RX
P31/TX
EA_N
ALE
PSEN_N
30
2
1
24
25
32
31
21
P00/P07
22
P20
23
ISO 7816
UART
24-bit
ETU
COUNTER
11
9
ANALOG
DRIVERS
AND
SEQUENCER
12
10
7
VCC
GNDC
RST
CLK
I/O
PRES
P37
P25
P32/INT0_N
29
CS
8
TEST
20
512 byte XRAM
27
26
CONTROL/
STATUS
REGISTERS
INTERNAL
OSCILLATOR
XTAL2
XTAL1
CRYSTAL
OSCILLATOR
4
TDA8029
fce869
GND
Figure 1. Block diagram
7
Pinning information
TDA8029
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2018. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.4 — 12 June 2018
4 / 62
NXP Semiconductors
Low power single card reader
TDA8029
7.1 Pinning
30 P33/INT1_N
29 P32/INT0_N
32 P30/RX
31 P31/TX
28 RESET
27 XTAL2
26 XTAL1
P17
P16
V
DD
GND
SDWN_N
CDEL
I/O
PRES
1
2
3
4
5
6
7
8
CLK 10
V
CC
11
RST 12
VUP 13
SAP 14
SBP 15
DCIN 16
9
25 P26
24 P27
23 PSEN_N
22 ALE
21 EA_N
20 TEST
19 SAM
18 PGND
17 SBM
001aac157
TDA8029HL
Figure 2. Pin configuration
7.2 Pin description
Table 3. Pin description
Symbol
P17
P16
V
DD
GND
SDWN_N
CDEL
I/O
PRES
Pin
1
2
3
4
5
6
7
8
Type
I/O
I/O
power
power
I
I
I/O
I
Description
general purpose I/O
general purpose I/O
supply voltage
ground connection
shut-down signal input (active LOW, no internal pull-up)
connection for an external capacitor determining the power-
on reset pulse width (typically 1 ms per 2 nF)
data input/output to/from the card (C7); 14 kΩ integrated
pull-up resistor to V
CC
card presence detection contact (active HIGH); do not
connect to any external pull-up or pull-down resistor;
use with a normally open presence switch (see details in
Section 8.12)
card ground (C5); connect to GND in the application
clock to the card (C3)
card supply voltage (C1)
card reset (C2)
output of the DC-to-DC converter (low ESR 220 nF to
PGND)
DC-to-DC converter capacitor connection (low ESR 220 nF
between SAP and SAM)
GNDC
CLK
V
CC
RST
VUP
SAP
9
10
11
12
13
14
power
O
O
O
power
I/O
TDA8029
All information provided in this document is subject to legal disclaimers.
GNDC
© NXP B.V. 2018. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.4 — 12 June 2018
5 / 62
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