EXPOSED PAD (PIN #15) PCB CONNECTION TO GND IS OPTIONAL
ORDER INFORMATION
LEAD FREE FINISH
LTC4312IDE#PBF
LTC4312IMS#PBF
LTC4312CDE#PBF
LTC4312CMS#PBF
TAPE AND REEL
LTC4312IDE#TRPBF
LTC4312IMS#TRPBF
LTC4312CDE#TRPBF
LTC4312CMS#TRPBF
PART MARKING*
4312
4312
4312
4312
PACKAGE DESCRIPTION
14-Lead (4mm
×
3mm) DFN
16-Lead Plastic MSOP
14-Lead (4mm
×
3mm) DFN
16-Lead Plastic MSOP
TEMPERATURE RANGE
–40°C to 85°C
–40°C to 85°C
0°C to 70°C
0°C to 70°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
4312f
2
LTC4312
ELECTRICAL CHARACTERISTICS
SYMBOL
V
CC
V
DD, BUS
V
CC2
I
CC
I
CC(DISABLED)
I
CC2
t
UVLO
V
TH_UVLO
PARAMETER
Input Supply Range
2-Wire Bus Supply Voltage
Output Side Accelerator Supply
Range
Input Supply Current
Input Supply Current
V
CC2
Supply Current
UVLO Delay
UVLO Threshold
V
ENABLE1-2
= 0V; V
CC
= V
CC2
= 5.5V (Note 3)
Power Supply/Start-Up
l
l
l
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
CC
= V
CC2
= 3.3V unless otherwise noted.
CONDITIONS
MIN
2.9
2.25
2.25
6.0
1.6
0.35
60
7.3
2.2
0.5
110
2.3
200
TYP
MAX
5.5
5.5
5.5
9
3.5
0.6
200
2.6
UNITS
V
V
V
mA
mA
mA
μs
V
mV
One or Both V
ENABLE1-2
= V
CC
= V
CC2
= 5.5V (Note 3)
l
l
l
l
One or Both V
ENABLE1-2
= V
CC
= V
CC2
= 5.5V (Note 3)
l
V
CC_UVLO(HYST)
UVLO Threshold Hysteresis
Voltage
Buffers
V
OS1(SAT)
V
OS2(SAT)
V
OS
V
OS2
V
IL,FALLING
V
IL,RISING
I
LEAK
C
IN
dV/dt (RTA)
V
RTA(TH)
ΔV
ACC
I
RTA
Buffer Offset Voltage
Buffer Offset Voltage
Buffer Offset Voltage
Buffer Offset Voltage
Buffer Input Logic Low Voltage
Buffer Input Logic Low Voltage
Input Leakage Current
Input Capacitance
I
OL
= 4mA, Driven V
SDAIN,SCLIN
= 50mV
I
OL
= 500μA, Driven V
SDAIN,SCLIN
= 50mV
I
OL
= 4mA, Driven V
SDAOUT,SCLOUT
= 50mV
I
OL
= 500μA, Driven V
SDAOUT,SCLOUT
= 50mV
I
OL
= 4mA, Driven V
SDAIN,SCLIN
= 200mV
I
OL
= 500μA, Driven V
SDAIN,SCLIN
= 200mV
I
OL
= 4mA, Driven V
SDAOUT,SCLOUT
= 200mV
I
OL
= 500μA, Driven V
SDAOUT,SCLOUT
= 200mV
SDA, SCL Pins (Notes 4, 5)
SDA, SCL Pins;
ACC
Grounded
SDA, SCL Pins;
ACC
Open or High (Notes 4, 5)
SDA, SCL Pins; V
CC
, V
CC2
= 0V, 5.5V
SDA, SCL Pins (Note 6)
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
130
15
90
15
50
15
35
15
0.5
220
60
190
55
130
55
95
50
0.6
280
120
260
110
195
110
170
100
0.7
±10
<20
mV
mV
mV
mV
mV
mV
mV
mV
V
V
V
μA
pF
V/μs
V
V
mV
mV
0.3•V
MIN
0.33•V
MIN
0.36•V
MIN
0.3•V
MIN
0.33•V
MIN
0.36•V
MIN
Rise Time Accelerators
Minimum Slew Rate Requirement SDA, SCL Pins; V
CC
= V
CC2
= 5V
Rise Time Accelerator DC
Threshold Voltage
Buffers Off to Accelerator On
Voltage
Rise Time Accelerator Pull-Up
Current
SDA, SCL Pins; V
CC
= V
CC2
= 5V,
ACC
Grounded
ACC
Open or High, V
CC
= V
CC2
= 5V (Note 4)
SDA, SCL Pins; V
CC
= V
CC2
= 5V,
ACC
Grounded
ACC
Open, V
CC
= V
CC2
= 5V (Note 4)
SDA, SCL Pins; V
CC
= V
CC2
= 5V,
ACC
Grounded
(Note 7)
ACC
Open, V
CC
= V
CC2
= 5V (Note 7)
Enable/Control
V
DISCEN(TH)
V
EN(TH)
ΔV
EN(HYST)
t
LH_EN
DISCEN Threshold Voltage
ENABLE1-2 Threshold Voltage
ENABLE1-2 Hysteresis Voltage
ENABLE1-2 High to Buffer Active
0.8
0.8
1.4
20
1.4
20
0.56
1
2
2
V
mV
V
mV
μs
4312f
0.1
0.7
100
20
1.5
0.2
0.8
200
35
3
0.4
0.9
l
0.36•V
MIN
0.4•V
MIN
0.44•V
MIN
l
0.05•V
MIN
0.07•V
MIN
45
4
mA
mA
ΔV
DISCEN(HYST)
DISCEN Hysteresis Voltage
3
LTC4312
ELECTRICAL CHARACTERISTICS
SYMBOL
I
LEAK
I
ACC(IN,
HL)
I
ACC(IN,
Z)
I
ACC(EN,
Z)
V
ACC(L,
TH)
V
ACC(H,TH)
PARAMETER
Input Leakage Current
ACC
High, Low Input Current
Allowable Leakage Current in
Open State
ACC
High Z Input Current
ACC
Input Low Threshold
Voltages
ACC
Input High Threshold
Voltages
Bus Stuck Low Timer
FAULT
Output Low Voltage
FAULT
Leakage Current
I
2
C Frequency Max
SDA, SCL Fall Delay
SDA, SCL Fall Times
(Note 6)
V
CC
= 3V to 5.5V, C
BUS
= 50pF I
BUS
= 1mA (Note 6)
,
V
CC
= 3V to 5.5V, C
BUS
= 50pF I
BUS
= 1mA (Note 6)
,
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
CC
= V
CC2
= 3.3V unless otherwise noted.
CONDITIONS
DISCEN = ENABLE1-2 = 5.5V
V
CC
= 5V, V
ACC
= 5V, 0V
V
CC
= 5V
V
CC
= 5V
V
CC
= 5V
V
CC
= 5V
l
l
l
l
l
l
MIN
TYP
0.1
±23
MAX
±10
±40
±5
UNITS
μA
μA
μA
μA
±5
0.2•V
CC
0.7•V
CC
0.3•V
CC
0.8•V
CC
0.4•V
CC
0.9•V
CC
V
V
Stuck Low Timeout Circuitry
t
TIMEOUT
V
FAULT(OL)
I
FAULT(OH)
f
SCL(MAX)
t
PDHL
t
f
SDAOUT or SCLOUT < 0.3•V
CC
I
FAULT
= 3mA
l
l
l
l
35
45
0.1
55
0.4
±5
ms
V
μA
kHz
I
2
C Interface Timing
400
60
10
100
ns
ns
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
All currents into pins are positive and all voltages are referenced to
GND unless otherwise indicated.
Note 3:
SDAIN, SCLIN pulled low.
Note 4:
V
MIN
= minimum of V
CC
and V
CC2
if V
CC2
> 2.25V else V
MIN
= V
CC
.
Note 5:
V
IL
is tested for the following (V
CC
, V
CC2
) combinations:
(2.9V, 5.5V), (5.5V, 2.25V), (3.3V, 3.3V) and (5V, 0V).
Note 6:
Guaranteed by design and not tested.
Note 7:
Measured in a special DC mode with V
SDA,SCL
= V
RTA(TH)
+ 1V.
The transient I
RTA
seen during rising edges when
ACC
is low will depend
on the bus loading condition and the slew rate of the bus. The LTC4312’s
internal slew rate control circuitry limits the maximum bus rise rate to
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