LA
ST
TI
M
RoHS lead-solder-exemption compliant
Delivers up to 15A (50 W)
Operates from – 55°C to 85°C ambient
Survives 1000 g mechanical shock, MIL-STD-883E
Industry-standard quarter-brick pinout
Available in through-hole and surface-mount packages
Outputs available in 12.0, 8.0, 6.0, 5.0, 3.3, 2.5, 2.0, 1.8, 1.5, 1.2, and 1.0 V
Low profile: 0.274” (6.96 mm)
Low weight: 0.53 oz [15 g] typical
Extremely small footprint: 0.896" x 2.30" (2.06 in2)
On-board input differential LC-filter
Extremely low output and input ripple
Start-up into pre-biased load
No minimum load required
2000 VDC I/O isolation
Fixed-frequency operation
Fully protected
Remote output sense
Positive or negative logic ON/OFF option
Output voltage trim range: +10%/-20% (except 1.2 and 1.0V outputs with a trim
range of ±10%) with industry-standard trim equations
High reliability: MTBF 3.4 million hours, calculated per Telcordia TR-332,
Method I Case 1
Meets conducted emissions requirements per FCC Class B and EN55022 Class
B when used with an external filter
All materials meet UL94, V-0 flammability rating
Approved to the latest edition of the following standards: UL/CSA60950-1,
IEC60950-1 and EN60950-1.
E
The ASQ24 eighth-brick dc-dc converters are ideally suited for aerospace
applications where high reliability, low profile, and low weight are critical. They
are designed for reliable operation in harsh thermal and mechanical
environments.
In high-ambient temperature applications, the ASQ24 Series converters
provide thermal performance that exceeds competing dc-dc converters that
have a higher nominal rating and much larger package size. This performance
is accomplished through the use of patented/patent-pending circuits,
packaging, and processing techniques to achieve ultra-high efficiency,
excellent thermal management, and a low-body profile. Coupled with the use
of 100% automation for assembly, this results in a product with extremely high
quality and reliability.
Available in through-hole and surface-mount packages, the ASQ24 Series
converters are also ideal for environments with little or no airflow.
Operating from an 18 to 36 VDC input, the ASQ24 Series converters provide
any standard output voltage from 12 VDC down to 1.0 VDC. Outputs can be
trimmed from –20% to +10% of the nominal output voltage (±10% for output
voltages 1.2 VDC and 1.0 VDC), thus providing outstanding design flexibility.
Telecommunications, Wireless, Servers, Workstations
BU
Y
2
ASQ24 Series
Conditions: T
A
= 25ºC, Airflow = 300 LFM (1.5 m/s), Vin = 24 VDC, All output voltages, unless otherwise specified.
PARAMETER
CONDITIONS / DESCRIPTION
MIN
TYP
MAX
UNITS
Absolute Maximum Ratings
Operating Ambient Temperature
Storage Temperature
-55
-55
Operating Input Voltage Range
Turn-on Threshold
Input Under Voltage Lockout (Non-latching)
Turn-off Threshold
BU
18
16
15
24
17
16
36
17.5
16.5
2000
160
Input Characteristics
Isolation Characteristics
I/O Isolation
1.0 - 3.3V
8.0V, 12V
Isolation Resistance
E
10
-20
-10
117
124
-20
2.4
2.4
-20
Isolation Capacitance:
5.0 - 6.0V
260
230
Feature Characteristics
Switching Frequency
Output Voltage Trim Range
1
Remote Sense Compensation
1
Output Over-Voltage Protection
Auto-Restart Period
Turn-On Time
TI
M
Industry-std. equations (1.5 - 12V)
Industry-std. equations (1.0 - 1.2V)
Percent of V
OUT
(
NOM
)
Non-latching (1.5 - 12V)
Non-latching (1.0 - 1.2V)
Applies to all protection features
Converter Off
Converter On
Converter Off
Converter On
415
+10
+10
+10
125
132
100
4
0.8
20
20
0.8
140
140
ST
ON/OFF Control (Positive Logic)
ON/OFF Control (Negative Logic)
LA
1
Vout can be increased up to 10% via the sense leads or up to 10% via the trim function, however total output voltage trim from all
sources should not exceed 10% of V
OUT
(NOM), in order to insure specified operation of over-voltage protection circuitry. See “Output
Voltage Adjust/Trim” for detailed information.
tech.support@psbel.com
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85
°C
°C
125
VDC
VDC
VDC
VDC
pF
pF
pF
MΩ
kHz
%
%
%
%
%
ms
ms
VDC
VDC
VDC
VDC
Input Voltage
Continuous
0
40
VDC
ASQ24 Series
3
The ON/OFF pin is used to turn the power converter on or off remotely via a system signal. There are two remote control
options available, positive logic and negative logic and both are referenced to Vin(-).
Typical connections are shown in Fig. A.
Vin (+)
Semi
Q
Family
TM
Converter
(Top View)
Vin
ON/OFF
Vin (-)
CONTROL
INPUT
The positive logic version turns on when the ON/OFF pin is at logic high and turns off when at logic low. The converter is on
when the ON/OFF pin is left open.
The negative logic version turns on when the pin is at logic low and turns off when the pin is at logic high. The ON/OFF pin
can be hard wired directly to Vin(-) to enable automatic power up of the converter without the need of an external control
signal.
ON/OFF pin is internally pulled-up to 5 V through a resistor. A mechanical switch, open collector transistor, or FET can be
used to drive the input of the ON/OFF pin. The device must be capable of sinking up to 0.2 mA at a low level voltage of
0.8 V. An external voltage source (±20 V maximum) may be connected directly to the ON/OFF input, in which case it must
be capable of sourcing or sinking up to 1 mA depending on the signal polarity. See the Start-up Information section for
system timing waveforms associated with use of the ON/OFF pin.
ST
Vin
The remote sense feature of the converter compensates for voltage drops occurring between the output pins of the converter
and the load. The SENSE(-) (Pin 5) and SENSE(+) (Pin 7) pins should be connected at the load or at the point where regulation
is required (see Fig. B).
Rw
LA
TI
M
Vin (+)
Figure A. Circuit configuration for ON/OFF function.
ON/OFF
E
SENSE (-)
Vout (-)
Semi
Q
Family
TM
Converter
Vout (+)
100
(Top View)
SENSE (+)
TRIM
SENSE (-)
10
Rload
Vin (-)
Vout (-)
Figure B. Remote sense circuit configuration.
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Vout (+)
SENSE (+)
TRIM
Rload
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Y
North America
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BCD.00784_AA
These power converters have been designed to be stable with no external capacitors when used in low inductance input
and output circuits.
However, in many applications, the inductance associated with the distribution from the power source to the input of the
converter can affect the stability of the converter. The addition of a 100 µF electrolytic capacitor with an ESR < 1 across
the input helps ensure stability of the converter. In many applications, the user has to use decoupling capacitance at the
load. The power converter will exhibit stable operation with external load capacitance up to 1000 µF on 12 V, 2,200 µF on
8.0 V, 10,000 µF on 5.0 V – 6.0 V, and 15,000 µF on 3.3 V – 1.0 V outputs.
4
ASQ24 Series
If remote sensing is not required, the SENSE(-) pin must be connected to the Vout(-) pin (Pin 4), and the SENSE(+) pin must
be connected to the Vout(+) pin (Pin 8) to ensure the converter will regulate at the specified output voltage. If these
connections are not made, the converter will deliver an output voltage that is slightly higher than the specified value.
Because the sense leads carry minimal current, large traces on the end-user board are not required. However, sense traces
should be located close to a ground plane to minimize system noise and insure optimum performance. When wiring
discretely, twisted pair wires should be used to connect the sense lines to the load to reduce susceptibility to noise.
The converter’s output overvoltage protection (OVP) senses the voltage across Vout(+) and Vout(-), and not across the sense
lines, so the resistance (and resulting voltage drop) between the output pins of the converter and the load should be
minimized to prevent unwanted triggering of the OVP.
When utilizing the remote sense feature, care must be taken not to exceed the maximum allowable output power capability
of the converter, equal to the product of the nominal output voltage and the allowable output current for the given conditions.
When using remote sense, the output voltage at the converter can be increased by as much as 10% above the nominal
rating in order to maintain the required voltage across the load. Therefore, the designer must, if necessary, decrease the
maximum current (originally obtained from the derating curves) by the same percentage to ensure the converter’s actual
output power remains at or below the maximum allowable output power.
The converter’s output voltage can be adjusted up 10% or down 20% for Vout
≥
1.5 V, and ±10% for Vout = 1.2 V and 1.0
V, relative to the rated output voltage by the addition of an externally connected resistor. For output voltages 3.3 V, trim up
to 10% is guaranteed only at Vin
≥
20 V, and it is marginal (8% to 10%) at Vin = 18 V depending on load current.
The TRIM pin should be left open if trimming is not being used. To minimize noise pickup, a 0.1 µF capacitor is connected
internally between the TRIM and SENSE(-) pins.
To increase the output voltage, refer to Fig. C. A trim resistor, R
T-INCR
, should be connected between the TRIM (Pin 6) and
SENSE(+) (Pin 7), with a value of:
R
T
INCR
½
485
Δ
323
R
T
INCR
½
2
Δ
R
T
INCR
½
where,
R
TINCR
½
Required value of trim-up resistor k]
V
ONOM
½
Nominal value of output voltage [V]
LA
ST
V
OREQ
½
Vin
Desired (trimmed) output voltage [V].
When trimming up, care must be taken not to exceed the converter‘s maximum allowable output power. See previous
section for a complete discussion of this requirement.
Semi
Q
Family
TM
TI
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[k] (1.2V)
[k] (1.0V)
5.11(100
Δ)V
O
NOM
626
10.22
1.225Δ
[k] (1.5 –12 V)
Δ
½
(V
O-REQ
V
O-NOM
)
X 100
V
O -NOM
[%]
Vin (+)
ON/OFF
E
Converter
Vout (+)
SENSE (+)
(Top View)
TRIM
SENSE (-)
Vout (-)
Vin (-)
Figure C. Configuration for increasing output voltage.
BU
R
T-INCR
Rload
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ASQ24 Series
R
T
DECR
½
where,
5
To decrease the output voltage (Fig. D), a trim resistor, R
T-DECR
, should be connected between the TRIM (Pin 6) and SENSE(-)
(Pin 5), with a value of:
511
10.22
|Δ|
[k]
(1.0 – 12V)
R
TDECR
½
Required value of trim-down resistor [k]
and
Δ
is as defined above.
Vin (+)
Semi
Q
Family
TM
Converter
(Top View)
Vin
ON/OFF
Vin (-)
Figure D. Configuration for decreasing output voltage.
Trimming/sensing beyond 110% of the rated output voltage is not an acceptable design practice, as this condition could
cause unwanted triggering of the output overvoltage protection (OVP) circuit. The designer should ensure that the difference
between the voltages across the converter’s output pins and its sense pins does not exceed 10% of V
OUT
(nom), or:
TI
M
[V
OUT
(
)
V
OUT
(
)]
[V
SENSE
(
)
V
SENSE
(
)]
V
O - NOM X
10%
E
Asia-Pacific
+86 755 298 85888
This equation is applicable for any condition of output sensing and/or output trim.
LA
ST
© 2016 Bel Power Solutions & Protection
BU
Vout (+)
SENSE (+)
TRIM
Rload
R
T-DECR
Note: The above equations for calculation of trim resistor values match those typically used in conventional industry-standard
quarter bricks and one-eighth bricks.
Converters with output voltage 1.2 V and 1.0 V have specific trim schematic and equations, to provide the customers with the
flexibility of second sourcing. For these converters, the last character of part number is “T”. More information about trim feature,
including corresponding schematic portions, can be found in Application Note 103.
SENSE (-)
Vout (-)
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[V]
North America
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BCD.00784_AA