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74LVC823ADB,118: 产品描述IC FF D-TYPE SNGL 9BIT 24SSOP; 产品类别逻辑逻辑; 文件大小799KB，共21页; 制造商Nexperia; 官网地址https://www.nexperia.com; 标准

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74LVC823ADB,118概述

IC FF D-TYPE SNGL 9BIT 24SSOP

74LVC823ADB,118规格参数

参数名称	属性值
Brand Name	Nexperia
是否Rohs认证	符合
厂商名称	Nexperia
零件包装代码	SSOP2
包装说明	SSOP-24
针数	24
制造商包装代码	SOT340-1
Reach Compliance Code	compliant
其他特性	WITH CLEAR AND CLOCK ENABLE
系列	LVC/LCX/Z
JESD-30 代码	R-PDSO-G24
JESD-609代码	e4
长度	8.2 mm
逻辑集成电路类型	BUS DRIVER
湿度敏感等级	1
位数	9
功能数量	1
端口数量	2
端子数量	24
最高工作温度	125 °C
最低工作温度	-40 °C
输出特性	3-STATE
输出极性	TRUE
封装主体材料	PLASTIC/EPOXY
封装代码	SSOP
封装形状	RECTANGULAR
封装形式	SMALL OUTLINE, SHRINK PITCH
峰值回流温度（摄氏度）	260
传播延迟（tpd）	11.5 ns
座面最大高度	2 mm
最大供电电压 (Vsup)	3.6 V
最小供电电压 (Vsup)	1.2 V
标称供电电压 (Vsup)	1.8 V
表面贴装	YES
技术	CMOS
温度等级	AUTOMOTIVE
端子面层	Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式	GULL WING
端子节距	0.65 mm
端子位置	DUAL
处于峰值回流温度下的最长时间	30
宽度	5.3 mm
Base Number Matches	1

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74LVC823A

9-bit D-type flip-flop with 5 V tolerant inputs/outputs; positive

edge-trigger; 3-state

Rev. 4 — 8 April 2013

Product data sheet

1. General description

The 74LVC823A is a 9-bit D-type flip-flop with common clock (pin CP), clock enable

(pin CE), master reset (pin MR) and 3-state outputs (pins Qn) for bus-oriented

applications. The 9 flip-flops stores the state of their individual D-inputs that meet the

set-up and hold times requirements on the LOW to HIGH CP transition, provided pin CE is

LOW. When pin CE is HIGH, the flip-flops hold their data. A LOW on pin MR resets all

flip-flops. When pin OE is LOW, the contents of the 9 flip-flops are available at the outputs.

When pin OE is HIGH, the outputs go to the high-impedance OFF-state. Operation of the

OE input does not affect the state of the flip-flops.

Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be

applied to the outputs. These features allow the use of these devices as translators in

mixed 3.3 V and 5 V applications.

2. Features and benefits



5 V tolerant inputs/outputs for interfacing with 5 V logic

Wide supply voltage range from 1.2 V to 3.6 V

CMOS low power consumption

Direct interface with TTL levels

Flow-through pinout architecture

9-bit positive edge-triggered register

Independent register and 3-state buffer operation

Complies with JEDEC standard:



JESD8-7A (1.65 V to 1.95 V)



JESD8-5A (2.3 V to 2.7 V)



JESD8-C/JESD36 (2.7 V to 3.6 V)



ESD protection:



HBM JESD22-A114F exceeds 2000 V



MM JESD22-A115-B exceeds 200 V



CDM JESD22-C101E exceeds 1000 V



Specified from

40 C

to +85

C

and

40 C

to +125

C.

74LVC823ADB,118相似产品对比

	74LVC823ADB,118	74LVC823APW,118	74LVC823APW,112	74LVC823ADB,112	74LVC823ABQ,118
描述	IC FF D-TYPE SNGL 9BIT 24SSOP	IC FF D-TYPE SNGL 9BIT 24TSSOP	IC FF D-TYPE SNGL 9BIT 24TSSOP	IC FF D-TYPE SNGL 9BIT 24SSOP	IC FF D-TYPE SNGL 9BIT 24DHVQFN
Brand Name	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia
是否Rohs认证	符合	符合	符合	符合	符合
厂商名称	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia
零件包装代码	SSOP2	TSSOP2	TSSOP2	SSOP2	QFN
包装说明	SSOP-24	TSSOP-24	TSSOP-24	SSOP-24	3.50 X 5.50 MM, 0.85 MM HEIGHT, PLASTIC, SOT-815-1, DHVQFN-24
针数	24	24	24	24	24
制造商包装代码	SOT340-1	SOT355-1	SOT355-1	SOT340-1	SOT815-1
Reach Compliance Code	compliant	compliant	compliant	compliant	compliant
系列	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z
JESD-30 代码	R-PDSO-G24	R-PDSO-G24	R-PDSO-G24	R-PDSO-G24	R-PQCC-N24
JESD-609代码	e4	e4	e4	e4	e4
长度	8.2 mm	7.8 mm	7.8 mm	8.2 mm	5.5 mm
逻辑集成电路类型	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER
湿度敏感等级	1	1	1	1	1
位数	9	9	9	9	9
功能数量	1	1	1	1	1
端口数量	2	2	2	2	2
端子数量	24	24	24	24	24
最高工作温度	125 °C	125 °C	125 °C	125 °C	125 °C
最低工作温度	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
输出特性	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
输出极性	TRUE	TRUE	TRUE	TRUE	TRUE
封装主体材料	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
封装代码	SSOP	TSSOP	TSSOP	SSOP	HVQCCN
封装形状	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
封装形式	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）	260	NOT SPECIFIED	NOT SPECIFIED	260	260
传播延迟（tpd）	11.5 ns	11.5 ns	11.5 ns	11.5 ns	11.5 ns
座面最大高度	2 mm	1.1 mm	1.1 mm	2 mm	1 mm
最大供电电压 (Vsup)	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V
最小供电电压 (Vsup)	1.2 V	1.2 V	1.2 V	1.2 V	1.2 V
标称供电电压 (Vsup)	1.8 V	1.8 V	1.8 V	1.8 V	2.7 V
表面贴装	YES	YES	YES	YES	YES
技术	CMOS	CMOS	CMOS	CMOS	CMOS
温度等级	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE
端子面层	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式	GULL WING	GULL WING	GULL WING	GULL WING	NO LEAD
端子节距	0.65 mm	0.65 mm	0.65 mm	0.65 mm	0.5 mm
端子位置	DUAL	DUAL	DUAL	DUAL	QUAD
处于峰值回流温度下的最长时间	30	NOT SPECIFIED	NOT SPECIFIED	30	30
宽度	5.3 mm	4.4 mm	4.4 mm	5.3 mm	3.5 mm
Base Number Matches	1	1	1	1	1
其他特性	WITH CLEAR AND CLOCK ENABLE	WITH CLEAR AND CLOCK ENABLE	WITH CLEAR AND CLOCK ENABLE	WITH CLEAR AND CLOCK ENABLE	-
Samacsys Description	-	74LVC823A - 9-bit D-type flip-flop with 5 V tolerant inputsÃ¯Â»Â¿/Ã¯Â»Â¿outputs; positiveÃ‚Â edgeÃ¯Â»Â¿-Ã¯Â»Â¿trigger; 3Ã¯Â»Â¿-Ã¯Â»Â¿state@en-us	74LVC823A - 9-bit D-type flip-flop with 5 V tolerant inputsÃ¯Â»Â¿/Ã¯Â»Â¿outputs; positiveÃ‚Â edgeÃ¯Â»Â¿-Ã¯Â»Â¿trigger; 3Ã¯Â»Â¿-Ã¯Â»Â¿state@en-us	-	74LVC823A - 9-bit D-type flip-flop with 5 V tolerant inputsÃ¯Â»Â¿/Ã¯Â»Â¿outputs; positiveÃ‚Â edgeÃ¯Â»Â¿-Ã¯Â»Â¿trigger; 3Ã¯Â»Â¿-Ã¯Â»Â¿state@en-us

74LVC823ADB,118

74LVC823ADB,118概述

74LVC823ADB,118规格参数

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