74F794 8-Bit Register with Readback
March 1990
Revised February 2004
74F794
8-Bit Register with Readback
General Description
The 74F794 is an 8-bit register with readback capability
designed to store data as well as read the register informa-
tion back onto the data bus. The I/O bus (D bus) has
3-STATE outputs. Current sinking capability is 64 mA on
both the D and Q busses.
Data is loaded into the registers on the LOW-to-HIGH tran-
sition of the clock (CP). The output enable (OE) is used to
enable data on D
0
–D
7
. When OE is LOW, the output of the
registers is enabled on D
0
–D
7
, enabling D as an output
bus. When OE is HIGH, D
0
–D
7
are inputs to the registers
configuring D as an input bus.
Features
s
3-STATE outputs on the I/O port
s
D and Q output sink capability of 64 mA
s
Functionally and pin equivalent to the 74LS794
Ordering Code:
Order Number
74F794PC
Package Number
N20A
Package Description
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Logic Symbol
Connection Diagram
© 2004 Fairchild Semiconductor Corporation
DS010652
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74F794
Input Loading/Fan-Out
Pin Names
OE
CP
D
0
–D
7
Q
0
–Q
7
Description
Output Enable Input
Clock Pulse Inputs
D Bus Inputs/
3-STATE Outputs
Q Bus Outputs
HIGH/LOW
(U.L.)
1.0/1.0
1.0/1.0
3.5/1.083
750/106.6
750/106.6
Current
20
µ
A/
−
0.6 mA
20
µ
A/
−
0.6 mA
70
µ
A/
−
650
µ
A
−
15 mA/64 mA
−
15 mA/64 mA
Truth Table
Inputs
CP
L or H or
↓
L or H or
↓
OE
L
H
L
H
Q
Q
n
Output, Q
Q
n
Input
Q
n
Output, Q (Note 1)
D
Input
Outputs
D
Logic Diagram
↑
↑
Note 1:
In this case the output of the register is clocked to the inputs and
the overall Q output is unchanged at Q
n
.
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2
74F794
Absolute Maximum Ratings
(Note 2)
Storage Temperature
Ambient Temperature under Bias
Junction Temperature under Bias
V
CC
Pin Potential to Ground Pin
Input Voltage (Note 3)
Input Current (Note 3)
ESD Last Passing Voltage (Min)
Voltage Applied to Output
In HIGH State (with V
CC
=
0V)
Standard Output
3-STATE Output
Current Applied to Output
in LOW State (Max)
Twice the Rated I
OL
(mA)
−
65
°
C to
+
150
°
C
−
55
°
to
+
125
°
C
−
55
°
C to
+
150
°
C
−
0.5V to
+
7.0V
−
0.5V to
+
7.0V
−
30 mA to
+
5.0 mA
4000V
Recommended Operating
Conditions
Free Air Ambient Temperature
Supply Voltage
0
°
C to 70
°
C
+
4.5V to
+
5.5V
−
0.5V to V
CC
−
0.5V to
+
5.5V
Note 2:
Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Note 3:
In this case the output of the register is clocked to the inputs and
the overall Q output is unchanged at Q
n
.
Note 4:
Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol
V
IH
V
IL
V
CD
V
OH
V
OL
I
IH
Parameter
Input HIGH Voltage
Input LOW Voltage
Input Clamp
Diode Voltage
Output HIGH
Voltage
Output LOW
Voltage
Input HIGH
Current
I
BVI
I
BVIT
I
CEX
V
ID
I
OD
I
IL
I
OS
I
IH
+
I
OZH
I
IL
+
I
OZL
V
ID
I
OD
I
ZZ
I
CCH
I
CCL
I
CCZ
Input HIGH Current
Breakdown Test
Input HIGH Current
Breakdown (I/O)
Output HIGH
Leakage Current
Input Leakage
Test
Output Leakage
Circuit Current
Input LOW
Current
Output Short-
Circuit Current
Output Leakage
Current
Output Leakage
Current
Input Leakage
Test
Output Circuit
Leakage Current
Bus Drainage Test
Power Supply Current
Power Supply Current
Power Supply Current
4.75
−100
4.75
2.4
2.0
Min
2.0
over Operating Temperature Range unless otherwise specified
Typ
Max
0.8
−1.2
2.8
2.44
0.45
0.55
5.0
Units
V
V
V
V
V
µA
µA
mA
µA
V
3.75
−0.6
−225
70
µA
mA
mA
µA
Min
Min
Min
Max
V
CC
Conditions
Recognized as a HIGH Signal
Recognized as a LOW Signal
I
IN
= −18
mA
I
OH
= −3
mA
I
OH
= −15
mA
I
OL
=
64 mA
V
IN
=
2.7V
V
IN
=
7.0V (OE, CP)
V
IN
=
5.5V (D
n
)
V
OUT
=
V
CC
I
ID
=
1.9
µA
All Other Pins Grounded
V
IOD
=
150 mV
All Other Pins Grounded
V
IN
=
0.5V
(OE, CP)
V
OUT
=
0V
V
OUT
=
2.7V
(Dn)
−650
µA
V
3.75
100
65
80
80
µA
µA
mA
mA
mA
Max
0.0
0.0
0.0
Max
Max
Max
V
OUT
=
0.5V
(Dn)
I
ID
=
1.9
µA
All Other Pins Grounded
V
IOD
=
150 mV
All Other Pins Grounded
V
OUT
=
5.25V
V
O
=
HIGH
V
O
=
LOW
V
O
=
HIGH Z
7.0
0.5
50
Max
Max
Max
0.0
0.0
Max
Max
Max
3
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74F794
AC Electrical Characteristics
T
A
= +25°C
Symbol
Parameter
Min
f
MAX
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
S
(H)
t
S
(L)
t
H
(H)
t
H
(L)
t
W
(H
Setup Time, HIGH or LOW
Bus to Clock
Hold Time, HIGH or LOW
Bus to Clock
Clock Pulse Width
HIGH or LOW
Output Disable Time
Maximum Clock Frequency
Propagation Delay
CP to Q
n
Output Enable Time
90
2.5
2.5
2.3
2.0
1.0
1.0
4.0
4.0
1.5
1.5
5.8
5.8
7.0
8.0
8.5
10.0
7.0
7.0
V
CC
= +5.0V
C
L
=
50 pF
Typ
Max
T
A
=
0°C to
+70°C
V
CC
= +5.0V
C
L
=
50 pF
Min
90
2.5
2.5
2.0
2.0
1.0
1.0
4.0
4.0
1.5
1.5
5.8
5.8
8.0
9.0
9.0
10.5
8.0
8.0
Max
MHz
ns
ns
ns
ns
ns
ns
Units
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4
74F794 8-Bit Register with Readback
Physical Dimensions
inches (millimeters) unless otherwise noted
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
Package Number N20A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
sonably expected to result in a significant injury to the
user.
5
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
sonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
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