52 standard frequencies between 3.57 MHz and 77.76 MHz
100% pin-to-pin drop-in replacement to quartz-based XO
Excellent total frequency stability as low as ±20 ppm
Operating temperature from -40°C to 85°C. For 125°C and/or
-55°C options, refer to
SiT1618, SiT8918, SiT8920
Low power consumption of 3.5 mA typical at 1.8V
Standby mode for longer battery life
Fast startup time of 5 ms
LVCMOS/HCMOS compatible output
Industry-standard packages: 2.0 x 1.6, 2.5 x 2.0, 3.2 x 2.5,
5.0 x 3.2, 7.0 x 5.0 mm x mm
Instant samples with
Time Machine II
and
Field Programmable
Oscillators
Ideal for DSC, DVC, DVR, IP CAM, Tablets, e-Books,
SSD, GPON, EPON, etc
Ideal for high-speed serial protocols such as: USB,
SATA, SAS, Firewire, 100M / 1G / 10G Ethernet, etc.
RoHS and REACH compliant, Pb-free, Halogen-free and
Antimony-free
For AEC-Q100 oscillators, refer to
SiT8924
and
SiT8925
Electrical Characteristics
All Min and Max limits are specified over temperature and rated operating voltage with 15 pF output load unless otherwise
stated. Typical values are at 25°C and nominal supply voltage.
Table 1. Electrical Characteristics
Parameters
Output Frequency Range
Symbol
f
Min.
Typ.
Max.
Unit
Condition
Refer to
Table 13
for the exact list of supported frequencies
Frequency Range
52 standard frequencies between
MHz
3.57 MHz and 77.76 MHz
-20
-25
-50
-20
-40
1.62
2.25
2.52
2.7
2.97
2.25
–
–
–
–
–
–
–
–
45
–
–
–
90%
Frequency Stability
F_stab
Frequency Stability and Aging
–
+20
ppm
Inclusive of initial tolerance at 25°C, 1st year aging at 25°C,
and variations over operating temperature, rated power
–
+25
ppm
supply voltage and load.
–
+50
ppm
Operating Temperature Range
–
+70
°C
Extended Commercial
–
+85
°C
Industrial
Supply Voltage and Current Consumption
1.8
1.98
V
Contact
SiTime
for 1.5V support
2.5
2.75
V
2.8
3.08
V
3.0
3.3
V
3.3
3.63
V
–
3.63
V
3.8
4.5
mA
No load condition, f = 20 MHz, Vdd = 2.8V to 3.3V
3.7
4.2
mA
No load condition, f = 20 MHz, Vdd = 2.5V
3.5
4.1
mA
No load condition, f = 20 MHz, Vdd = 1.8V
–
4.2
mA
Vdd = 2.5V to 3.3V, OE = GND, Output in high-Z state
–
4.0
mA
Vdd = 1.8 V. OE = GND, Output in high-Z state
2.6
4.3
ST = GND, Vdd = 2.8V to 3.3V, Output is weakly pulled down
̅ ̅̅
A
1.4
2.5
ST = GND, Vdd = 2.5V, Output is weakly pulled down
̅ ̅̅
A
0.6
1.3
ST = GND, Vdd = 1.8V, Output is weakly pulled down
̅ ̅̅
A
LVCMOS Output Characteristics
–
1
1.3
–
–
55
2
2.5
2
–
%
ns
ns
ns
Vdd
All Vdds. See Duty Cycle definition in
Figure 3
and
Footnote 6
Vdd = 2.5V, 2.8V, 3.0V or 3.3V, 20% - 80%
Vdd =1.8V, 20% - 80%
Vdd = 2.25V - 3.63V, 20% - 80%
IOH = -4 mA (Vdd = 3.0V or 3.3V)
IOH = -3 mA (Vdd = 2.8V and Vdd = 2.5V)
IOH = -2 mA (Vdd = 1.8V)
IOL = 4 mA (Vdd = 3.0V or 3.3V)
IOL = 3 mA (Vdd = 2.8V and Vdd = 2.5V)
IOL = 2 mA (Vdd = 1.8V)
Operating Temperature Range
T_use
Supply Voltage
Vdd
Current Consumption
Idd
OE Disable Current
Standby Current
I_OD
I_std
Duty Cycle
Rise/Fall Time
DC
Tr, Tf
Output High Voltage
VOH
Output Low Voltage
VOL
–
–
10%
Vdd
Rev 1.04
January 30, 2018
www.sitime.com
SiT1602B
Low Power, Standard Frequency Oscillator
Table 1. Electrical Characteristics (continued)
Parameters
Symbol
Min.
Typ.
–
–
87
–
–
–
–
1.8
1.8
12
14
0.5
1.3
Max.
–
30%
150
–
Unit
Pin 1, OE or ST
̅ ̅̅
Pin 1, OE or ST
̅ ̅̅
Pin 1, OE logic high or logic low, or ST logic high
̅ ̅̅
Pin 1, ST logic low
̅ ̅̅
Condition
Input Characteristics
Input High Voltage
Input Low Voltage
Input Pull-up Impedance
VIH
VIL
Z_in
70%
–
50
2
Startup Time
Enable/Disable Time
Resume Time
RMS Period Jitter
Peak-to-peak Period Jitter
RMS Phase Jitter (random)
–
–
–
–
–
T_pk
T_phj
–
–
–
–
Vdd
Vdd
k
M
ms
ns
ms
ps
ps
ps
ps
ps
ps
Startup and Resume Timing
T_start
T_oe
T_resume
T_jitt
5
138
5
Jitter
3
3
25
30
0.9
2
f = 75 MHz, Vdd = 2.5V, 2.8V, 3.0V or 3.3V
f = 75 MHz, Vdd = 1.8V
f = 75 MHz, Vdd = 2.5V, 2.8V, 3.0V or 3.3V
f = 75 MHz, Vdd = 1.8V
f = 75 MHz, Integration bandwidth = 900 kHz to 7.5 MHz
f = 75 MHz, Integration bandwidth = 12 kHz to 20 MHz
Measured from the time Vdd reaches its rated minimum value
f = 77.76 MHz. For other frequencies, T_oe = 100 ns + 3 *
cycles
Measured from the time ST pin crosses 50% threshold
̅ ̅̅
Table 2. Pin Description
Pin
Symbol
[1]
Functionality
Output Enable
H : specified frequency output
L: output is high impedance. Only output driver is disabled.
H : specified frequency output
L: output is low (weak pull down). Device goes to sleep mode. Supply
current reduces to I_std.
Any voltage between 0 and Vdd or Open : Specified frequency
output. Pin 1 has no function.
Electrical ground
Oscillator output
Power supply voltage
[2]
[1]
[1]
Top View
OE/ST/NC
VDD
1
OE/ST /NC
̅ ̅̅
Standby
No Connect
2
3
4
GND
OUT
VDD
Power
Output
Power
GND
OUT
Figure 1. Pin Assignments
Notes:
1. In OE or ST mode, a pull-up resistor of 10 kΩ or less is recommended if pin 1 is not externally driven. If pin 1 needs to be left floating, use the NC option.
̅ ̅̅
2. A capacitor of value 0.1 µF or higher between Vdd and GND is required.
Rev 1.04
Page 2 of 17
www.sitime.com
SiT1602B
Low Power, Standard Frequency Oscillator
Table 3. Absolute Maximum Limits
Attempted operation outside the absolute maximum ratings may cause permanent damage to the part. Actual performance
of the IC is only guaranteed within the operational specifications, not at absolute maximum rat ings.
Parameter
Storage Temperature
Vdd
Electrostatic Discharge
Soldering Temperature (follow standard Pb free
soldering guidelines)
Junction Temperature
[3]
Min.
-65
-0.5
–
–
–
Max.
150
4
2000
260
150
Unit
°C
V
V
°C
°C
Note:
3. Exceeding this temperature for extended period of time may damage the device.
Table 4. Thermal Consideration
[4]
Package
7050
5032
3225
2520
2016
Note:
4. Refer to JESD51 for
JA
and
JC
definitions, and reference layout used to determine the
JA
and
JC
values in the above table.
JA, 4 Layer Board
(°C/W)
142
97
109
117
152
JA, 2 Layer Board
(°C/W)
273
199
212
222
252
JC, Bottom
(°C/W)
30
24
27
26
36
Table 5. Maximum Operating Junction Temperature
[5]
Max Operating Temperature (ambient)
70°C
85°C
Maximum Operating Junction Temperature
80°C
95°C
Note:
5. Datasheet specifications are not guaranteed if junction temperature exceeds the maximum operating junction temperature.
Table 6. Environmental Compliance
Parameter
Mechanical Shock
Mechanical Vibration
Temperature Cycle
Solderability
Moisture Sensitivity Level
Condition/Test Method
MIL-STD-883F, Method 2002
MIL-STD-883F, Method 2007
JESD22, Method A104
MIL-STD-883F, Method 2003
MSL1 @ 260°C
Rev 1.04
Page 3 of 17
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SiT1602B
Low Power, Standard Frequency Oscillator
Test Circuit and Waveform
[6]
Vdd
Vout
Test Point
tr
80% Vdd
tf
4
Power
Supply
0.1 uF
1
3
2
15pF
(including probe
and fixture
capacitance)
50%
20% Vdd
High Pulse
(TH)
Period
Low Pulse
(TL)
Vdd
OE/ST Function
1 kΩ
Figure 2. Test Circuit
Note:
6. Duty Cycle is computed as Duty Cycle = TH/Period.
Figure 3. Waveform
Timing Diagrams
90% Vdd
Vdd
Vdd
50% Vdd
[7]
Pin 4 Voltage
T_start
No Glitch
during start up
ST Voltage
T_resume
CLK Output
HZ
T_start: Time to start from power-off
CLK Output
HZ
T_resume: Time to resume from ST
Figure 4. Startup Timing (OE/ ST̅ Mode)
̅ ̅
Figure 5. Standby Resume Timing ( ST̅ Mode Only)
̅ ̅
Vdd
50% Vdd
OE Voltage
T_oe
Vdd
OE Voltage
50% Vdd
T_oe
CLK Output
HZ
T_oe: Time to re-enable the clock output
CLK Output
HZ
T_oe: Time to put the output in High Z mode
Figure 6. OE Enable Timing (OE Mode Only)
Figure 7. OE Disable Timing (OE Mode Only)
Note:
7. SiT1602 has “no runt” pulses and “no glitch” output during startup or resume.
请问在matlab的simulink中进行DSPbuilder设计时，仿真的时候要调用modelsim仿真，但出现这个错误：# could not read "d:\softsetup\quartusii\quartus/libraries/vhdl/altera//alt_cusp80_packa ......
FPGA/CPLD
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