74HC4049D,74HC4050D
CMOS Digital Integrated Circuits Silicon Monolithic
74HC4049D,74HC4050D
1. Functional Description
• Hex Buffer
74HC4049D: HEX BUFFER/CONVERTER (INVERTING)
74HC4050D: HEX BUFFER/CONVERTER
2. General
The 74HC4049D and 74HC4050D are high speed CMOS HEX BUFFERs fabricated with silicon gate C
2
MOS
technology.
They achieve the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power
dissipation.
The 74HC4049D is an inverting buffer, while the 74HC4050D is a non-inverting buffer. The internal circuits
are composed of 3-stages (74HC4049D) or 2-stages (74HC4050D) of inverter, which provided high noise immunity
and stable output.
Input protection circuits are different from those of other high speed CMOS IC's. They eliminate the diodes on
the V
CC
side thus providing of logic-level conversion from high-level voltages up to 15 V to low-level voltages.
They are useful for battery back up circuits, because input voltage can be applied on IC's which are not biased
by V
CC
.
3. Features
(1)
(2)
(3)
(4)
High speed: t
pd
= 8 ns (typ.) at V
CC
= 6.0 V
Low power dissipation: I
CC
= 1.0
µA
(max) at T
a
= 25
Balanced propagation delays: t
PLH
≈
t
PHL
Wide operating voltage range: V
CC(opr)
= 2.0 V to 6.0 V
4. Packaging
SOIC16
Start of commercial production
©2016 Toshiba Corporation
1
2016-03
2016-07-07
Rev.3.0
74HC4049D,74HC4050D
5. Pin Assignment
74HC4049D
74HC4050D
6. Marking
74HC4049D
74HC4050D
7. IEC Logic Symbol
74HC4049D
74HC4050D
8. Truth Table
Input A
L
H
Output Y (74HC4049D)
H
L
Output Y (74HC4050D)
L
H
©2016 Toshiba Corporation
2
2016-07-07
Rev.3.0
74HC4049D,74HC4050D
9. Internal Equivalent Circuit
74HC4049D
74HC4050D
10. Absolute Maximum Ratings (Note)
Characteristics
Supply voltage
Input voltage
Output voltage
Input diode current
Output diode current
Output current
V
CC
/ground current
Power dissipation
Storage temperature
Symbol
V
CC
V
IN
V
OUT
I
IK
I
OK
I
OUT
I
CC
P
D
T
stg
(Note 1)
Note
Rating
-0.5 to 7.0
-0.5 to 18.0
-0.5 to V
CC
+ 0.5
-20
±20
±35
±75
500
-65 to 150
Unit
V
V
V
mA
mA
mA
mA
mW
Note:
Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or even
destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report
and estimated failure rate, etc).
Note 1: DC input voltage (V
IN
) specified is measured to GND and is not related to V
CC
.
Recommended operating range is 0 V to 15 V and it is possible to convert logic-levels from 15 V to 5 V or 5 V
to 2 V.
©2016 Toshiba Corporation
3
2016-07-07
Rev.3.0
74HC4049D,74HC4050D
11. Operating Ranges (Note)
Characteristics
Supply voltage
Input voltage
Output voltage
Operating temperature
Input rise and fall times
Symbol
V
CC
V
IN
V
OUT
T
opr
t
r
,t
f
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
Test Condition
Rating
2.0 to 6.0
0 to 15.0
0 to V
CC
-40 to 85
0 to 1000
0 to 500
0 to 400
Unit
V
V
V
ns
Note:
The operating ranges must be maintained to ensure the normal operation of the device.
Unused inputs must be tied to either V
CC
or GND.
12. Electrical Characteristics
12.1. DC Characteristics (Unless otherwise specified, T
a
= 25
)
Characteristics
High-level input voltage
Symbol
V
IH
Test Condition
V
CC
(V)
2.0
4.5
6.0
Low-level input voltage
V
IL
2.0
4.5
6.0
High-level output voltage
V
OH
V
IN
= V
IH
or V
IL
I
OH
= -20
µA
2.0
4.5
6.0
I
OH
= -6 mA
I
OH
= -7.8 mA
Low-level output voltage
V
OL
V
IN
= V
IH
or V
IL
I
OL
= 20
µA
4.5
6.0
2.0
4.5
6.0
I
OL
= 6 mA
I
OL
= 7.8 mA
Input leakage current
Quiescent supply current
I
IN
I
CC
V
IN
= V
CC
or GND
V
IN
= 15 V
V
IN
= V
CC
or GND
4.5
6.0
6.0
6.0
6.0
Min
1.50
3.15
4.20
1.9
4.4
5.9
4.18
5.68
Typ.
2.0
4.5
6.0
4.31
5.80
0.0
0.0
0.0
0.17
0.18
Max
0.50
1.35
1.80
0.1
0.1
0.1
0.26
0.26
±0.1
±0.5
1.0
µA
µA
µA
V
V
V
Unit
V
©2016 Toshiba Corporation
4
2016-07-07
Rev.3.0
74HC4049D,74HC4050D
12.2. DC Characteristics (Unless otherwise specified, T
a
= -40 to 85
)
Characteristics
High-level input voltage
Symbol
V
IH
Test Condition
V
CC
(V)
2.0
4.5
6.0
Low-level input voltage
V
IL
2.0
4.5
6.0
High-level output voltage
V
OH
V
IN
= V
IH
or V
IL
I
OH
= -20
µA
2.0
4.5
6.0
I
OH
= -6 mA
I
OH
= -7.8 mA
Low-level output voltage
V
OL
V
IN
= V
IH
or V
IL
I
OL
= 20
µA
4.5
6.0
2.0
4.5
6.0
I
OL
= 6 mA
I
OL
= 7.8 mA
Input leakage current
Quiescent supply current
I
IN
I
CC
V
IN
= V
CC
or GND
V
IN
= 15 V
V
IN
= V
CC
or GND
4.5
6.0
6.0
6.0
6.0
Min
1.50
3.15
4.20
1.9
4.4
5.9
4.13
5.63
Max
0.50
1.35
1.80
0.1
0.1
0.1
0.33
0.33
±1.0
±5.0
10.0
µA
µA
µA
V
V
V
Unit
V
12.3. AC Characteristics (Unless otherwise specified, T
a
= 25
, Input: t
r
= t
f
= 6 ns)
Characteristics
Output transition time
Symbol
t
TLH
,t
THL
Note
Test
Condition
C
L
(pF)
50
V
CC
(V)
2.0
4.5
6.0
Propagation delay time
t
PLH
,t
PHL
50
2.0
4.5
6.0
150
2.0
4.5
6.0
Input capacitance
Power dissipation
capacitance
C
IN
C
PD
(Note 1)
Min
Typ.
25
6
5
30
9
8
45
14
12
5
26
Max
60
12
10
75
15
13
100
20
17
10
pF
pF
ns
Unit
ns
Note 1: C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current
consumption without load. Average operating current can be obtained by the equation.
I
CC(opr)
= C
PD
×
V
CC
×
f
IN
+ I
CC
/6 (per bit)
©2016 Toshiba Corporation
5
2016-07-07
Rev.3.0
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
