Si32260/61
Single-Chip Dual ProSLIC®
Description
The Si32260/1 Dual ProSLIC® devices, in a single package,
implement two complete foreign exchange station (FXS) telephony
interfaces. The Si32260/1 devices operate from a 3.3 V supply
and have standard PCM/SPI or GCI bus digital interfaces. A pair of
built-in dc-dc converter controllers can be used to automatically
generate the optimal battery voltage required for each line-state,
optimizing efficiency and minimizing heat generation. The
Si32260/1 devices are designed to operate not only with a tracking
battery supply for each channel for lowest power consumption, but
also with shared battery supplies, for lowest cost. When used with
shared battery supplies, the internal dc-dc controller operates in
Tracking Shared Supply (TSS) mode to deliver power
consumption lower than typical fixed voltage shared rail designs.
Self-testing and metallic loop testing (MLT) (e.g., GR-909) is
facilitated by the built-in DSP, monitor ADC, and test load. The
devices are available with linefeed voltage ratings of –110 V
(Si32260) or –140 V (Si32261) to support high voltage ringing, and
both devices support wideband audio for better-than-PSTN voice
quality. The Si32260/1 devices are available in a 8 x 8 mm 60-pin
QFN package.
Si32260/61 Features
Two complete FXS channels in 8 x 8 mm
Performs all BORSCHT functions
Ideal for short- or long-loop applications
Ultra low power consumption
Internal balanced or unbalanced ringing
Patented low power ringing
Adaptive ringing
Simplified configuration and diagnostics
Supported by ProSLIC API
GR-909 loop diagnostics
Audio diagnostics with loopback
Integrated test load
Wideband voice support
On-hook transmission
Loop or ground start operation
Smooth polarity reversal
Pulse metering
PCM and SPI bus digital interfaces with programmable
interrupts
Software-programmable parameters:
Ringing frequency, amplitude, cadence, and waveshape
Two-wire ac impedance
Transhybrid balance
DC current loop feed (10–45 mA)
Loop closure and ring trip thresholds
Ground key detect threshold
Integrated dc-dc controllers with direct connection to MOSFET
Three high voltage supply options
Full tracking
Tracking shared supplies
Fixed rail
DTMF generator/decoder
A-Law/µ-Law companding, linear PCM
GCI/IOM-2 mode support
3.3 V operation
Pb-free/RoHS-compliant packaging
Applications
VoIP gateways and routers
xDSL IADs
Optical Network Terminals/Units (ONT/U)
Analog Terminal Adapters (ATA)
Cable eMTA
Wireless Fixed Terminals (WFT)
Wireless Local Loop (WLL)
WiMAX CPE
Private Branch Exchange (PBX)
VoIP MDU gateways
BAT_PO
BASEa
BASEb
RINGa
VBATa
VBATb
RINGb
48
N/C
N/C
N/C
N/C
N/C
TIPa
1
60
59
56
54
51
49
N/C
47
N/C
46
45
44
TIPb
N/C
VDDA
GPIO2b / SRINGCb
GPIO1b / STIPCb
SRINGDCb
SRINGACb
STIPACb
STIPDCb
IREF
CAPPb
CAPMb
SVBATb
SDI
SDO
58
57
55
53
52
DTX
CS
SDI
SDO
SCLK
INT
RST
ADC
ADC
DAC
DAC
CODEC
ADC
DAC
Linefeed
DRX
DTMF &
Tone Gen
Caller ID
Programmable
Programmable
AC Impedance
AC Impedance
and Hybrid
FSYNC
PCM/
GCI
Interface
CODEC
SLIC
Linefeed
Control
Linefeed
Monitor
N/C
2
GPIO2A / SRINGCa
3
TIP
GPIO1a / STIPCa
4
SRINGDCa
5
SRINGACa
6
STIPACa
7
STIPDCa
8
CAPPa
9
CAPMa
10
SVBATa
11
50
EPAD 1
43
42
41
40
39
38
37
RING
Linefeed
SPI
Control
Interface
Ringing
Generator
DSP
SLIC
Linefeed
Control
Linefeed
Monitor
EPAD 2
36
35
34
33
32
Line Diagnostics
PLL
DC-DC Controllers
DC-DC Controller
TIP
SVDC
12
RSTB
13
INTB / DTXENB
14
FSYNC
15
SDITHRU
16
PSCLK / PCLK
17
DATAo / DTX
18
DATAi / DRX
19
CSB
AUXdrv / DCFFb
DCDRVb
SDCLb
Si32260/1
ProSLIC
Copyright © 2011 by Silicon Laboratories
AUXoi / DCFFa
VDDREG
DCDRVa
SDCHa
SDCHb
SDCLa
VDDD
SCLK
PCLK
RING
20
21
22
23
24
25
26
27
28
29
30
31
7.8.11
Si32260/61
Single-Chip Dual ProSLIC®
Selected Electrical Specifications
Parameter
Ambient Temperature
Supply Voltage
Battery Voltage
Maximum Loop Resistance
(loop + load)
DC Differential Output
Resistance
Idle Channel Noise
PSRR from V
DD
Longitudinal to Metallic/PCM
Balance (forward or reverse)
Metallic/PCM to Longitudinal Balance
Longitudinal Impedance
Longitudinal Current per Pin
DC Feed Current
2-Wire Return Loss
Transhybrid Balance
Thermal Resistance (QFN-60)
θ
JA
200 Hz to 3.4 kHz
300 Hz to 3.4 kHz
Symbol
T
A
V
DD
V
BAT
R
LOOP
R
DO
I
LOOP
=18 mA, V
BAT
= –52 V
I
LOOP
< I
LIM
C-Message weighted
RX and TX, dc to 3.4 kHz
200 Hz to 1 kHz
1 kHz to 3.4 kHz
200 Hz to 3.4 kHz
200 Hz to 3.4 kHz at
TIP or RING
Active off-hook
200 Hz to 3.4 kHz
Test Condition
F-Grade
G-Grade
Min
0
–40
3.13
–15
—
160
—
—
58
53
40
—
—
—
26
26
—
Typical
25
25
3.3
—
—
—
8
55
60
58
—
50
25
—
30
30
42
Max
70
85
3.47
–110/–140
2000
640
12
—
—
—
—
—
—
45
—
—
—
Unit
°C
°C
V
V
dBrnC
dB
dB
dB
dB
mA
mA
dB
dB
°C/W
Ordering Guide
FXS Pin
Si32260-C-FM
Si32260-C-GM
Si32261-C-FM
Si32261-C-GM
Description
Dual FXS, wideband capable
Dual FXS, wideband capable
Dual FXS, wideband capable
Dual FXS, wideband capable
Max Vbat
–110 V
–110 V
–140 V
–140 V
Temperature
0 to 70 °C
–40 to 85 °C
0 to 70 °C
–40 to 85 °C
*Note:
Adding the suffix "R" to the part number (e.g., Si32261-C-FMR) denotes tape and ree
Package Information 60-pin QFN
MM
Min
A
b
c
D
D2
D3
e
E
E2
E3
E4
E5
L
L1
aaa
bbb
ccc
ddd
2.46
3.34
0.35
0.05
6.35
6.35
0.60
0.20
0.25
Typ
0.65
0.25
0.30
8.00 BSC
6.40
7.50 BSC
0.50 BSC
8.00 BSC
6.40
7.50 BSC
2.51
3.39
0.40
0.10
2.56
3.44
0.45
0.15
0.15
0.15
0.10
0.10
6.45
6.45
Max
0.70
0.30
0.35
ProSLIC
Copyright © 2011 by Silicon Laboratories
Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc.
Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders
7.8.11
DSP 与 ARM 处理器
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