be safely inserted and removed from a live backplane.
Using one or more external N-channel pass transistors,
board supply voltage and inrush current are ramped up
at an adjustable rate. An I
2
C interface and onboard ADC
allows for monitoring of board current, voltage, power,
energy and fault status.
The device features analog foldback current limiting and
supply monitoring for applications from 2.9V to 33V.
Dual 12V gate drive allows high power applications to
either share safe operating area across parallel MOSFETs
or support a 2-stage start-up that first charges the load
capacitance followed by enabling a low on-resistance
path to the load.
The LTC4282 is well suited to high power applications
because the precise monitoring capability and accurate
current limiting reduce the extremes in which both loads
and power supplies must safely operate. Non-volatile
configuration allows for flexibility in the autonomous
generation of alerts and response to faults.
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and Hot
Swap is a trademark of Linear Technology Corporation. All other trademarks are the property of
their respective owners. Patents pending.
n
n
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n
n
n
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n
n
n
n
applicaTions
n
n
n
n
Allows Safe Board Insertion Into Live Backplane
12-/16-Bit ADC with ±0.7% Total Unadjusted Error
Monitors Current, Voltage, Power and Energy
Controls Two Parallel N-Channel MOSFETs for High
Current Applications
Internal EEPROM for Nonvolatile Configuration
Wide Operating Voltage Range: 2.9V to 33V
I
2
C/SMBus Digital Interface (Coexists with PMBus
Devices)
12V Gate Drive for Lower MOSFET R
DS(ON)
Programmable Current Limit with 2% Accuracy
MOSFET Power Limiting with Current Foldback
Continuously Monitors MOSFET Health
Stores Minimum and Maximum Measurements
Alerts When Alarm Thresholds Exceeded
Input Overvoltage/Undervoltage Protection
Three General Purpose Input/Outputs
Internal ±5% or External Timebases
32-Pin 5mm
×
5mm QFN Package
Enterprise Servers and Data Storage Systems
Network Routers and Switches
Base Stations
Platform Management
Typical applicaTion
12V, 100A Plug-In Board Application
0.25m
12V
0.25m
SMCJ15CA
×2
CONNECTOR 2
CONNECTOR 1
1
1
1
1
V
OUT
12V
100A
Start-Up Waveforms
10
+
V
DD
10V/DIV
CONTACT BOUNCE
10
V
DD
SENSE2
+
ADC
+
SENSE1
+
SENSE1
–
ADC
–
SENSE2
–
GATE1 GATE2
NC
NC
UV
OV
SDAI
SDAO
SCL
ALERT
ADR0
ADR1
ADR2
ON
SOURCE
FB
LTC4282
GPIO1
GPIO2
INTV
CC
4.7µF
TIMER
10nF
WP CLKIN CLKOUT GND
NC
GPIO3
4282 TA01
∆V
GATE
10V/DIV
50ms DE-BOUNCE
V
SOURCE
10V/DIV
GPIO1(PG)
10V/DIV
20ms/DIV
4282 TA01b
SDA
SCL
ALERT
NC
POWER
GOOD
GP
GP
NC
12V
100k
GND
BACKPLANE PLUG-IN
BOARD
For more information
www.linear.com/LTC4282
1
4282f
LTC4282
absoluTe MaxiMuM raTings
(Notes 1, 2)
pin conFiguraTion
TOP VIEW
SENSE1
+
SENSE2
+
SENSE1
–
SENSE2
–
24 GATE2
23 GATE1
22 SOURCE
33
21 FB
20 GND
19 GPIO1
18 GPIO2
17 GPIO3
9 10 11 12 13 14 15 16
SDAI
SDAO
ADR0
ADR1
ADR2
SCL
ALERT
NC
ADC
+
ADC
–
V
DD
UV
ON 1
OV 2
GND 3
WP 4
INTV
CC
5
TIMER 6
CLKOUT 7
CLKIN 8
Supply Voltage (V
DD
) ................................. –0.3V to 45V
Input Voltages
GATEn – SOURCE (Note 3) .................... –0.3V to 10V
SENSEn
+
, ADC
+
,
SENSE1
–
............................. V
DD
– 4.5V to V
DD
+ 0.3V
SENSE2
–
, ADC
–
. ......................... –0.3V to V
DD
+ 0.3V
SOURCE................................................. –0.3V to 45V
ADR0-2, TIMER .....................–0.3V to INTV
CC
+ 0.3V
CLKIN ................................................... –0.3V to 5.5V
UV, OV, FB, WP, ON, GPIO1-3,
SCL, SDAI .............................................. –0.3V to 45V
Output Voltages
INTV
CC
.................................................. –0.3V to 5.5V
GATE1,2, GPIO1-3,
ALERT,
SDAO ........... –0.3V to 45V
CLKOUT ................................... –0.3 to INTV
CC
+ 0.3V
Output Current INTV
CC
(V
DD
> 4V) ........................25mA
Operating Ambient Temperature Range
LTC4282C ................................................ 0°C to 70°C
LTC4282I .............................................–40°C to 85°C
Storage Temperature Range .................. –65°C to 125°C
32 31 30 29 28 27 26 25
UH PACKAGE
32-LEAD (5mm
×
5mm) PLASTIC QFN
T
JMAX
= 125°C,
θ
JA
= 44°C/W
EXPOSED PAD (PIN 33) PCB GND
ELECTRICAL CONNECTION OPTIONAL
orDer inForMaTion
LEAD FREE FINISH
LTC4282CUH#PBF
LTC4282IUH#PBF
TAPE AND REEL
LTC4282CUH#TRPBF
LTC4282IUH#TRPBF
PART MARKING*
4282
4282
PACKAGE DESCRIPTION
32-Lead (5mm
×
5mm) Plastic QFN
32-Lead (5mm
×
5mm) Plastic QFN
TEMPERATURE RANGE
0°C to 70°C
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on nonstandard lead based finish parts.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
DD
= 12V unless otherwise noted.
SYMBOL
Supplies
V
DD
I
DD
V
DD(UVL)
V
DD(HYST)
INTV
CC
Input Supply Range
Input Supply Current
Input Supply Undervoltage Lockout
Input Supply Undervoltage Lockout
Hysteresis
Internal Regulator Voltage
V
DD
Rising
l
l
l
l
l
elecTrical characTerisTics
PARAMETER
CONDITIONS
MIN
2.9
TYP
MAX
33
UNITS
V
mA
V
mV
V
4282f
3.5
2.65
15
3.1
2.7
40
3.3
8
2.75
75
3.5
2
For more information
www.linear.com/LTC4282
LTC4282
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
DD
= 12V unless otherwise noted.
SYMBOL
INTV
CC(UVL)
INTV
CC(HYST)
Current Limit
ΔV
SENSE1
–ΔV
SENSE2
ΔV
SENSE
Offset Between Channel 1 and Channel 2
Current Limit Voltage DAC Zero-Scale
Current Limit Voltage DAC Full-Scale
Current Limit Voltage DAC INL
Fast Current Limit Comparator Offset
I
SENSE–
I
SENSE+
Gate Drive
ΔV
GATE_OUT
I
GATE
Gate Drive (V
GATE
– V
SOURCE
) (Note 3)
Gate Pull-Up Current
Gate Pull-Down Current
Gate Fast Pull-Down Current
t
PHL_FAST
ΔV
GATE_TH
Comparator Inputs
V
TH-R
V
TH-F
V
TH-R
V
TH-F
V
TH
V
HYST
I
IN
V
TH
V
TH
V
HYST
t
PHL
t
D
V
DD
, SOURCE Rising Threshold Voltages for
UV, Power Good
(Note 6)
V
DD
, SOURCE Falling Threshold Voltages for
UV, Power Good
(Note 6)
V
DD
Rising Threshold Voltages for OV
(Note 6)
V
DD
Falling Threshold Voltages for OV
(Note 6)
UV, OV, FB, ON Rising Threshold
UV, OV, FB, ON Hysteresis
UV, OV, FB, ON, WP Input Current
FET-Bad Fault V
DS
Threshold
WP Threshold Voltage
WP Hysteresis
Turn-Off Propagation Delay
Fast Turn-On Propagation Delay
Debounced Turn-On Propagation Delay
Crystal Oscillator Pin Functions
V
TH
f
MAX
I
CLKIN
I
CLKOUT
CLKIN Rising Threshold
Maximum CLKIN Pin Input Frequency
CLKIN Input Current
CLKOUT Output Current
V = 0V to 3.3V
V = 0V to 3.3V
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l
l
l
elecTrical characTerisTics
PARAMETER
INTV
CC
Undervoltage Lockout
CONDITIONS
INTV
CC
Rising
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l
MIN
2.45
50
TYP
2.6
110
0
MAX
2.7
175
±0.25
12.75
4.1
35.87
11.81
0.05
±15
±1
60
13.5
–30
3
1.5
1
10
–10
–15
–20
–15
–20
–25
15
20
25
10
15
20
1.3
63
±1
270
1.3
35
45
45
55
2
25
10
150
UNITS
V
mV
mV
mV
mV
mV
mV
LSB
mV
µA
µA
V
µA
mA
A
µs
V
%
%
%
%
%
%
%
%
%
%
%
%
V
mV
µA
mV
V
mV
µs
µs
ms
V
MHz
µA
µA
INTV
CC
Undervoltage Lockout Hysteresis
V
SENSE1,2+
= 12V
V
FB
= 1.3V, I
LIM
= 000
V
FB
= 0V, I
LIM
= 000
V
FB
= 1.3V, I
LIM
= 111
V
FB
= 0V, I
LIM
= 111
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l
12.25
3.4
32.88
8.81
–0.05
12.5
3.75
34.37
10.31
0
0
0
SENSE
–
Pin Input Current
SENSE
+
Pin Input Current
V
SENSE–
= 12V
V
SENSE+
= 12V
V
DD
= 2.9V to 33V, I
GATE
= –1µA
Gate On, V
GATE
= 0V
Gate Off, V
GATE
= 10V
ΔV
SENSE
=100mV, ΔV
GATE
= 10V
ΔV
SENSE
=0mV Step to 100mV,
C = 10nF
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l
0
10
–15
0.5
0.3
45
12.5
–20
1.3
0.6
0.5
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l
l
GATE1,2 Low
SENSE1,2
+
–SENSE1,2
–
Overcurrent to
ΔV
GATE
FET Off Threshold
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5
–5
–10
–15
–10
–15
–20
10
15
20
5
10
15
1.26
23
150
1.26
2
10
10
45
0.4
–10
–150
8
–7.5
–12.5
–17.5
–12.5
–17.5
–22.5
12.5
17.5
22.5
7.5
12.5
17.5
1.28
43
0
200
1.28
20
25
25
50
1
5%
10%
15%
5%
10%
15%
5%
10%
15%
5%
10%
15%
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V = 1.2V
Falling
ON, UV, OV Turn Off
ON Pin Turn On
UV, OV Pin Turn On
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For more information
www.linear.com/LTC4282
3
4282f
LTC4282
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
DD
= 12V unless otherwise noted.
SYMBOL
GPIO Pin Functions
V
TH
V
HYST
V
OL
I
OH
t
PHL_GPIO2
TIMER Pin Functions
V
TH
I
TIMER
D
OC
I
SOURCE
I
ADC
–
I
ADC
+
ADC
V
OS
TUE
TIMER Low Threshold
TIMER High Threshold
TIMER Pull-Up Current
TIMER Pull-Down Current
Overcurrent Auto-Retry Duty Cycle
SOURCE Input Current
ADC
–
Input Current
ADC
+
Input Current
Resolution (No Missing Codes)
ADC Offset Error, Percent of Full-Scale
ADC Total Unadjusted Error (Note 5)
ΔV
ADC
, SOURCE, V
DD
, GPIO
POWER
ENERGY (Internal Timebase)
ENERGY (Crystal/External Timebase)
ΔV
ADC
, SOURCE, V
DD
, GPIO
POWER
ENERGY (Internal Timebase)
ENERGY (Crystal/External Timebase)
ΔV
ADC
SOURCE/V
DD
24V Range
SOURCE/V
DD
12V Range
SOURCE/V
DD
5V Range
SOURCE/V
DD
3.3V Range
GPIO
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l
l
elecTrical characTerisTics
PARAMETER
GPIO,
ALERT
Threshold
GPIO,
ALERT
Hysteresis
GPIO,
ALERT
Output Low Voltage
GPIO,
ALERT
Leakage Current
CONDITIONS
Falling
I = 3mA
V = 33V
GATE Low or V
DS
= 1V
Falling
Rising
V = 0V
V = 1.3V
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MIN
1.26
2
TYP
1.28
20
0.3
0
MAX
1.31
35
0.4
±1
30
0.19
1.31
–22
7
0.11
350
±1
110
±0.25
±0.7
±1.0
±5.1
±1.0
±0.7
±1.0
±5.1
±1.0
UNITS
V
mV
V
µA
µs
V
V
µA
µA
%
µA
µA
µA
Bits
%
%
%
%
%
%
%
%
%
mV
V
V
V
V
V
Stress Condition to GPIO2 Low Propagation
5
0.11
1.25
–18
3
0.045
70
13
0.15
1.28
–20
5
0.08
180
0
25
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SOURCE, ADC Pin Currents
V = 12V
V = 33V
V = 33V
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12/16
FSE
ADC Full-Scale Error
V
FS
ADC Full-Scale Range
40
33.28
16.64
8.32
5.547
1.28
0.2
40
33.28
16.64
8.32
5.547
1.28
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INL
V
FS
ADC Integral Nonlinearity, 12-Bit Mode
Alarm Threshold Full-Scale Range
(256 •
V
LSB
)
ΔV
ADC
SOURCE/V
DD
24V Range
SOURCE/V
DD
12V Range
SOURCE/V
DD
5V Range
SOURCE/V
DD
3.3V Range
GPIO
V = 1.28
12-Bit Mode, Internal Clock
16-Bit Mode, Internal Clock
5
LSB
mV
V
V
V
V
V
MΩ
R
GPIO
f
CONV
= 1/t
CONV
I
2
C Interface
V
ADR(H)
V
ADR(L)
I
ADR(IN)
I
ADR(IN,Z)
V
SDA,SCL(TH)
GPIO ADC Sampling Resistance
Conversion Rate, All ADC Channels
1
14.5
0.906
2
15.26
0.954
16
1
INTV
CC
– 0.2
0.8
±80
±3
Hz
Hz
V
V
µA
µA
V
4282f
ADRn Input High Threshold
ADRn Input Low Threshold
ADRn Input Current
ADRn Allowable Leakage in Open State
SDAI, SCL Input Threshold
ADR = 0V, ADR = INTV
CC
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l
l
l
INTV
CC
INTV
CC
– 0.8
– 0.5
0.2
0.5
1.5
1.7
2.0
4
For more information
www.linear.com/LTC4282
LTC4282
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
DD
= 12V unless otherwise noted.
SYMBOL
I
SDA,SCL(OH)
V
SDAO(OL)
I
SDAO(OH)
f
SCL(MAX)
t
BUF(MIN)
t
HD,STA(MIN)
t
SU,STA(MIN)
t
SU,STO(MIN)
t
HD,DATI(MIN)
t
HD,DATO
t
SU,DAT(MIN)
t
SP(MAX)
C
X
t
D-STUCK
EEPROM Characteristics
Endurance
Retention
t
WRITE
Write Operation Time
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
All currents into pins are positive. All voltages are referenced to
GND unless otherwise specified.
Note 3:
An internal clamp limits the GATE pin to a minimum of 10V above
SOURCE. Driving this pin to voltages beyond the clamp may damage the
device.
1 Cycle = 1 Write (Notes 7, 8)
(Notes 7, 8)
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l
l
elecTrical characTerisTics
PARAMETER
SDAI, SCL Input Current
SDAO Output Low Voltage
SDAO Pin Input Leakage Current
Maximum SCL Clock Frequency
CONDITIONS
SCL, SDA = 5V
I = 3mA
V
SDAO
= 33V
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MIN
TYP
0.3
0
MAX
±1
0.4
±1
UNITS
µA
V
µA
kHz
I
2
C Interface Timing
Bus Free Time Between START and STOP
Conditions
Hold Time After (Repeated) START Condition
Repeated START Condition Set-Up Time
STOP Condition Set-Up Time
Data Hold Time (Input)
Data Hold Time (Output)
Data Set-Up Time
Suppressed Spike Pulse Width Maximum
SCL, SDA Input Capacitance
I
2
C Stuck Bus Timeout
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400
1000
0.12
30
30
140
30
1.3
600
600
600
100
900
600
250
10
35
µs
µs
ns
ns
ns
ns
ns
ns
pF
ms
Cycles
Years
300
50
25
10,000
20
1
500
30
110
30
(Note 4)
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l
2.2
4
ms
Note 4:
Guaranteed by design and not subject to test.
Note 5:
TUE is the maximum ADC error for any code, given as a
percentage of full scale.
Note 6:
UV, OV and FB internal thresholds are given as a percent
difference from the configured operating voltage.
Note 7:
EEPROM endurance and retention are guaranteed by design,
characterization and correlation with statistical process controls.
Note 8:
EEPROM endurance and retention will be degraded when T
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