LT1970A
500mA Power Op Amp with
Adjustable Precision Current Limit
FeaTures
n
n
DescripTion
The
LT
®
1970A
is a ± 500mA power op amp with precise
externally controlled current limiting. Separate control
voltages program the sourcing and sinking current limit
sense thresholds with 1% accuracy. Output current may
be boosted by adding external power transistors.
The circuit operates with single or split power supplies
from 5V to 36V total supply voltage. In normal opera-
tion, the input stage supplies and the output stage sup-
plies are connected (V
CC
to V
+
and V
EE
to V
–
). To reduce
power dissipation it is possible to power the output stage
(V
+
, V
–
) from independent, lower voltage rails. The amplifier
is unity-gain stable with a 3.6MHz gain-bandwidth product
and slews at 1.6V/µs. The LT1970A can drive capacitive
and inductive loads directly.
Open-collector status flags signal current limit circuit
activation, as well as thermal shutdown of the amplifier.
An enable logic input puts the amplifier into a low power,
high impedance output state when pulled low. Thermal
shutdown and a ±800mA fixed current limit protect the
chip under fault conditions.
The LT1970A is packaged in a 20-lead TSSOP package with
a thermally conductive copper bottom plate to facilitate
heat sinking.
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± 500mA Minimum Output Current
Independent Adjustment of Source and
Sink Current Limits
1% Current Limit Accuracy
Improved Reactive Load Driving Stability
Operates with Single or Split Supplies
Shutdown/Enable Control Input
Open-Collector Status Flags:
Sink Current Limit
Source Current Limit
Thermal Shutdown
Fail-Safe Current Limit and Thermal Shutdown
1.6V/µs Slew Rate
3.6MHz Gain-Bandwidth Product
Specified Temperature Range: –40°C to 85°C
Available in a 20-Lead TSSOP Package
applicaTions
n
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Automatic Test Equipment
Laboratory Power Supplies
Motor Drivers
Thermoelectric Cooler Driver
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Typical applicaTion
Device Power Supply (DPS) with ±500mA Adjustable Current Limit
V
LIMIT
0V TO 5V
20V
20V
6k
CURRENT LIMIT = 500mA
V
I
OUT(MAX)
= ±
LIMIT
10 • R
CS
I
OUT
R
CS
1
1/4W
TRACE R TRACE L
100m
200nH
4.7µF
SENSE
ESR
0.1
1970A TA01
V
CC
V
IN
V
+
EN
VC
SRC
+IN
VC
SNK
ISNK
V
LOAD
, R
LOAD
= 100
ISRC
TSD
LT1970A
OUT
SENSE
+
SENSE
–
V
–
–IN
V
EE
COMMON
2V/DIV
V
LOAD
,
R
LOAD
= 10
V
IN
, 5V/DIV
LOAD
0V
–5V
10k
100pF
100µs/DIV
1970A TA01b
1970afc
For more information
www.linear.com/LT1970A
1
LT1970A
absoluTe MaxiMuM raTings
(Note 1)
pin conFiguraTion
TOP VIEW
V
EE
V
–
OUT
SENSE
+
FILTER
SENSE
–
V
CC
–IN
+IN
1
2
3
4
5
6
7
8
9
21
20 V
EE
19 V
+
18
TSD
17
ISNK
16
ISRC
V
EE
10
FE PACKAGE
20-LEAD PLASTIC TSSOP
T
JMAX
= 150°C,
θ
JA
= 40°C/W (NOTE 8)
EXPOSED PAD (PIN 21) IS CONNECTED TO V
EE
orDer inForMaTion
LEAD FREE FINISH
LT1970ACFE#PBF
LT1970AIFE#PBF
TAPE AND REEL
LT1970ACFE#TRPBF
LT1970AIFE#TRPBF
PART MARKING*
LT1970AFE
LT1970AFE
PACKAGE DESCRIPTION
20-Lead Plastic TSSOP
20-Lead Plastic TSSOP
SPECIFIED TEMPERATURE RANGE
0°C to 70°C
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/.
Some packages are available in 500 unit reels through
designated sales channels with #TRMPBF suffix.
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. See Test Circuit for standard test conditions.
SYMBOL
V
OS
PARAMETER
Input Offset Voltage
Input Offset Voltage Drift (Note 4)
I
OS
I
B
Input Offset Current
Input Bias Current
Input Noise Voltage
V
CM
= 0V
V
CM
= 0V
0.1Hz to 10Hz
CONDITIONS
MIN
TYP
200
l
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l
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elecTrical characTerisTics
Power Op Amp Characteristics
0°C < T
A
< 70°C
–40°C < T
A
< 85°C
600
1000
1300
10
100
–160
3
µV
µV
µV
µV/°C
nA
nA
µV
P-P
1970afc
2
For more information
www.linear.com/LT1970A
+ –
–10
–100
–600
Supply Voltage (V
CC
to V
EE
) ..................................... 36V
Positive High Current Supply (V
+
)................... V
–
to V
CC
Negative High Current Supply(V
–
) ....................V
EE
to V
+
Amplifier Output (OUT) ..................................... V
–
to V
+
Current Sense Pins
(SENSE
+
, SENSE
–
, FILTER) ........................... V
–
to V
+
Logic Outputs (ISRC,
ISNK, TSD)
....... COMMON to V
CC
Input Voltage (–IN, +IN) ............ V
EE
– 0.3V to V
EE
+ 36V
Input Current......................................................... 10mA
Current Control Inputs
(VC
SRC
, VC
SNK
) .............. COMMON to COMMON + 7V
Enable Logic Input .............................. COMMON to V
CC
COMMON ....................................................... V
EE
to V
CC
Output Short-Circuit Duration ......................... Indefinite
Operating Temperature Range (Note 2)....–40°C to 85°C
Specified Temperature Range (Note 3)
LT1970AC ................................................ 0°C to 70°C
LT1970AI.............................................. –40°C to 85°C
Maximum Junction Temperature.......................... 150°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec) .................. 300°C
15 ENABLE
14 COMMON
13 VC
SRC
12 VC
SNK
11 V
EE
MAX
UNITS
–4
LT1970A
elecTrical characTerisTics
SYMBOL
e
n
i
n
R
IN
C
IN
V
CM
CMRR
PSRR
PARAMETER
Input Noise Voltage Density
Input Noise Current Density
Input Resistance
Input Capacitance
Input Voltage Range
Common Mode Rejection Ratio
Power Supply Rejection Ratio
1kHz
1kHz
Common Mode
Differential Mode
Pin 8 and Pin 9 to Ground
Typical
Guaranteed by CMRR Test
–12V < V
CM
< 12V
V
EE
= V
–
= –5V, V
CC
= V
+
= 3V to 30V
V
EE
= V
–
= –5V, V
CC
= 30V, V
+
= 2.5V to 30V
V
EE
= V
–
= –3V to – 30V, V
CC
= V
+
= 5V
V
EE
= –30V, V
–
= –2.5V to –30V, V
CC
= V
+
= 5V
R
L
= 1k, –12.5V < V
OUT
< 12.5V
R
L
= 100Ω, –12.5V < V
OUT
< 12.5V
l
l
l
l
l
l
l
l
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. See Test Circuit for standard test conditions.
CONDITIONS
MIN
TYP
15
3
500
100
6
–14.5
–12.0
92
90
110
90
110
100
75
80
40
20
5
13.6
12.0
105
100
130
100
130
150
120
45
1.9
0.8
1.7
1.0
800
–800
1.6
3.6
8
0.1
0.1
15
45
495
480
–1
–500
–500
–500
200
–300
–25
250
–250
±0.1
±0.05
±0.01
±0.05
±0.01
4
20
50
500
500
–0.2
7
10
25
55
505
520
0.1
500
500
500
300
–200
25
2.5
2.3
1200
–500
MAX
UNITS
nV/√Hz
pA/√Hz
kΩ
kΩ
pF
V
V
dB
dB
dB
dB
dB
V/mV
V/mV
V/mV
V/mV
V/mV
V/mV
V
V
V
V
mA
mA
V/µs
kHz
MHz
µs
mV
mV
mV
mV
mV
mV
µA
nA
nA
nA
µA
µA
µA
%
%
%
%
%
1970afc
A
VOL
Large-Signal Voltage Gain
R
L
= 10Ω, –5V < V
OUT
< 5V, V
+
= – V
–
= 8V
l
V
OL
V
OH
I
SC
SR
FPBW
GBW
t
S
Output Sat Voltage Low
Output Sat Voltage High
Output Short-Circuit Current
Slew Rate
Full Power Bandwidth
Gain-Bandwidth Product
Settling Time
V
OL
= V
OUT
– V
–
R
L
= 100, V
CC
= V
+
= 15V, V
EE
= V
–
= –15V
R
L
= 10, V
CC
= – V
EE
= 15V, V
+
= –V
–
= 5V
V
OH
= V
+
– V
OUT
R
L
= 100, V
CC
= V
+
= 15V, V
EE
= V
–
= –15V
R
L
= 10, V
CC
= – V
EE
= 15V, V
+
= –V
–
= 5V
Output Low, R
SENSE
= 0Ω
Output High, R
SENSE
= 0Ω
–10V < V
OUT
< 10V, R
L
= 1k
V
OUT
= 10V
PEAK
(Note 5)
f = 10kHz
0.01%, V
OUT
= 0V to 10V, A
V
= –1, R
L
= 1k
VC
SRC
= VC
SNK
= 0V
l
l
500
–1000
0.7
11
Current Sense Characteristics
V
SENSE(MIN)
Minimum Current Sense Voltage
V
SENSE(4%)
Current Sense Voltage 4% of Full Scale
V
SENSE(10%)
Current Sense Voltage 10% of Full Scale
V
SENSE(FS)
I
BI
I
SENSE
–
I
FILTER
I
SENSE
+
Current Sense Voltage 100% of Full Scale
Current Limit Control Input Bias Current
SENSE
–
Input Current
FILTER Input Current
SENSE
+
Input Current
l
VC
SRC
= VC
SNK
= 0.2V
VC
SRC
= VC
SNK
= 0.5V
VC
SRC
= VC
SNK
= 5V
l
l
l
VC
SRC
, VC
SNK
Pins
0V < (VC
SRC
, VC
SNK
) < 5V
0V < (VC
SRC
, VC
SNK
) < 5V
l
l
l
l
l
l
l
VC
SRC
= VC
SNK
= 0V
VC
SRC
= 5V, VC
SNK
= 0V
VC
SRC
= 0V, VC
SNK
= 5V
VC
SRC
= VC
SNK
= 5V
Current Sense Change with Output Voltage VC
SRC
= VC
SNK
= 5V, –12.5V < V
OUT
< 12.5V
Current Sense Change with Supply Voltage VC
SRC
= VC
SNK
= 5V, 6V < (V
CC
, V
+
) < 18V
2.5V < V
+
< 18V, V
CC
= 18V
–18V < (V
EE
, V
–
) < –2.5V
–18V < V
–
< –2.5V, V
EE
= –18V
For more information
www.linear.com/LT1970A
3
LT1970A
elecTrical characTerisTics
SYMBOL
R
CSF
PARAMETER
Current Sense Bandwidth
Resistance FILTER to SENSE
–
Logic Output Leakage
ISRC, ISNK, TSD
Logic Low Output Level
Logic Output Current Limit
V
ENABLE
I
ENABLE
I
SUPPLY
I
CC
I
CC(STBY)
t
ON
t
OFF
Enable Logic Threshold
Enable Pin Bias Current
Total Supply Current
V
CC
Supply Current
Supply Current Disabled
Turn-On Delay
Turn-Off Delay
V
CC
, V
+
and V
–
, V
EE
Connected
V
CC
, V
+
and V
–
, V
EE
Separate
V
CC
, V
+
and V
–
, V
EE
Connected, V
ENABLE
≤ 0.8V
(Note 7)
(Note 7)
l
l
l
l
l
l
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. See Test Circuit for standard test conditions.
CONDITIONS
MIN
750
TYP
2
1000
1250
1
0.2
25
0.8
–1
7
3
0.6
10
10
1.9
2.5
1
13
7
1.5
0.4
MAX
UNITS
MHz
Ω
µA
V
mA
V
µA
mA
mA
mA
µs
µs
Logic I/O Characteristics
V = 15V
I = 5mA (Note 6)
l
l
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device reli-
ability and lifetime.
Note 2:
The LT1970AC is guaranteed functional over the operating tem-
perature range of – 40°C and 85°C.
Note 3:
The LT1970AC is guaranteed to meet specified performance from
0°C to 70°C. The LT1970AC is designed, characterized and expected to
meet specified performance from –40°C to 85°C but is not tested or QA
sampled at these temperatures. The LT1970AI is guaranteed to meet speci-
fied performance from –40°C to 85°C.
Note 4:
This parameter is not 100% tested.
Note 5:
Full power bandwidth is calculated from slew rate measurements:
FPBW = SR/(2 • π • V
P
)
Note 6:
The logic low output level of pin
TSD
is guaranteed by correlating
the output level of pin
ISRC
and pin
ISNK
over temperature.
Note 7:
Turn-on and turn-off delay are measured from V
ENABLE
crossing
1.6V to the OUT pin at 90% of normal output voltage.
Note 8:
Thermal resistance varies depending upon the amount of PC board
metal attached to the device. If the maximum dissipation of the package is
exceeded, the device will go into thermal shutdown and be protected.
Typical perForMance characTerisTics
Warm-Up Drift V
IO
vs Time
V
OS
• 1000 (50mV/DIV)
–100
–120
TOTAL SUPPLY CURRENT (mA)
INPUT BIAS CURRENT (nA)
–140
–160
–180
–200
–220
–240
–260
–15 –12 –9 –6 –3 0 3 6 9 12 15
COMMON MODE INPUT VOLTAGE (V)
1970A G02
Input Bias Current vs V
CM
V
S
= ±15V
14
12
10
8
6
4
2
0
–2
–4
–6
–8
–10
–12
–14
Total Supply Current
vs Supply Voltage
I
CC
+ I
V
+
125°C
25°C
–55°C
I
EE
+ I
V
–
–55°C
25°C
125°C
0
2
4
6
8 10 12 14
SUPPLY VOLTAGE (±V)
16
18
–I
BIAS
+I
BIAS
0V
TIME (100ms/DIV)
1970A G01
1970A G03
4
1970afc
For more information
www.linear.com/LT1970A
LT1970A
Typical perForMance characTerisTics
Supply Current vs Supply Voltage
4.5
4.0
SUPPLY CURRENT (mA)
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
2
T
A
= 25°C
V
CC
= V
+
= –V
EE
= –V
–
4
6
8 10 12 14 16
SUPPLY VOLTAGE (±V)
18
20
I
VEE
I
VCC
I
V+
I
V–
OPEN-LOOP GAIN (dB)
70
60
50
40
30
20
10
0
–10
–20
–30
100
1k
10k 100k
1M
FREQUENCY (Hz)
10M
GAIN
PHASE
Open-Loop Gain and Phase
vs Frequency
100
90
80
PHASE MARGIN (DEG)
PHASE MARGIN (DEG)
70
60
50
40
30
20
10
0
100M
60
58
56
54
52
50
48
46
44
42
40
Phase Margin vs Supply Voltage
A
V
= –1
R
F
= R
G
= 1k
T
A
= 25°C
V
OUT
= V
S
/2
0
4
8 12 16 20 24 28 32
TOTAL SUPPLY VOLTAGE (V)
36
1870A G04
1970A G05
1970A G06
Gain Bandwidth vs Supply Voltage
5
4
VOLTAGE GAIN (dB)
A
V
= 100
10
Gain vs Frequency
A
V
= 1
10
Gain vs Frequency with C
LOAD
V
S
= ±15V
A
V
= 1
30nF
10nF
1nF
–10
0nF
–20
0
V
S
= ±15V
V
S
= ±5V
VOLTAGE GAIN (dB)
0
GAIN BANDWIDTH (MHz)
3
–10
2
1
0
–20
–30
–30
0
4
8 12 16 20 24 28 32
TOTAL SUPPLY VOLTAGE (V)
36
–40
10k
100k
1M
FREQUENCY (Hz)
10M
1970A G08
–40
10k
100k
1M
FREQUENCY (Hz)
10M
1970A G09
1970A G07
Output Impedance
100
V
S
= ±15V
600k
100k
A
V
= 100
1
A
V
= 10
0.1
A
V
= 1
OUTPUT IMPEDANCE (Ω)
10k
1k
100
10
Disabled Output Impedance
V
S
= ±15V
V
ENABLE
= 0.8V
1.8
1.7
1.6
SLEW RATE (V/µs)
1.5
1.4
1.3
1.2
1.1
10k
100k
1M
FREQUENCY (Hz)
10M
100M
1970A G11
Slew Rate vs Supply Voltage
OUTPUT IMPEDANCE ( )
10
FALLING
RISING
0.01
0.001
1k
10k
100k
1M
FREQUENCY (Hz)
10M
100M
1970A G10
1
1k
1.0
A
V
= –1
R
F
= R
G
= 1k
T
A
= 25°C
4
6
14
12
10
SUPPLY VOLTAGE (±V)
8
16
18
1970A G12
1970afc
For more information
www.linear.com/LT1970A
5
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