Product Data Sheet
PRELIMINARY
VS-502
Voltage Controlled SAW Oscillator
Features
•
Output frequencies from 300 MHz to 1350 MHz
•
Ultra low jitter
< 0.2 ps-rms (12 kHz to 20 MHz)
< 0.2 ps-rms (50 kHz to 80 MHz)
•
Low phase noise, -160 dBc/Hz @ 1 MHz offset (1 GHz)
•
Small low profile 9.0 * 14.0 * 4.5 mm SMT package
•
3.3 V, 5.0 V and 12V Supply Options
•
LV-PECL, PECL, or Sinewave (0 to +10 dBm into 50
Ώ)
•
Output disable feature (For LVPECL - PECL option)
Product is free of lead and compliant to
EC RoHS Directive
Applications
•
Point to Point / Point to Multi Point Radios
•
Instrumentation
•
PLL Frequency Translation
•
Test & Measurement
•
Military & Avionics
Description
The VS-502 is a SAW based voltage controlled oscillator that
operates at the fundamental frequency of the internal SAW
resonator. This direct approach enables this series to achieve
low phase noise and jitter performance at high output
frequencies and over wide operating temperature range. The
oscillator is housed in a hermetically sealed J-lead surface
mount package offered on tape and reel. As an option, it has
an output disable to facilitate on-board test
Vectron International, 267 Lowell Rd, Hudson NH 03051-4916
1
Tel: 1-88-VECTRON-1 Website: www.vectron.com
Rev: 27January06
VS-502 Voltage Controlled SAW Oscillator
Table 1. Electrical Performance
Parameter
Symbol Minimum
F
N
APR
300
± 50
Typical
Maximum
1350
± 20
± 10
± 10
+ 350
± 200
V
CC
V
CC
V
CC
I
CC
P
O
P
O
P
O
P
O
11.4
4.75
3.135
12
5
3.3
55
12.6
5.25
3.450
70
Units
MHz
ppm
%
%
%
ppm/V
ppm
V
V
V
mA
dBm
dBm
dBm
dBm
dBc
ps,rms
ps,rms
V
V
ps
%
k
Ώ
kHz
ºC
mm
Notes
1,2
9,2,3
4,2,9,3
4,2,9,3
4,2,9,3
2,8
6,9
2,3
2,3
2,3
2,3
2,3
2,3
2,3
2,3
2,3
7,6
7,6
2,3,5
2,3,5
2,3,5
2,3,5
6
6
1,3
Frequency
Center Frequency
Absolute Pull Range
Linearity (+12V Supply)
Linearity (+5V Supply)
Linearity (+3.3V Supply)
Gain Transfer
Temperature Stability (-40ºC to +85ºC)
Supply
Voltage (B)
Voltage (C)
Voltage (D) -
PECL Output Only
Current (No Load)
Output- Sinewave Options
Sinewave, into 50
Ώ
(G)
Sinewave, into 50
Ώ
(H)
Sinewave, into 50
Ώ
(J)
Sinewave, into 50
Ώ
(K)
Harmonics
Jitter @ 622.08 MHz (12 kHz to 20 MHz)
Jitter @ 622.08 MHz (50 kHz to 80 MHz)
0
+3
+7
+10
-20
0.10
0.10
V
OL
V
OL
t
R
,t
F
SYM
Z
C
BW
T
OP
V
CC
-1.63
V
CC
-0.98
45
104
200
49/51
110
100
See Ordering Table
9.0 x 14.0 x 4.5
350
55
115
Output- PECL Logic Option (F)
Output Level Low
Output Level High
Rise & Fall Time
Symmetry (Duty Cycle)
Control Voltage
Input Impedance
Modulation BW
(Driven from
Low Impedance)
Operating Temperature
Package Size
Table Notes:
1.
2.
3.
4.
5.
6.
7.
8.
9.
See Standard Frequencies and Ordering Information
Parameters are tested with production test circuit
Parameters are tested at ambient temperature with test limits guard-banded for specified operating temperature.
Measured as the maximum deviation from the best straight-line fit, per MIL-0-55310.
Output levels are standard 100K PECL compatible and measured from 20% to 80% of a full output swing (Fig 1).
Not tested in production, guaranteed by design, verified at qualification.
Integrated across 12 kHz to 20 MHz, or 50 KHz to 80 MHz per GR-253-CORE Issue3.
Tested with Vc = 0.3V to 3V for 3.3V supply, Vc = 0.5V to 4.5 V for 5V supply, Vc = 0.5V to 11.5V for 12V supply
Maximum frequency occurs at room temperature
Table 2. Typical Single Side-Band Phase Noise (dBc/Hz) for Sinewave Output
Output Frequency
640 MHz
1000 MHz
100 Hz Offset
-75
-65
1 kHz Offset
-110
-95
10 kHz Offset
-135
-125
Tel: 1-88-VECTRON-1
2
100 kHz Offset
-150
-150
Website: www.vectron.com
1 MHz Offset
-160
-155
Vectron International, 267 Lowell Rd, Hudson NH 03051-4916
Rev: 27January06
VS-502 Voltage Controlled SAW Oscillator
t
R
80%
Vcc - 1.3V
20%
Vcc - 1.6V
t
F
SYM = 100 x t
A
/ t
B
Vcc - 1.0V
t
A
t
B
Figure 1. 100K PECL Waveform
Outline Diagram
6
5
4
Pad Layout
VS-500-LFF-GNN
VS-502-BJF-GNN
XXX.XXX
XXX.XXX
VI YWW
∆
VI YYWW
1
2
3
8.89±0.15
[0.350±0.006]
7.63
[0.300]
1.27
[0.050]
13.97±0.20
[0.550±0.008]
0.46±0.05
[0.018±0.002]
[
4.49+0.20
-0.30
+0.008
0.177-0.012
]
3.00
[0.118]
8.80
[0.346]
2.54
[0.100]
5.08
[0.200]
mm
[inch]
5.08±0.13
[0.200±0.005]
2.54±0.13
[0.100±0.005]
mm
[inch]
Table 3. Pin Out – PECL Option
Pin
1
2
3
4
5
6
Symbol
V
C
OD
GND
Output
COutput
V
CC
Function
VCSO Control Voltage
N/C or Output Disable
1
Case and Electrical Ground
VCSO Output
VCSO Complementary Output
Power Supply Voltage
Table Notes:
1. By setting Output Disable pin high, the RF output is disabled and pin 4 is held high, pin 5 is held low.
The threshold for Output Disable is 2.3V above pin 3. Output disable pin can be left floating for normal operation
Vectron International, 267 Lowell Rd, Hudson NH 03051-4916
3
Tel: 1-88-VECTRON-1
Website: www.vectron.com
Rev: 27January06
VS-502 Voltage Controlled SAW Oscillator
Suggested Output Load Configurations – PECL Operation
+5.0V
.01uF
.1uF
(From PLL)
Vc
OD
Gnd
1
2
3
6
+5.0V +5.0V
Vcc
120
Ω
120
Ω
5 COutput
Output
4
82
Ω
82
Ω
(AC Coupling)
+5.0V
.01uF
.1uF
(From PLL)
Vc
OD
Gnd
1
2
3
6
Vcc
(AC Coupling)
5 COutput
Output
4
330
Ω
330
Ω
Suggested Output Load Configurations – LVPECL Operation
+3.3V
.01uF
0.1uF
(From PLL)
Vc
OD
Gnd
1
2
3
6
+3.3V +3.3V
Vcc
130
Ω
130
Ω
5 COutput
Output
4
82
Ω
82
Ω
(AC Coupling)
+3.3V
.01uF
0.1uF
(From PLL)
Vc
OD
Gnd
1
2
3
6
Vcc
(AC Coupling)
5 COutput
Output
4
240
Ω
240
Ω
Vectron International, 267 Lowell Rd, Hudson NH 03051-4916
4
Tel: 1-88-VECTRON-1
Website: www.vectron.com
Rev: 27January06
VS-502 Voltage Controlled SAW Oscillator
Table 4. Pin Out – Sinewave Option
Pin
1
2
3
4
5
6
Table Notes:
Symbol
V
C
-
V
EE
Output
V
CC
V
CC
Function
VCSO Control Voltage
N/C
Ground
VCSO Sinewave Output
Vcc2
1
Vcc1
1. If Vcc1 is +12V and a separate 5V is not applied to pin 5 then pin 5 must be connected through a 220Ώ 1/4W external resistor.
Suggested Output Load Configurations – SINEWAVE Operation
+12V
Vcc
From PLL
1
NC
2
3
6
5
4
220
Ώ
1/4W
0.1uF
0.01uF
0.01uF
Output AC Coupled with
50
Ώ
to ground
+5V
Vcc
From PLL
1
NC
2
3
6
5
4
0.1uF
0.01uF
0.01uF
Output AC Coupled with
50
Ώ
to ground
Vectron International, 267 Lowell Rd, Hudson NH 03051-4916
5
Tel: 1-88-VECTRON-1
Website: www.vectron.com
Rev: 27January06
FPGA/CPLD
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
