FEATURES
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LTM4632
Ultrathin, Triple Output,
Step-Down µModule Regulator
for DDR-QDR4 Memory
DESCRIPTION
The
LTM
®
4632
is an ultrathin triple output step-down
µModule
®
(power module) regulator to provide complete
power solution for DDR-QDR4 SRAM. Operating from a
3.6V to 15V input voltage, the LTM4632 supports two ±3A
output rails, both sink and source capable, for VDDQ and
VTT, plus a 10mA low noise reference VTTR output. Both
VTT and VTTR track and are equal to VDDQ/2. Housed
in a 6.25mm × 6.25mm × 1.82mm LGA and 6.25mm ×
6.25mm × 2.42mm BGA packages, the LTM4632 includes
the switching controller, power FETs, inductors and sup-
port components. Alternatively, the power module can
also be configured as a two phase single ±6A output
VTT. Only a few ceramic input and output capacitors are
needed to complete the design.
The LTM4632 supports selectable Burst Mode operation
(CH1 only) and output voltage tracking for supply rail
sequencing. Its high switching frequency and current
mode control enable a very fast transient response to
line and load changes without sacrificing stability.
Fault protection features include overvoltage input, over-
current and overtemperature protection.
The LTM4632 is available with SnPb (BGA) or RoHS com-
pliant terminal finish
All registered trademarks and trademarks are the property of their respective owners.
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Complete DDR-QDR4 SRAM Power Solution
Including VDDQ, VTT, VTTR (or VREF)
Solution in 0.5cm
2
(Dual-Sided PCB)
Wide Input Voltage Range: 3.6V to 15V
3.3V Input Compatible with V
IN
Tied to INTV
CC
0.6V to 2.5V Output Voltage Range
Dual ±3A DC Output Current with Sink and Source
Capability
±1.5%, ±10mA Buffered VTTR = VDDQ/2 Output
3A VDDQ + 3A VTT or Dual Phase Single 6A VTT
±1.5% Maximum Total Output Voltage Regulation
Error Over Load, Line and Temperature
Current Mode Control, Fast Transient Response
External Frequency Synchronization
Multiphase Parallelable with Current Sharing
Selectable Burst Mode
®
Operation
Overvoltage Input and Overtemperature Protection
Power Good Indicator
Ultrathin 6.25mm × 6.25mm × 1.82mm LGA and
6.25mm × 6.25mm × 2.42mm BGA Packages
APPLICATIONS
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DDR Memory Power Supply
General Purpose Point-of-Load Conversion
Telecom, Networking and Industrial Equipment
TYPICAL APPLICATION
QDR4 Memory Power µModule Regulator
PGOOD1 PGOOD2
V
IN
V
OUT1
RUN1
RUN2 LTM4632 V
OUT2
INTV
CC
VTTR
SYNC/MODE
FB1
TRACK/SS1
COMP1
V
DDQIN
GND
4632 TA01a
Output Efficiency vs Load Current
95
VDDQ
1.3V, 3A
VTT
0.65V, ±3A
VTTR
0.65V, 10mA
52.3k
EFFICIENCY (%)
90
85
80
75
70
65
V
IN
3.6V TO 15V
10µF
25V
22µF
4V
22µF
4V
VDDQ
COMP2
5V INPUT
12V INPUT
0
1
2
LOAD CURRENT (A)
3
4632 TA01b
Rev. D
Document Feedback
For more information
www.analog.com
1
LTM4632
ABSOLUTE MAXIMUM RATINGS
(Note 1)
PIN CONFIGURATION
TOP VIEW
(See Pin Functions, Pin Configuration Table)
SYNC/
COMP2 GND MODE GND COMP1
5
PGOOD2
V
DDQIN
INTV
CC
4
VTTR
V
IN
3
RUN2
2
V
IN
V
OUT2
1
A
B
C
D
E
GND
PGOOD1
FB1
V
IN
TRACK/SS1
RUN1
V
IN
GND
V
OUT1
V
IN
............................................................. –0.3V to 16V
V
OUT
............................................................. –0.3V to 6V
PGOOD1, PGOOD2 ..................................... –0.3V to 16V
RUN1, RUN2 ...................................... –0.3V to V
IN
+0.3V
INTV
CC
, TRACK/SS1, V
DDQIN
, VTTR ......... –0.3V to 3.6V
SYNC/MODE, COMP1, COMP2,
FB1, FB2 ................................................ –0.3V to INTV
CC
Operating Internal Temperature Range
(Notes 2, 3, 5) ........................................ –40°C to 125°C
Storage Temperature Range .................. –55°C to 125°C
Peak Solder Reflow Body Temperature ................. 260°C
LGA PACKAGE 25-LEAD (6.25mm
×
6.25mm
×
1.82mm)
BGA PACKAGE 25-LEAD (6.25mm
×
6.25mm
×
2.42mm)
T
JMAX
= 125°C,
θ
JCtop
= 17°C/W,
θ
JCbottom
= 11°C/W,
θ
JB
+θ
BA
= 22°C/W,
θ
JA
= 20°C/W
WEIGHT = 0.21g
ORDER INFORMATION
PART MARKING*
PART NUMBER
LTM4632EV#PBF
LTM4632IV#PBF
LTM4632EY#PBF
LTM4632IY#PBF
LTM4632IY
PAD OR BALL FINISH
Au (RoHS)
Au (RoHS)
SAC305 (RoHS)
SAC305 (RoHS)
SnPb (63/37)
DEVICE
LTM4632V
LTM4632V
LTM4632Y
LTM4632Y
LTM4632Y
FINISH CODE
e4
e4
e1
e1
e0
PACKAGE
TYPE
LGA
LGA
BGA
BGA
BGA
MSL
RATING
3
3
3
3
3
TEMPERATURE RANGE
(SEE NOTE 2)
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
–40°C to 125°C
• Contact the factory for parts specified with wider operating temperature
ranges. *Pad or ball finish code is per IPC/JEDEC J-STD-609.
•
Recommended LGA and BGA PCB Assembly and Manufacturing
Procedures
•
LGA and BGA Package and Tray Drawings
2
Rev. D
For more information
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LTM4632
ELECTRICAL CHARACTERISTICS
SYMBOL
V
IN
V
IN_3.3
V
OUT1(RANGE)
V
OUT2(RANGE)
V
OUT1
(DC)
I
OUT1
(DC)
IQ1(V
IN
)
IS1(V
IN
)
ΔV
OUT1
(Line)/V
OUT1
V
OUT1
(AC)
ΔV
OUT1
(START)
t
START
ΔV
OUTLS1
t
SETTLE1
IOUTPK1
V
OUT2
(DC)
I
OUT2
(DC)
IQ2(V
IN
)
IS2(V
IN
)
ΔV
OUT2
(Line)/V
OUT2
V
OUT2
(AC)
ΔV
OUTLS2
t
SETTLE2
IOUTPK2
PARAMETER
Input DC Voltage
3.3V Input DC Voltage
Output Voltage Range
V
IN
= INTV
CC
V
IN
= 3.6V to 15V
The
l
denotes the specifications that apply over the specified internal
operating temperature range (Note 2). Specified as each individual output channel at T
A
= 25°C (Note 2), V
IN
= 12V, unless otherwise
noted, per the typical application in Figure 19
CONDITIONS
l
l
l
l
MIN
3.6
3.1
0.6
TYP
3.3
MAX
15
3.5
2.5
1.8
UNITS
V
V
V
V
V
A
mA
µA
µA
A
Output Specification (Channel 1)
CH1 Output Voltage, Total Variation C
IN
= 22µF, C
OUT
= 100µF Ceramic
with Line and Load
R
FB1
= 51.7k, MODE = GND, I
OUT
= –3A to 3A
CH1 Output Continuous Current
V
IN
= 12V, V
OUT1
= 1.3V (Note 3)
Range
CH1 Input Supply Bias Current
V
IN
= 12V, V
OUT1
= 1.3V, MODE = GND
V
IN
= 12V, V
OUT1
= 1.3V, MODE = INTV
CC
Shutdown, RUN1 = GND
V
IN
= 12V, V
OUT1
= 1.3V, I
OUT
= 3A
V
OUT1
= 1.3V, V
IN
= 3.6V to 15V, I
OUT1
= 0A
V
OUT1
= 1.3V, I
OUT
= –3A to 3A
I
OUT
= 0A, C
OUT
= 47µF Ceramic
V
IN
= 12V, V
OUT1
= 1.3V
I
OUT
= 0A, C
OUT
= 47µF Ceramic,
TRACK/SS1 = –0.1µF, V
IN
= 12V, V
OUT1
= 1.3V
C
OUT
= 100µF Ceramic, TRACK/SS1 = 0.01µF
No Load, V
IN
= 12V, V
OUT1
= 1.3V
Load: 0% to 25% to 0% of Full Load
C
OUT
= 47µF Ceramic, V
IN
= 12V, V
OUT1
= 1.3V
Load: 0% to 25% to 0% of Full Load
C
OUT
= 47µF Ceramic, V
IN
= 12V, V
OUT1
= 1.3V
V
IN
= 12V, V
OUT1
= 1.3V
l
l
l
l
1.28
–3
1.30
1.32
3
13
400
40
0.4
0.01
0.2
30
30
1.2
85
20
4.5
637
–3
7
40
0.25
l
l
CH1 Input Supply Current
CH1 Line Regulation Accuracy
CH1 Output Ripple Voltage
CH1 Turn-On Overshoot
Turn-On Time
CH1 Peak Deviation for Dynamic
Load
CH1 Settling Time for Dynamic
Load Step
CH1 Output Current Limit
0.05
1.0
%/V
%
mV
mV
ms
mV
µs
A
ΔV
OUT1
(Load)/V
OUT1
CH1 Load Regulation Accuracy
Output Specification (Channel 2)
CH2 Output Voltage, Total Variation C
IN
= 22µF, C
OUT
= 100µF Ceramic
with Line and Load
V
DDQIN
= 1.3V, MODE = GND, I
OUT
= –3A to 3A
CH2 Output Continuous Current
V
IN
= 12V, V
DDQIN
= 1.3V (Note 3)
Range
CH2 Input Supply Bias Current
CH2 Input Supply Current
CH2 Line Regulation Accuracy
CH2 Output Ripple Voltage
CH2 Peak Deviation for Dynamic
Load
CH2 Settling Time for Dynamic
Load Step
CH2 Output Current Limit
V
IN
= 12V, V
DDQIN
= 1.3V, MODE = GND
Shutdown, RUN2 = 0
V
IN
= 12V, V
DDQIN
= 1.3V, I
OUT
= 3A
V
DDQIN
= 1.3V, V
IN
= 3.6V to 15V, I
OUT2
= 0A
V
DDQIN
= 1.3V, I
OUT
= –3A to 3A
I
OUT
= 0A, C
OUT
= 100µF Ceramic
V
IN
= 12V, V
DDQIN
= 1.3V
Load: 0% to 25% to 0% of Full Load
C
OUT
= 47µF Ceramic, V
IN
= 12V, V
OUT1
= 1.3V
Load: 0% to 25% to 0% of Full Load
C
OUT
= 47µF Ceramic, V
IN
= 12V, V
OUT1
= 1.3V
650
663
3
mV
A
mA
µA
A
0.05
1.0
%/V
%
mV
mV
µs
A
0.01
0.2
30
85
20
4.5
ΔV
OUT2
(Load)/V
OUT2
CH2 Load Regulation Accuracy
Rev. D
For more information
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3
LTM4632
ELECTRICAL CHARACTERISTICS
SYMBOL
Control Section
V
FB1
I
FB1
RFBHI1
VTTR
V
RUN1
, V
RUN2
I
RUN1
, I
RUN2
I
TRACK/SS1
t
ON(MIN)
t
OFF(MIN)
VPGOOD
Voltage at V
FB1
Pin
Current at V
FB1
Pin
Resistor Between V
OUT1
and
V
FB1
Pins
VTTR Voltage Reference
RUN Pin On Threshold
RUN Pin Leakage Current
TRACK/SS1 Pin Soft-Start Pull-Up
Current
Minimum On-Time
Minimum Off-Time
PGOOD Trip Level
TRACK/SS1 = 0V
(Note 4)
(Note 4)
V
FB
With Respect to 0.6V
V
OUT2
With Respect to V
DDQIN
/2 (Note 4)
Ramping Negative
Ramping Positive
1mA Load
V
IN
= 3.6V to 15V
I
CC
= 0 to 50mA
3.1
V
DDQIN
= 1.3V,
IVTTR = ±10mA, CVTTR < 10nF
RUN Threshold Rising
RUN Threshold Falling
l
The
l
denotes the specifications that apply over the specified internal
operating temperature range (Note 2). Specified as each individual output channel at T
A
= 25°C (Note 2), V
IN
= 12V, unless otherwise
noted, per the typical application in Figure 19
PARAMETER
CONDITIONS
I
OUT
= 0A, V
OUT1
= 1.3V
(Note 4)
60.00
0.492x
V
DDQIN
1.18
0.95
60.40
0.50x
V
DDQIN
1.28
1.01
0
1.2
20
45
l
MIN
0.593
TYP
0.600
MAX
0.607
±30
60.80
0.508x
V
DDQIN
1.39
1.05
±1
UNITS
V
nA
kΩ
V
V
V
µA
µA
ns
ns
–8
8
15
3.3
1.3
1
0.95
–14
14
3.5
%
%
Ω
V
%
MHz
V
µA
RPGOOD
V
INTVCC
V
INTVCC
Load Reg
f
OSC
SYNC
I
SYNC/MODE
PGOOD Pull-Down Resistance
Internal V
CC
Voltage
INTV
CC
Load Regulation
Oscillator Frequency
SYNC Threshold Voltage
MODE Input Current
SYNC/MODE = INTV
CC
–1.5
Note 1.
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2.
The LTM4632 is tested under pulsed load conditions such that
T
J
≈ T
A
. The LTM4632E is guaranteed to meet performance specifications
over the 0°C to 125°C internal operating temperature range. Specifications
over the –40°C to 125°C internal operating temperature range are assured
by design, characterization and correlation with statistical process
controls. The LTM4632I is guaranteed to meet specifications over the
full –40°C to 125°C internal operating temperature range. Note that the
maximum ambient temperature consistent with these specifications is
determined by specific operating conditions in conjunction with board
layout, the rated package thermal resistance and other environmental
factors.
Note 3.
See output current derating curves for different V
IN
, V
OUT
and T
A
.
Note 4.
100% tested at wafer level.
Note 5.
This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
4
Rev. D
For more information
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LTM4632
TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency vs Load Current at
3.6V
IN
100
95
90
EFFICIENCY (%)
EFFICIENCY (%)
85
80
75
70
65
60
0
1V
OUT
1.2V
OUT
1.5V
OUT
1.8V
OUT
2.5V
OUT
0.5
1.0
2.0
1.5
LOAD CURRENT (A)
2.5
3.0
4632 G01
Efficiency vs Load Current at 5V
IN
100
95
90
85
80
75
70
65
60
0
0.5
1V
OUT
1.2V
OUT
1.5V
OUT
1.8V
OUT
2.5V
OUT
1.0
2.0
1.5
LOAD CURRENT (A)
2.5
3.0
4632 G02
Efficiency vs Load Current at
12V
IN
100
95
90
EFFICIENCY (%)
85
80
75
70
65
60
0
0.5
1V
OUT
1.2V
OUT
1.5V
OUT
1.8V
OUT
2.5V
OUT
1.0
2.0
1.5
LOAD CURRENT (A)
2.5
3.0
4632 G03
1V Output Transient Response
V
OUT
AC-COUPLED
50mV/DIV
LOAD STEP
1A/DIV
20µs/DIV
4632 G04
1.2V Output Transient Response
V
OUT
AC-COUPLED
50mV/DIV
LOAD STEP
1A/DIV
20µs/DIV
4632 G05
1.5V Output Transient Response
V
OUT
AC-COUPLED
50mV/DIV
LOAD STEP
1A/DIV
20µs/DIV
4632 G06
V
IN
= 12V
V
OUT
= 1V
f
S
= 1MHz
OUTPUT CAPACITOR = 1 × 47µF CERAMIC
LOAD STEP = 2.25A TO 3A
V
IN
= 12V
V
OUT
= 1.2V
f
S
= 1MHz
OUTPUT CAPACITOR = 1 × 47µF CERAMIC
LOAD STEP = 2.25A TO 3A
V
IN
= 12V
V
OUT
= 1.5V
f
S
= 1MHz
OUTPUT CAPACITOR = 1 × 47µF CERAMIC
LOAD STEP = 2.25A TO 3A
1.8V Output Transient Response
V
OUT
AC-COUPLED
50mV/DIV
LOAD STEP
1A/DIV
20µs/DIV
4632 G07
2.5V Output Transient Response
V
OUT
AC-COUPLED
50mV/DIV
LOAD STEP
1A/DIV
20µs/DIV
4632 G08
Start-Up with No Load Current
Applied
SW
10V/DIV
V
OUT
1A/DIV
I
IN
0.5A/DIV
20µs/DIV
4632 G09
V
IN
= 12V
V
OUT
= 1.8V
f
S
= 1MHz
OUTPUT CAPACITOR = 1 × 47µF CERAMIC
LOAD STEP = 2.25A TO 3A
V
IN
= 12V
V
OUT
= 2.5V
f
S
= 1MHz
OUTPUT CAPACITOR = 1 × 47µF CERAMIC
LOAD STEP = 2.25A TO 3A
V
IN
= 12V
V
OUT
= 1.8V
f
S
= 1MHz
I
OUT
= 0A
INPUT CAPACITOR = 1 × 22µF CERAMIC
OUTPUT CAPACITOR = 1 × 47µF CERAMIC
SOFT-START CAPACITOR = 0.1µF
Rev. D
For more information
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