News
Views
Second Quarter, May 2000
Newsletter for Altera Customers
&
Excalibur Solutions
Altera Announces the Nios Processor
for Embedded Systems Development
Altera is a leader in providing the key elements
required for successful system-on-a-
programmable-chip (SOPC) designs, including
high performance, full-featured devices,
integrated development tools, and a
comprehensive portfolio of intellectual property
(IP). Recognizing the importance of
microprocessors in SOC designs, Altera has
established itself as the preeminent source of
processor IP through strong partnerships with
industry leaders. Altera now enhances this
processor IP selection with Excalibur
TM
embedded processor programmable logic device
(PLD) solutions. Consisting of both hard and
soft core technologies that integrate RISC
processors into PLDs, the Excalibur embedded
processor solutions offer the widest range of
capabilities and the high performance of
dedicated hardware implementation. With the
introduction of the Excalibur embedded
processor PLD solutions, designers can reap all
the benefits of SOPC design.
time, but to explore different system
architectures and feature sets to deliver the best
possible combination in their product. By fully
integrating the processor into the PLD design
flow, the Excalibur solutions give system
designers unprecedented freedom to determine
which functions should be executed in software
and which would benefit the most from
dedicated hardware implementation.
The Altera Excalibur solutions consist of the
following families:
s
The Nios
TM
family of soft core embedded
processors—a configurable 16- or 32-bit
embedded RISC processor
The ARM
®
-based embedded processor
family—an ARM9 Thumb
®
embedded
processor core with 32-bit architecture and
a 32-bit RISC engine
The MIPS-based
®
embedded processor
family—a MIPS 4Kc
TM
embedded processor
core with 32-bit architecture and R4000
TM
TLB and privileged-mode extensions.
s
s
Advantages of SOPC
The strengths of SOC design include higher
integration and increased system performance.
SOPC designs add additional benefits such as
programmability and fast time-to-market, with
the flexibility of PLDs. With these
programmable devices, a designer can
implement several different iterations of a
system in hardware in a fraction of the time
required to implement a custom component
version. This flexibility allows designers to not
only develop a product in a shorter amount of
May 2000
M-NV-Q200-01
News & Views
The first Excalibur embedded processor PLD
solution is the Nios family, a 16- or 32-bit
embedded RISC soft core processor that is easily
configured to meet several different demands,
and rapidly integrated into any Altera-based
design. Although the Nios embedded processors
are initially optimized for APEX
TM
devices, they
®
continued on page 4
The Programmable Solutions Company
®
Altera Corporation
1
Introducing
the Excalibur Development Kit
Featuring Nios
The Development Kit that Gets You on the
Cutting Edge
The Nios™ soft core embedded processor, the
first of Altera’s new Excalibur™ embedded
processor solutions to ship, delivers just
what you need to create system-on-a-
programmable-chip (SOPC) designs.
This new flexible embedded processor solution offers a
32-bit configuration, up to 50 MIPS performance, and an
equivalent volume price point of $5. The development kit is
available now with everything you need to get started.
Free Hands-on Workshops
Intensive three-hour workshops, starting in June, will teach you
how to create an SOPC design using the Nios soft core embedded
processor in an APEX device. You will develop and compile C code,
then execute and troubleshoot it on the development board. You
will also learn about the GNUPro Compiler and Debugger from
Cygnus, a Red Hat company, included in the Excalibur
Development Kit.
Register Now!
To reserve your space at the
FREE
Excalibur workshop nearest you,
or to find out more about this revolutionary development system,
visit Altera’s web site at
http://www.altera.com/workshop.
A Complete Solution for Only $995
This Excalibur Development Kit contains:
s
s
s
s
s
s
Nios Configurable RISC Embedded Processor Core and
Peripherals
Quartus™ Programmable Logic Development Software
GNUPro® C/C++ Compiler and Debugger from Cygnus®,
a Red Hat® Company
ByteBlasterMV™ Download Cable
Development Board Including an APEX™ EP20K200E
Device
Reference Design and Documentation
Win a Free Excalibur Development Kit!
Each workshop will feature a drawing for a free Excalibur
Development Kit. You must be present to win, so sign up today.
Copyright © 2000 Altera Corporation. Altera, APEX, APEX 20K, APEX 20KE, ByteBlasterMV, Excalibur, Nios, Quartus, and specific designations are trademarks and/or service marks of Altera
Corporation in the United States and other countries. Other brands or products are trademarks of their respective holders. The specifications contained herein are subject to change with-
out notice. All rights reserved.
Table of
Contents
FLEX 10K Product Transitions .................................. 8
FLEX 10KE Industrial-Temperature Devices ............. 9
MAX 7000A Devices ................................................ 10
MAX 7000B Devices Support Advanced
I/O Standards ..................................................... 10
MAX 7000S Family .................................................. 11
MAX 3000A Devices ................................................ 11
4-Mbit Configuration Device Coming Soon ............ 11
Quartus Software Version 2000.05
Available Now ..................................................... 11
Quartus Operating System Update ......................... 11
MAX+PLUS II Software Version 9.6 Now
Shipping .............................................................. 12
MAX+PLUS II Version 9.62 is Now Available
on the Altera Web Site ....................................... 12
Renewal Price Promotion for Customers on
Active Subscription ............................................. 13
License Files for OEM World-Class Synthesis &
Simulation Tools Available Today ....................... 13
Discontinued Devices Update ................................ 27
Technical Articles
Nios Architecture & Customization ........................ 20
Successful In-System Programming
Implementation .................................................. 22
Questions & Answers .............................................. 34
In Every Issue
Current Software Versions ...................................... 21
New Altera Publications ......................................... 36
Altera Programming Support .................................. 37
How to Contact Altera............................................. 39
Altera Device Selection Guide ................................ 40
Features
Altera Announces the Nios Processor for
Embedded Systems Development ........................ 1
Design Tips: Improving Quartus
Design Performance ........................................... 14
Customer Application: Bridging the Gap:
dataBlizzard & Reliaspan ................................... 18
Altera News
Altera & Red Hat Form Partnership to Provide
Development Software for Nios ............................ 6
Sign Up Now for Free Excalibur Workshops ........... 17
ACEX Devices Address Communications Market
Need for Low-Cost Programmable Logic ............ 24
Altera's New SignalTap Plus System Analyzer
Provides Simultaneous On-Chip & Off-Chip
Debug Capabilities ............................................. 26
DCM Technologies' CoreX-V10: Increased
Performance Produces Faster Megafunctions ... 28
True-LVDS Solution Provides 840-Mbps Data
Transfer Rates ..................................................... 30
Altera's Turbo Encoder & Decoder Push the
Technology Envelope for High-Speed
3G Wireless Applications .................................... 32
Devices & Tools
Eight APEX 20KE Devices Now Shipping .................. 7
True-LVDS Support in APEX 20KE Devices ............... 7
5.0-V Tolerant APEX 20K & APEX 20KE Devices ...... 7
APEX 20K Product Transition .................................... 8
ACEX 1K Devices Shipping Now................................ 8
ACEX 2K Devices Coming Soon ................................ 8
All FLEX 10KE Devices Available .............................. 8
Altera, ACCESS Program, ACEX, ACEX 1K, ACEX 2K, AMPP, APEX, APEX 20K, APEX 20KE, Atlas, BitBlaster, ByteBlaster, ByteBlasterMV, Classic, ClockBoost,
ClockLock, ClockShift, CoreSyn, E+MAX, EPC2, Excalibur, FastTrack, FineLine BGA, FLEX, FLEX 10K, FLEX 10KE, FLEX 10KA, FLEX 8000, FLEX 6000, FLEX 6000A,
Jam, MasterBlaster, MAX 9000, MAX 9000A, MAX 7000, MAX 7000E, MAX 7000S, MAX 7000A, MAX 7000AE, MAX 7000B, MAX 3000, MAX 3000A, MAX,
MAX+PLUS, MAX+PLUS II, MegaCore, MegaLAB, MegaWizard, MultiCore, MultiVolt, NativeLink, Nios, nSTEP, OpenCore, OptiFLEX, Quartus, SignalTap, SignalTap
Plus, True-LVDS, and specific device designations are trademarks and/or service marks of Altera Corporation in the United States and other countries. Altera
acknowledges the trademarks of other organizations for their respective products or services mentioned in this document, specifically: Adobe and Acrobat are registered
trademarks of Adobe Systems Incorporated. ARM, Thumb, and the ARM Powered logo are registered trademarkes of ARM Limited. BP Microsystems is a registered
trademark of BP Microsystems. Data I/O and UniSite are registered trademarks of Data I/O Corporation. HP-UX is a trademark of Hewlett-Packard Company. Mentor
Graphics is a registered trademark and LeonardoSpectrum and ModelSim are trademarks of Mentor Graphics. Microsoft, Windows, Windows 98, and Windows NT are
registered trademarks of Microsoft Corporation. R4000, 4Kc, MIPS-based, and the MIPS Technologies logo are trademarks of MIPS Technologies, Inc. Cygnus, GNU,
GNUPro, and Red Hat are registered trademarks of Red Hat, Inc. Rochester Electronics is a registered trademark of Rochester Electronics, Inc. dataBLIZZARD is a
trademark of SBS Technologies, Inc. Sun is a registered trademark and Solaris is a trademark of Sun Microsystems, Inc. Synopsys is a registered trademark and FPGA
Express
is a trademark of Synopsys, Inc. System General is a registered trademark of System General. Altera products are protected under numerous U.S. and foreign
patents and pending applications, maskwork rights, and copyrights. Altera warrants performance of its semiconductor products to current specifications in accordance
with Altera’s standard warranty, but reserves the right to make changes to any products and services at any time without notice. Altera assumes no responsibility or liability
arising out of the application or use of any information, product, or service described herein except as expressly agreed to in writing by Altera
Corporation. Altera customers are advised to obtain the latest version of device specifications before relying on any published information and
before placing orders for products or services. The actual availability of Altera’s products and features could differ from those projected in this
publication and are provided solely as an estimate to the reader.
Copyright © 2000 Altera Corporation. All rights reserved.
Printed on recycled paper.
Ken Lau, Publisher
Greg Steinke,
Technical Editor
101 Innovation Drive
San Jose, CA 95134
Tel: (408) 544-7000
Fax: (408) 544-7809
n_v@altera.com
®
May 2000
News & Views
Altera Corporation
3
Features
Altera Announces the Nios Processor for
Embedded Systems Development, continued from
page 1
will also be available for other Altera device
architectures, including ACEX
TM
devices for
low-cost implementations and future device
families for enhanced performance. The hard
core Excalibur solutions are based on ARM and
MIPS Technologies, Inc. processors. They are
implemented in Altera’s APEX architecture, and
will provide high-performance, embedded
Figure 1. Excalibur Embedded Processor Solutions
200
peripherals within royalty-free, off-the-shelf
products. The Excalibur solutions are ideal for
many embedded applications, including
computer peripherals, industrial and
automotive control, image processing, set-top
boxes, and other communications applications.
Figure 1 shows the families of the Excalibur
embedded processor solution and their relative
performance levels. Figure 2 shows the roadmap
for future Nios embedded processors.
The Nios Family of Configurable Soft Core
Embedded Processors
The Nios family of embedded processors is the
first 16- or 32-bit processor core to be designed
specifically for programmable logic
implementation, and as a result, can perform at
speeds up to 50 million instructions per second
(MIPS). Designed with a five-stage pipeline that
executes one instruction per clock cycle, the
Nios family is also user-configurable for
meeting different embedded design needs,
supporting a 16- or 32-bit data width and a
register file depth ranging from 32 to
512 general-purpose registers (for more
information on the Nios architecture, see on
page 20). Besides performance and
configurability, Nios processors are also
optimized for PLD resource efficiency, resulting
in a lower-cost implementation than most off-
the-shelf processors. Nios can be configured in
many ways to suit different applications. Table 1
illustrates two Nios configurations, their speed
and resource utilizations, and resulting costs.
100
ARM
Embedded
Processor
MIPS
Embedded
Processor
Performance
(MIPS)
50
Nios
Embedded
Processor
20
0
Soft Core
Hard Core
Figure 2. Nios Roadmap
200
100
Future PLD
Architectures
Nios Development Environment
Performance
(MIPS)
50
Nios
Embedded
Processor
APEX
Devices
20
ACEX
Devices
0
Table 1. Nios Configurations & Resource Usage in an EP20K100E Device
Nios
Data Address
Configuration Width Width
16 bit
32 bit
16
32
16
32
%
of
Total LEs
25
33
%
of Total
ESBs
(1)
8 to 40
15 to 77
MHz
50
48
Cost of
Implementation
$10
$13
Note:
(1) Based on register file size.
4
The Nios processor is more than the latest
generation of processor IP optimized for
programmable logic. Altera also provides all the
elements necessary for a designer to develop a
Nios-based system. Nios users can integrate the
Nios embedded processor into their Altera
designs with the MegaWizard
®
Plug-In. The
MegaWizard Plug-In is a menu-driven
application that allows users to specify the
parameters they desire for their Nios embedded
processor. Based on those parameters, the
MegaWizard Plug-In Manager generates a
netlist description of the specific Nios
embedded processor that can be integrated into
any Altera design via the Quartus
TM
development system.
Altera Corporation
News & Views
May 2000
Features
Several peripherals are also available for use with
the Nios family of embedded processors,
including a universal asynchronous receiver/
transmitter (UART), a timer/counter, a memory
controller (SRAM, ROM, and FLASH), and a
parallel I/O (PIO) module. Any of these can be
easily integrated into a user’s design along with
their unique Nios configuration. For coding
support, Altera has partnered with Cygnus
®
, a
Red Hat
®
company, to provide the powerful yet
familiar GNU
®
-based C/C++ compiler and
assembler. A source-level debugger accesses the
device through a serial port, providing run
control and access to the memory and register
file. Figure 3 shows the development flow for
the Excalibur embedded processor PLD
solution.
embedded processor, which contains all the
software and hardware components a designer
needs to begin using the Nios embedded
processor immediately. The kit includes the
following items:
s
s
s
s
Nios soft-core embedded processor
C/C++ compiler, assembler, debugger, and
documentation
Nios peripherals (UART, memory interface,
timer/counter, and PIO module)
Quartus development software (supports
APEX devices and SignalTap
TM
embedded
logic analysis)
ByteBlasterMV
TM
download cable
Development board (including an APEX
EP20K200E device, SRAM/FLASH,
expansion/prototype connectors, and
processor trace port)
Software drivers (UART, timer/counter,
and PIO module)
SOPC reference design
Nios user manual and programmer
reference manual
s
s
Excalibur Development Kit, Featuring Nios
To support the Nios family of soft core
embedded processors, Altera offers the
Excalibur Development Kit, featuring the Nios
s
s
s
Figure 3. Excalibur Workflow Simplifies SOPC Designs
Select and Configure
Processor
Select and Configure
Peripherals
Configure Registers
Quartus Software
and Industry-Standard
EDA Tools
Verilog
Generate Peripheral
Bus Module
C Code
Cygnus/Red Hat
GNUPro
Compiler and Debugger
SignalTap Plus
PC Trace
JTAG
APEX
Architecture
continued on page 6
May 2000
News & Views
Altera Corporation
5
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