LD6815 series
Low dropout regulators, high PSRR, 150 mA
Rev. 2 — 14 December 2012
Product data sheet
1. Product profile
1.1 General description
Small-size Low DropOut regulator (LDO) family with ultra high Power Supply Rejection
Ratio (PSRR) of 75 dB. The typical voltage drop is 250 mV at 150 mA current rating.
Operating voltages can range from 2.3 V to 5.5 V. The devices are available with fixed
nominal output voltages V
O(nom)
between 1.2 V and 3.6 V.
The LD6815TD/xxH devices show a high-ohmic state (3-state) at the output pin when set
to disabled mode. The LD6815TD/xxP devices contain a pull-down switching transistor to
provide a low-ohmic output state (auto discharge function) in disabled mode.
The LD6815 series devices are available in SOT753 (TSOP5) plastic package with a size
of 2.9
1.5
1.0 mm. All devices are manufactured in monolithic silicon technology.
1.2 Features and benefits
Overcurrent protection
Auto discharge or high-ohmic output stage available
Low quiescent current (0.1
A)
in shutdown mode
High-level ElectroStatic Discharge (ESD) protection (6 kV Human Body Model (HBM))
Industry standard TSOP5 (SOT753) package
1.3 Applications
Smartphones
Mobile handsets
Digital still cameras
Tablet PCs
Mobile internet devices
Portable media players
1.4 Quick reference data
I
OUT
= 150 mA (max)
PSRR = 75 dB at 1 kHz
RMS noise V
n(o)RMS
= 40 mV
at 10 Hz to 100 Hz
t
startup(reg)
= 150
s
V
IN
= 2.3 V to 5.5 V
V
OUT
= 1.2 V to 3.6 V
Dropout voltage V
do
= 250 mV
at I
OUT
= 150 mA
NXP Semiconductors
LD6815 series
Low dropout regulators, high PSRR, 150 mA
2. Pinning information
2.1 Pinning
5
4
1
2
3
Fig 1.
Pin configuration
2.2 Pin description
Table 1.
Symbol
IN
GND
EN
n.c.
OUT
Pin description
Pin
1
2
3
4
5
Description
regulator input voltage
supply ground
device enable input; active HIGH
not connected
regulator output voltage
3. Ordering information
Table 2.
Ordering information
Package
Name
LD6815 series TSOP5
Description
plastic surface-mounted package; 5 eads
Version
SOT753
Type number
Further ordering options see
Section 3.1 “Ordering options”.
3.1 Ordering options
Further information on output voltage is available on request; see
Section 20 “Contact
information”.
An explanation of high-ohmic and pull-down type is in
Section 4 “Block
diagram”.
Table 3.
Type number extension of high-ohmic output
Nominal output
voltage V
O(nom)
1.2 V
1.5 V
1.8 V
2.1 V
2.5 V
Type number
LD6815TD/28H
LD6815TD/29H
LD6815TD/30H
LD6815TD/33H
LD6815TD/36H
Nominal output
voltage V
O(nom)
2.8 V
2.9 V
3.0 V
3.3 V
3.6 V
Type number
LD6815TD/12H
LD6815TD/15H
LD6815TD/18H
LD6815TD/21H
LD6815TD/25H
LD6815_SER
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 14 December 2012
2 of 20
NXP Semiconductors
LD6815 series
Low dropout regulators, high PSRR, 150 mA
Type number extension of pull-down output
Nominal output
voltage V
O(nom)
1.2 V
1.5 V
1.8 V
2.1 V
2.5 V
Type number
LD6815TD/28P
LD6815TD/29P
LD6815TD/30P
LD6815TD/33P
LD6815TD/36P
Nominal output
voltage V
O(nom)
2.8 V
2.9 V
3.0 V
3.3 V
3.6 V
Table 4.
Type number
LD6815TD/12P
LD6815TD/15P
LD6815TD/18P
LD6815TD/21P
LD6815TD/25P
4. Block diagram
9
,1
9
287
9
(1
9
UHIHUHQFH
*(1(5$725
5
5
29(5 &855(17
3527(&7,21
(1$%/( 6+87
'2:1 &,5&8,7
*1'
DDD
Fig 2.
Block diagram of LD6815TD/xxP (auto discharge function)
9
,1
9
287
9
(1
9
UHIHUHQFH
*(1(5$725
5
29(5 &855(17
3527(&7,21
5
(1$%/( 6+87
'2:1 &,5&8,7
*1'
DDD
Fig 3.
LD6815_SER
Block diagram of LD6815TD/xxH
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 14 December 2012
3 of 20
NXP Semiconductors
LD6815 series
Low dropout regulators, high PSRR, 150 mA
5. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0 V).
Symbol
V
IN
V
EN
V
OUT
P
tot
T
stg
T
j
T
amb
V
ESD
Parameter
voltage on pin IN
voltage on pin EN
voltage on pin OUT
total power dissipation
storage temperature
junction temperature
ambient temperature
electrostatic discharge
voltage
HBM level 6
machine model class 3
[2]
[3]
Conditions
4 ms transient
4 ms transient
4 ms transient
[1]
Min
0.5
0.5
0.5
-
55
40
40
-
-
Max
+6.0
+6.0
+6.0
800
+150
+125
+85
6
400
Unit
V
V
V
mW
C
C
C
kV
V
[1]
The (absolute) maximum power dissipation depends on the junction temperature T
j
. Higher power
dissipation is allowed with lower ambient temperatures. The conditions to determine the specified values
are T
amb
= 25
C
and the use of a two-layer Printed-Circuit Board (PCB).
According to IEC 61340-3-1.
According to JESD22-A115C.
[2]
[3]
6. Recommended operating conditions
Table 6.
Operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol
T
amb
T
j
Pin IN
V
IN
Pin EN
V
EN
Pin OUT
V
OUT
C
L(ext)
[1]
Parameter
ambient temperature
junction temperature
voltage on pin IN
voltage on pin EN
voltage on pin OUT
external load capacitance
Conditions
Min
40
-
2.3
0
0.5
[1]
Typ
-
-
-
-
-
1.0
Max
+85
+125
5.5
V
IN
V
IN
+ 0.3
-
Unit
C
C
V
V
V
F
0.7
See
Section 10.1 “Capacitor values”.
LD6815_SER
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 14 December 2012
4 of 20
NXP Semiconductors
LD6815 series
Low dropout regulators, high PSRR, 150 mA
7. Thermal characteristics
Table 7.
Symbol
R
th(j-a)
[1]
Thermal characteristics
Parameter
thermal resistance from junction to ambient
Conditions
[1][2]
Typ
125
Unit
K/W
The overall R
th(j-a)
can vary depending on the board layout. To minimize the effective R
th(j-a)
, all pins must
have a solid connection to larger Cu layer areas for example to the power and ground layer. In multilayer
PCB applications, the second layer is used to create a large heat spreader area directly below the LDO. If
this layer is either ground or power, it is connected with several vias to the top layer connecting to the
device ground or supply. Avoid the use of solder-stop varnish under the chip.
Use the measurement data given for a rough estimation of the R
th(j-a)
in your application. The actual R
th(j-a)
value can vary in applications using different layer stacks and layouts.
[2]
8. Characteristics
Table 8.
Electrical characteristics
At recommended input voltages and T
amb
=
40
C to +85
C; voltages are referenced to GND (ground = 0 V);
unless otherwise specified.
Symbol
Output voltage
V
do
V
O
dropout voltage
output voltage variation
I
OUT
= 150 mA; V
IN
< V
O(nom)
V
OUT
< 1.8 V; I
OUT
= 1 mA
T
amb
= +25
C
40 C
T
amb
+85
C
V
OUT
1.8 V; I
OUT
= 1 mA
T
amb
= +25
C
40 C
T
amb
+85
C
Line regulation error
V
O
/(V
O
xV
I
)
relative output voltage
variation with input voltage
relative output voltage
variation with output current
current on pin OUT
peak output current
V
IN
= (V
O(nom)
+ 0.5 V) to 5.5 V
V
O(nom)
1.8 V; V
OUT
= 0.95
V
O(nom)
V
O(nom)
< 1.8 V; V
OUT
= 0.9
V
O(nom)
I
sc
I
q
short-circuit current
quiescent current
pin OUT
V
EN
= 1.1 V; I
OUT
= 0 mA
V
EN
= 1.1 V; I
OUT
= 150 mA;
V
IN
= V
O(nom)
+ 0.5 V
V
EN
0.4 V
Regulator quiescent current
-
-
-
35
150
0.1
-
-
1
A
A
A
200
200
-
-
-
300
-
-
-
mA
mA
mA
V
IN
= (V
O(nom)
+ 0.5 V) to 5.5 V
0.1
-
+0.1
%/V
2
3
0.5
-
+2
+3
%
%
3
4
0.5
-
+3
+4
%
%
-
250
-
mV
Parameter
Conditions
Min
Typ
Max
Unit
Load regulation error
V
O
/(V
O
xI
O
)
Output current
I
OUT
I
OM
-
-
150
mA
1 mA
I
OUT
150 mA
-
0.005 0.02
%/mA
LD6815_SER
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 2 — 14 December 2012
5 of 20
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