电子工程世界电子工程世界电子工程世界

关键词

搜索

型号

搜索

SI5350A-B02643-GT

产品描述ANY FREQUENCY, ANY OUTPUT, XTAL
产品类别半导体    模拟混合信号IC   
文件大小54KB,共2页
制造商Silicon Laboratories Inc
下载文档 全文预览

SI5350A-B02643-GT在线购买

供应商 器件名称 价格 最低购买 库存  
SI5350A-B02643-GT - - 点击查看 点击购买

SI5350A-B02643-GT概述

ANY FREQUENCY, ANY OUTPUT, XTAL

文档预览

下载PDF文档
Si5350/51-B
Factory-Programmable Any-Frequency CMOS Clock Generator
Description
The Si5350/51 family of highly flexible, programmable
clock generators can be customized to generate up to
eight independent non-integer-related frequencies. The
devices have eight CMOS clock outputs offered in a
space saving 4x4 mm 20-QFN or lower cost three clock
output versions offered in a 10-MSOP package. Each
output has an independent MultiSynth™ fractional
divider that accepts a high-frequency reference from
one of the device’s internal PLLs and accurately divides
down the clock to generate unique, non-integer-related
frequencies from 2.5 kHz to 200 MHz. Any combination
of output frequencies can be generated by the device.
All clocks are generated with 0 ppm frequency
synthesis error, enabling the replacement of XOs and
PLL-based clocks while simplifying design and
minimizing cost. As an added feature, the Si5350/51
features an integrated VCXO which eliminates the need
for pullable crystals. The Si5350 features configurable
control pin options allowing the direct pin control of
frequency select, output enable, spread spectrum
enable and powerdown. Each output supports 1.8, 2.5,
or 3.3 V operation, eliminating the need for external
level translators in mixed-supply applications.
Features
-
Generates any frequency on any output
-
2.5 kHz to 200 MHz
-
Exact clock synthesis: 0 ppm error
-
Similar frequency flexibility as 8 independent PLLs
-
Accepts crystal or external reference clock
-
< 70 ps typical period jitter for any configuration
-
Glitchless switching between output frequencies
-
Integrated VCXO eliminates need for pullable
crystal
-
Si5350 (pin) and Si5351 (I
2
C) versions
-
User-definable control pins:
-
Frequency select, output enable, spread spectrum
enable, powerdown
-
Spread spectrum clock generation
-
–0.1 to –2.5% down, ±0.1 to ±1.5% center
-
Two week sample lead time for any custom clock
-
Small size: 4x4 mm 20-QFN and 10-MSOP
-
Industrial temperature range: –40 to +85
Applications
-
-
-
-
-
-
-
-
HDTV, DVD/Blu-ray, set-top box
Audio/video equipment, gaming
Printers, scanners, projectors
Audio DAC/CODEC
USB Audio
Residential gateways
Networking/communication
Servers, storage
VDD
MultiSynth
0
MultiSynth
1
MultiSynth
2
MultiSynth
3
20-QFN
VDDOA
R0
R1
R2
R3
R4
R5
R6
R7
CLK0
CLK1
VDDOB
CLK2
CLK3
VDDOC
CLK4
CLK5
VDDOD
CLK6
CLK7
XA
10-MSOP
VDD
VDDO
XB
OSC
PLL
A
XA
OSC
XB
PLL
A
MultiSynth
0
R0
CLK0
PLL
B
PLL
B
P0
P1
Control
Logic
MultiSynth
1
R1
CLK1
P0
P1
MultiSynth
4
Control
Logic
MultiSynth
5
MultiSynth
6
MultiSynth
7
GND
MultiSynth
2
R2
CLK2
P2
P3
GND
P4
Copyright © 2015 by Silicon Laboratories
7.15.15
自己编写flash烧写程序?
从何处烧入呢? cpu的默认运行地址是从flash开始 这个烧写程序,我想放到sdram中,怎么让cpu从sdram开始运行呢? 谢谢~~~~...
topcool99 模拟与混合信号
纯手打FPGA与stm32通信的FPGA部分程序分析
纯手打FPGA与stm32通信的FPGA部分程序分析 ...
怀念潼恩 FPGA/CPLD
急问(关于GPS模块切换的问题)
急问:各位大侠,在一个应用程序里面通过创建进程打开GPS模块执行exe。 然后怎么样切换到应用程序界面上来了? 现在我可以通过按键来控制应用程序的几个模块,但是切换到GPS模块后,怎么样再 ......
gaoyuan78 嵌入式系统
wince 6.0 按键驱动
谁做过wince 6.0 的按键驱动啊。或者有这方面资料的给分 duanhjlt@163.com...
1204 嵌入式系统
关于2110S的HO输出波形不正常的求助
213019 电路原理图是这样的,在芯片的1号管脚,LO输出是标准的方波,但是8号管脚,HO输出的波形不正常,有方波的感觉,但是电压只有6V,感觉是没有自举成功,有高手能提点建议或者有人碰到过这 ......
q454224565 模拟电子
交流电抗器和直流电抗器有哪些区别?
电力系统中所采取的电抗器常见的有串联电抗器和并联电抗器。串联电抗器主要用来限制短路电流,也有在滤波器中与电容器串联或并联用来限制电网中的高次谐波。 220kV、110kV、35kV、10kV电网 ......
Jacktang 模拟与混合信号

 
EEWorld订阅号

 
EEWorld服务号

 
汽车开发圈

 
机器人开发圈

About Us 关于我们 客户服务 联系方式 器件索引 网站地图 最新更新 手机版

站点相关: 大学堂 TI培训 Datasheet 电子工程 索引文件: 1613  1973  322  1255  2057  20  58  42  43  21 

器件索引   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

北京市海淀区中关村大街18号B座15层1530室 电话:(010)82350740 邮编:100190

电子工程世界版权所有 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号 Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved