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SIT9122AC-1C2-33E312.500000T

产品描述OSC MEMS 312.5000MHZ LVPECL SMD
产品类别无源元件   
文件大小340KB,共8页
制造商SiTime
标准
下载文档 详细参数 全文预览

SIT9122AC-1C2-33E312.500000T概述

OSC MEMS 312.5000MHZ LVPECL SMD

SIT9122AC-1C2-33E312.500000T规格参数

参数名称属性值
类型MEMS(硅)
频率312.5MHz
功能启用/禁用
输出LVPECL
电压 - 电源3.3V
频率稳定度±25ppm
工作温度-20°C ~ 70°C
电流 - 电源(最大值)69mA
安装类型表面贴装
封装/外壳6-SMD,无引线
大小/尺寸0.197" 长 x 0.126" 宽(5.00mm x 3.20mm)
高度 - 安装(最大值)0.032"(0.80mm)
电流 - 电源(禁用)(最大值)35mA

文档预览

下载PDF文档
SiT9122
220-625 MHz High Performance Differential Oscillator
The Smart Timing Choice
The Smart Timing Choice
Features
Applications
Any frequency between 220 MHz and 625 MHz accurate to 6 decimal
places
LVPECL and LVDS output signaling types
0.6ps RMS phase jitter (random) over 12 kHz to 20 MHz bandwidth
Frequency stability as low as ±10 ppm
Industrial and extended commercial temperature ranges
Industry-standard packages: 3.2x2.5, 5.0x3.2 and 7.0x5.0 mmxmm
For frequencies lower than 220 MHz, refer to SiT9121 datasheet
10GB Ethernet, SONET, SATA, SAS, Fibre Channel,
PCI-Express
Telecom, networking, instrumentation, storage, servers
Electrical Characteristics
Parameter and Conditions
Supply Voltage
Symbol
Vdd
Min.
2.97
2.25
2.25
Output Frequency Range
Frequency Stability
f
F_stab
220
-10
-20
-25
-50
First Year Aging
10-year Aging
Operating Temperature Range
Input Voltage High
Input Voltage Low
Input Pull-up Impedance
Start-up Time
Resume Time
Duty Cycle
Current Consumption
OE Disable Supply Current
Output Disable Leakage Current
Standby Current
Maximum Output Current
Output High Voltage
Output Low Voltage
Output Differential Voltage Swing
Rise/Fall Time
OE Enable/Disable Time
RMS Period Jitter
F_aging1
F_aging10
T_use
VIH
VIL
Z_in
T_start
T_resume
DC
Idd
I_OE
I_leak
I_std
I_driver
VOH
VOL
V_Swing
Tr, Tf
T_oe
T_jitt
-2
-5
-40
-20
70%
2
45
Vdd-1.1
Vdd-1.9
1.2
Typ.
3.3
2.5
100
6
6
61
1.6
300
1.2
1.2
1.2
0.6
Max.
3.63
2.75
3.63
625
+10
+20
+25
+50
+2
+5
+85
+70
30%
250
10
10
55
69
35
1
100
30
Vdd-0.7
Vdd-1.5
2.0
500
115
1.7
1.7
1.7
0.85
Unit
V
V
V
MHz
ppm
ppm
ppm
ppm
ppm
ppm
°C
°C
Vdd
Vdd
ms
ms
%
mA
mA
A
A
mA
V
V
V
ps
ns
ps
ps
ps
ps
25°C
25°C
Industrial
Extended Commercial
Pin 1, OE or ST
Pin 1, OE or ST
Pin 1, OE logic high or logic low, or ST logic high
Pin 1, ST logic low
Measured from the time Vdd reaches its rated minimum value.
In Standby mode, measured from the time ST pin crosses
50% threshold.
Contact SiTime for tighter duty cycle
Excluding Load Termination Current, Vdd = 3.3V or 2.5V
OE = Low
OE = Low
ST = Low, for all Vdds
Maximum average current drawn from OUT+ or OUT-
See Figure 1(a)
See Figure 1(a)
See Figure 1(b)
20% to 80%, see Figure 1(a)
f = 220 MHz - For other frequencies, T_oe = 100ns + 3 period
f = 266 MHz, VDD = 3.3V or 2.5V
f = 312.5 MHz, VDD = 3.3V or 2.5V
f = 622.08 MHz, VDD = 3.3V or 2.5V
f = 312.5 MHz, Integration bandwidth = 12 kHz to 20 MHz, all
Vdds
Excluding Load Termination Current, Vdd = 3.3V or 2.5V
OE = Low
See Figure 2
Inclusive of initial tolerance, operating temperature, rated power
supply voltage, and load variations
Termination schemes in Figures 1 and 2 - XX ordering code
Condition
LVPECL and LVDS, Common Electrical Characteristics
LVPECL, DC and AC Characteristics
RMS Phase Jitter (random)
T_phj
LVDS, DC and AC Characteristics
Current Consumption
OE Disable Supply Current
Differential Output Voltage
Idd
I_OE
VOD
250
47
350
55
35
450
mA
mA
mV
SiTime Corporation
Rev. 1.05
990 Almanor Avenue, Sunnyvale, CA 94085
(408) 328-4400
www.sitime.com
Revised October 6, 2014
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