FeaTures
n
n
n
n
LTC2874
Quad IO-Link Master
Hot Swap Controller
and PHY
DescripTion
The
LTC
®
2874
provides a rugged, 4-port IO-Link power and
communications interface to remote devices connected
by cables up to 20m in length.
Output supply voltage and inrush current are ramped
up in a controlled manner using external N-channel
MOSFETs, providing improved robustness compared to
fully integrated solutions.
Wake-up pulse generation, line noise suppression, con-
nection sensing and automatic restart after fault conditions
are supported, along with signaling at 4.8kb/s, 38.4kb/s,
and 230.4kb/s.
Configuration and fault reporting are exchanged using
a SPI-compatible 4-wire interface that operates at clock
rates up to 20MHz.
The LTC2874 implements an IO-Link master PHY. For
IO-Link device designs, see the
LT
®
3669.
L,
LT, LTC, LTM, Linear Technology, the Linear logo, µModule are registered trademarks and
Hot Swap is a trademark of Linear Technology Corporation. IO-Link is a registered trademark of
PROFIBUS User Organization (PNO). All other trademarks are the property of their respective
owners.
n
n
n
n
n
n
n
n
n
n
IO-Link
®
Compatible (COM1/COM2/COM3)
8V to 34V Operation
Hot Swap™ Controller Protected Supply Outputs
Discrete Power MOSFETs for Ruggedness and
Flexibility
Configurable 100mA (4-Port), 200mA (2-Port), or
400mA (1-Port) CQ Drive Capability
Automatic Wake-Up Pulse Generation
Automatic Cable Sensing
CQ Pins Protected to ±50V
Configurable L+ Current Limit with Foldback
Short Circuit, Input UV/OV and Thermal Protection
Optional Interrupt and Auto-Retry after Faults
2.9V to 5.5V Logic Supply for Flexible Digital Interface
No Damage or Latchup to ±8kV HBM ESD
38-Lead (5mm × 7mm) QFN and TSSOP Packages
applicaTions
n
n
n
IO-Link Masters
Intelligent Sensors and Actuators
Factory Automation Networks
Typical applicaTion
Quad-Port 200mA Power Source and Signaling Interface
8V TO 34V
100µF
1µF
V
DD
SENSE
+
LTC2874
SENSE
–
1
20V/DIV
CQ3
10
CQ4
4µs/DIV
LOAD: 4nF
CQ1, CQ3: SLEW = 0
CQ2, CQ4: SLEW = 1
4
3
4
3
4
3
1
2
1
2
1
2
1
2
2874 TA01b
Operating Waveforms
CQ1
0.2
CQ2
2.9V TO 5.5V
4.7k
IRQ
V
CC
1µF
4
4
4
V
L
IRQ
SENSE
–
2
SENSE
–
3
SENSE
–
4
TXENn
TXDn
RXDn
GATE1
GATE2
GATE3
GATE4
L+1
CQ1
L+2
CQ2
L+3
CQ3
L+4
CQ4
µC
CS
SCK
SDI
SDO
4
3
GND
GND
2874 TA01a
2874fb
For more information
www.linear.com/LTC2874
1
LTC2874
absoluTe MaxiMuM raTings
(Notes 1, 2, 3)
Input Supplies
V
DD
........................................................ –0.3V to 40V
V
L
............................................................ –0.3V to 6V
Input Voltages
CS,
SCK, SDI, TXD .................................. –0.3V to 6V
TXEN ............................................ –0.3V to V
L
+ 0.3V
CQ................................................... V
DD
– 50V to 50V
GATE – L+ (Note 4) ................................ –0.3V to 10V
L+ ............................................................. –6V to 50V
SENSE
+
, SENSE
–
...................... V
DD
– 2V to V
DD
+ 2V
Output Voltages
GATE .......................................... –0.3V to (V
L+
) + 15V
IRQ
.......................................................... –0.3V to 6V
RXD, SDO ..................................... –0.3V to V
L
+ 0.3V
Operating Temperature Range
LTC2874I..............................................–40°C to 85°C
Maximum Junction Temperature .......................... 150°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
FE Package ....................................................... 300°C
pin conFiguraTion
TOP VIEW
SENSE
–
4
TXEN4
GATE4
SENSE
–
4
L+4
CQ4
CQ3
GATE3
SENSE
–
3
L+3
1
2
3
4
5
6
7
8
9
39
GND
38 TXD4
37 RXD4
36 TXEN3
35 TXD3
34 RXD3
33
CS
32 SCK
31 SDI
30 GND
29 GND
28 V
L
27 TXEN2
26 TXD2
25 RXD2
24 SDO
23
IRQ
22 TXEN1
21 TXD1
20 RXD1
CQ4 1
CQ3 2
GATE3 3
SENSE 3 4
L+3 5
SENSE
+
–
TOP VIEW
GATE4
TXEN4
TXEN3
31 TXD3
30 RXD3
29
CS
28 SCK
27 SDI
39
GND
26 GND
25 GND
24 V
L
23 TXEN2
22 TXD2
21 RXD2
20 SDO
13 14 15 16 17 18 19
–
1
38 37 36 35 34 33 32
SENSE
+
10
V
DD
11
GATE2 12
SENSE
–
2 13
L+2 14
CQ2 15
CQ1 16
GATE1 17
SENSE
–
1 18
L+1 19
6
V
DD
7
GATE2 8
SENSE 2 9
L+2 10
CQ2 11
CQ1 12
L+1
–
RXD1
TXD1
TXEN1
RXD4
TXD4
L+4
GATE1
FE PACKAGE
38-LEAD PLASTIC TSSOP
T
JMAX
= 150°C,
θ
JA
= 25°C/W (NOTE 5)
EXPOSED PAD (PIN 39) IS GND, MUST BE SOLDERED TO PCB
UHF PACKAGE
38-LEAD (5mm
×
7mm) PLASTIC QFN
T
JMAX
= 150°C,
θ
JA
= 34°C/W (NOTE 5)
EXPOSED PAD (PIN 39) IS GND, MUST BE SOLDERED TO PCB
SENSE
IRQ
2
2874fb
For more information
www.linear.com/LTC2874
LTC2874
orDer inForMaTion
LEAD FREE FINISH
LTC2874IFE#PBF
LTC2874IUHF#PBF
TAPE AND REEL
LTC2874IFE#TRPBF
LTC2874IUHF#TRPBF
PART MARKING
LTC2874FE
2874
PACKAGE DESCRIPTION
38-Lead Plastic TSSOP
38-Lead (5mm
×
7mm) Plastic QFN
TEMPERATURE RANGE
–40°C to 85°C
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on nonstandard lead based finish parts.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. Unless otherwise noted, V
DD
= 24V, V
L
= 3.3V, and registers are reset
to their default states. (Note 2)
SYMBOL
Input Supply
V
DD
I
DD
V
DD(UVL)
V
DD(UVTH)
Input Supply Operating Range
V
DD
Input Supply Current, All
Ports Enabled
UV Lockout
UV Lockout Hysteresis
UV Bit Threshold
V
DD
Rising
24VMODE = 1
24VMODE = 0
V
DD
Rising, OV_TH = 0x1
l
l
elecTrical characTerisTics
PARAMETER
CONDITIONS
24VMODE = 0
24VMODE = 1
MIN
l
l
l
l
TYP
MAX
34
34
UNITS
V
V
mA
V
V
8
20
5
5.5
6
0.13
16.2
6.8
31
16.8
7.1
0.2
32
0.4
DRVEN = 0xF, ENL+ = 0xF, ILLM = 0x0
V
DD
Rising
8
6.5
17.4
7.4
33
V
V
V
V
V
UV Bit Threshold Hysteresis
V
DD(OVTH)
Logic Supply
V
L
I
L
V
L+(PGTH)
ΔV
CB(TH)
ΔV
ACL
Logic Supply Range
V
L
Logic Supply Current
L+ Power Good Threshold
L+ Power Good Hysteresis
Circuit Breaker Threshold
Analog Current Limit Voltage
ΔV
CB(TH)
= V(SENSE
+
) – V(SENSE
–
) (Note 7)
ΔV
ACL
= V(SENSE
+
) – V(SENSE
–
)
V(L+) = 0V, FLDBK_MODE = 1
V(L+) = V
DD
– 1V
Start-Up, 2XPTC Enabled, V(L+) > 18V (Note 7)
V(SENSE
+
) – V(SENSE
–
) = 250mV,
LPTC = 0x03 (Figure 1)
V(SENSE
+
) – V(SENSE
–
) = 250mV,
LPTC = 0x03 (Figure 1)
C
G
= 0nF
C
G
= 10nF
2XPTC = 0x0
V(SENSE
–
) = 24V
l
l
l
l
OV Bit Threshold
OV Bit Threshold Hysteresis
l
2.9
0.1
1.2
1.5
100
ΔV
ACL
– 0.8
9.2
42
110
16.7
50
100
122.5
5.5
1
1.9
V
mA
V
mV
mV
Digital Inputs at 0V or V
L
V
L+(PGTH)
= V
DD
– V(L+)
l
L+ Power Supply Output
l
24.2
58
135
mV
mV
mV
µs
t
OC(L+)
t
D(ACL)
L+ Pin OC Fault Filter
ΔV
SENSE
to GATE Low
l
l
l
19
24
52
0
62
10
25
72
25
µs
µs
ms
µA
Start-Up Current Pulse Duration
SENSE
–
Pin Input Current
2874fb
For more information
www.linear.com/LTC2874
3
LTC2874
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. Unless otherwise noted, V
DD
= 24V, V
L
= 3.3V, and registers are reset
to their default states. (Note 2)
SYMBOL
Gate Drive
ΔV
GATE
I
GATE(UP)
I
GATE(DN)
I
GATE
(LIM)
External N-Channel Gate Drive
(V
GATE
– V
L+
)
GATE Pin Output Current,
Sourcing
Pull-Down Current from GATE to
SOURCE During UVLO or L+ OC
Timeout Event
(V
GATE
– V
L+
) for Power Good
CQ Line Driver
V
RQH
, V
RQL
Residual Voltage (Note 6)
Output High, I(CQ) = –100mA
Output Low, I(CQ) = 100mA
(Figure 2)
(Figure 3)
C
L
= 100pF, V
DD
– CQ or CQ = 5V (Figure 3)
SLEW = 0, SIO_MODE = 0
SLEW = 1, SIO_MODE = 0
24VMODE = 1
24VMODE = 0
24VMODE = 1
24VMODE = 0
24VMODE = 1
24VMODE = 0
V(CQ) = V
DD
– 1V, ILLM = 0x0
I(RXD) = –100µA
I(RXD) = 100µA
2.9V ≤ V
L
≤ 5.5V
0V ≤ V
IN
≤ V
L
CS,
TXD
SCK, SDI, TXEN
(Note 7)
I(SDO) = –1mA
I(SDO) = 1mA
I(IRQ) = 3mA
I(IRQ) = 5mA
ILLM = 0x3, 0V ≤ V(CQ) ≤ 5V
ILLM = 0x3, 5V < V(CQ) ≤ 30V
ILLM = 0x2, 5V < V(CQ) ≤ 30V
ILLM = 0x1, 5V < V(CQ) ≤ 30V
ENL+
UVLO_VDD (Note 7) or OV_VDD Event
l
l
l
l
l
l
elecTrical characTerisTics
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
I(GATE) = –1µA
V
DD
= 17V to 30V
V
DD
= 8V
V(SENSE
+
) – V(SENSE
–
) = 0V, V(GATE) = 1V
l
l
l
10
4.5
–10
13
–14
1.2
90
15
15
–20
V
V
µA
mA
mA
GATE Pin Output Current, Sinking ENL+ = 0, V(GATE) = 10V
V(SENSE
+
) – V(SENSE
–
) = 0.2V, ΔV
GATE
= 10V
V(L+) = 8V to 30V
3.0
l
3.8
1.2
1.1
4.5
1.6
1.5
V
V
V
mA
I
QPKH
, I
QPKL
Wake-Up Request (WURQ)
Current
I
QH
, I
QL
t
OC(CQ)
Current Limit
Overcurrent Timeout
±500
±110
13
13
10.5
0.5 •
V
DD
8
0.3 •
V
DD
2.0
0.05 •
V
DD
390
V
L
– 0.4
±700
±160
±230
24
24
11.9
9.4
2.5
510
13
0.7 •
V
DD
11
0.5 •
V
DD
2.9
0.2 •
V
DD
630
0.4
mA
µs
µs
V
V
V
V
V
V
kΩ
V
V
V
µA
µA
pF
V
V
V
V
mA
mA
mA
mA
µs
µs
2874fb
CQ Line Receiver
V
THH
V
THL
V
HYS
Input High Threshold Voltage
Input Low Threshold Voltage
Input Hysteresis
Input Resistance
V
OH
V
OL
Digital I/O
Input Threshold Voltage
Input Leakage Current
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
Output High Voltage
Output Low Voltage
0.33 •
V
L
–10
–1
V
L
– 0.4
0.67 •
V
L
1
10
2.5
0.4
0.4
0.7
Input Capacitance
V
OH(SDO)
V
OL(SDO)
V
OL(IRQ)
SDO Output High Voltage
SDO Output Low Voltage
IRQ
Open Drain Output Low
Voltage
Receive-Mode Load/Discharge
Current
Other Pin Functions
I
LL
l
l
l
l
l
l
0
5
3.2
2.2
6.2
6.2
3.7
2.5
2
10
6.8
6.8
4.2
2.8
4
15
Input to GATE Off Propagation
Delay
4
For more information
www.linear.com/LTC2874
LTC2874
swiTching characTerisTics
SYMBOL
t
RETRY
PARAMETER
GATE Turn-On Delay
Auto-Retry Delay
ESD Protection
CQ and L+ Pins
All Other Pins
Driver and Receiver
f
DTR
T
BIT
C
CQ
Driver
t
DR
, t
DF
Rise or Fall Time
SLEW = 0 (Figure 4)
C
L
= 100pF
C
L
= 4nF
SLEW = 1 (Figure 4)
C
L
= 100pF
C
L
= 4nF
t
PHLD
, t
PLHD
Propagation Delay
t
SKEWD
t
ZHD
, t
ZLD
t
HZD
, t
LZD
t
WUDLY
t
WU
Receiver
t
H
, t
L
Detection Time
(Figure 7)
T
BIT
= 208.3µs (COM1), NSF = 0x1
T
BIT
= 26.0µs (COM2), NSF = 0x2
T
BIT
= 4.34µs (COM3), NSF = 0x3
(Figure 8, Note 9)
T
BIT
= 208.3µs (COM1), NSF = 0x1
T
BIT
= 26.0µs (COM2), NSF = 0x2
T
BIT
= 4.34µs (COM3), NSF = 0x3
NSF = 0x0, C
L
= 100pF (Figure 7)
NSF = 0x0, C
L
= 100pF (Figure 7)
l
l
l
l
l
l
l
l
l
l
l
l
l
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. Unless otherwise noted, V
DD
= 24V, V
L
= 3.3V, and registers are reset
to their default states.
CONDITIONS
l
MIN
TYP
10
3.9
±8
±6
MAX
20
UNITS
µs
s
kV
kV
RETRYTC = 0x5
Human Body Model (Note 7)
Maximum Data Transfer Rate
C
L
= 4nF
SLEW = 0
SLEW = 1
SLEW = 0
SLEW = 1
(Note 7)
l
l
38.4
230.4
26.04
4.34
100
kb/s
kb/s
µs
µs
pF
Bit Time
CQ Pin Input Capacitance
3
3
0.5
0.5
4
1.3
0.5
0.5
5.2
5.2
0.869
0.869
8
3
µs
µs
µs
µs
µs
µs
µs
µs
C
L
= 100pF (Figure 5)
SLEW = 0
SLEW = 1
C
L
= 100pF (Figure 5)
SLEW = 0
SLEW = 1
R
L
= 10kΩ, C
L
= 100pF, ILLM = 0x0 (Figure 6)
SLEW = 0
SLEW = 1
R
L
= 10kΩ, C
L
= 100pF, ILLM = 0x0 (Figure 6)
(Figure 2)
(Figure 2)
Skew
Enable Time
l
l
l
l
l
l
12
3
3
7.5
75
80
8.3
20
85
10
µs
µs
µs
µs
µs
ms
Disable Time
Wake-Up Request (WURQ) Delay
WURQ Pulse Duration
WURQ Cooldown Timer
1/16
1/16
1/16
1/10
1/9
1/7
1/10
1/9
1/7
200
100
1/16
1/16
1/16
600
T
BIT
T
BIT
T
BIT
T
BIT
T
BIT
T
BIT
ns
ns
t
ND
Noise Suppression Time
t
PHLR
, t
PLHR
Receiver Propagation Delay
t
SKEWR
Receiver Skew
2874fb
For more information
www.linear.com/LTC2874
5
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
