NVD5117PL
Power MOSFET
Features
−60
V, 16 mW,
−61
A, Single P−Channel
•
•
•
•
•
Low R
DS(on)
to Minimize Conduction Losses
High Current Capability
Avalanche Energy Specified
AEC−Q101 Qualified
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
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V
(BR)DSS
−60
V
R
DS(on)
16 mW @
−10
V
22 mW @
−4.5
V
S
G
I
D
−61
A
MAXIMUM RATINGS
(T
J
= 25°C unless otherwise noted)
Parameter
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain Cur-
rent R
qJC
(Note 1)
Power Dissipation R
qJC
(Note 1)
Continuous Drain Cur-
rent R
qJA
(Notes 1 & 2)
Power Dissipation R
qJA
(Notes 1 & 2)
Pulsed Drain Current
Current Limited by
Package (Note 3)
T
C
= 25°C
Steady
State
T
C
= 100°C
T
C
= 25°C
T
C
= 100°C
T
A
= 25°C
Steady
State
T
A
= 100°C
T
A
= 25°C
T
A
= 100°C
T
A
= 25°C, t
p
= 10
ms
T
A
= 25°C
I
DM
I
Dmaxpkg
T
J
, T
stg
I
S
E
AS
P
D
I
D
P
D
Symbol
V
DSS
V
GS
I
D
Value
−60
"20
−61
−43
118
59
−11
−8
4.1
2.1
−419
60
−55
to
175
−118
240
A
A
°C
A
mJ
W
A
W
Unit
V
V
A
P−Channel
D
4
1 2
3
DPAK
CASE 369C
STYLE 2
MARKING DIAGRAMS
& PIN ASSIGNMENT
4
Drain
Operating Junction and Storage Temperature
Source Current (Body Diode)
Single Pulse Drain−to−Source Avalanche
Energy (T
J
= 25°C, V
DD
= 50 V, V
GS
= 10 V,
I
L(pk)
= 40 A, L = 0.3 mH, R
G
= 25
W)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
T
L
260
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
2
1 Drain 3
Gate Source
A
= Assembly Location*
Y
= Year
WW
= Work Week
5117L = Device Code
G
= Pb−Free Package
* The Assembly Location Code (A) is front side
optional. In cases where the Assembly Location is
stamped in the package bottom (molding ejecter
pin), the front side assembly code may be blank.
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Junction−to−Case
−
Steady State (Drain)
Junction−to−Ambient
−
Steady State (Note 2)
Symbol
R
qJC
R
qJA
Value
1.3
37
Unit
°C/W
1. The entire application environment impacts the thermal resistance values
shown, they are not constants and are only valid for the particular conditions
noted.
2. Surface−mounted on FR4 board using a 650 mm
2
, 2 oz. Cu pad.
3. Maximum current for pulses as long as 1 second is higher but is dependent
on pulse duration and duty cycle.
ORDERING INFORMATION
Device
NVD5117PLT4G
Package
DPAK
(Pb−Free)
Shipping
†
2500 / Tape &
Reel
2500 / Tape &
Reel
DPAK
NVD5117PLT4G−
(Pb−Free)
VF01
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2017
May, 2017
−
Rev. 2
1
AYWW
51
17LG
Publication Order Number:
NVD5117PL/D
NVD5117PL
ELECTRICAL CHARACTERISTICS
(T
J
= 25°C unless otherwise noted)
Parameter
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
Zero Gate Voltage Drain Current
V
(BR)DSS
I
DSS
I
GSS
V
GS(TH)
R
DS(on)
g
FS
C
iss
C
oss
C
rss
Q
G(TOT)
Q
G(TH)
Q
GS
Q
GD
V
GP
t
d(on)
t
r
t
d(off)
t
f
V
SD
t
RR
t
a
t
b
Q
RR
V
GS
= 0 V, dl
s
/dt = 100 A/ms,
I
s
=
−29
A
V
GS
= 0 V,
I
S
=
−29
A
T
J
= 25°C
T
J
= 125°C
V
GS
=
−4.5
V, V
DS
=
−48
V,
I
D
=
−29
A, R
G
= 2.5
W
V
GS
=
−4.5
V, V
DS
=
−48
V,
I
D
=
−29
A
V
DS
=
−48
V,
I
D
=
−29
A
V
GS
=
−4.5
V
V
GS
=
−10
V
V
GS
= 0 V, I
D
=
−250
mA
V
GS
= 0 V,
V
DS
=
−60
V
T
J
= 25°C
T
J
= 125°C
−60
−1.0
−100
"100
nA
V
mA
Symbol
Test Condition
Min
Typ
Max
Unit
Gate−to−Source Leakage Current
ON CHARACTERISTICS
(Note 4)
Gate Threshold Voltage
Drain−to−Source On Resistance
V
DS
= 0 V, V
GS
=
"20
V
V
GS
= V
DS
, I
D
=
−250
mA
V
GS
=
−10
V, I
D
=
−29
A
V
GS
=
−4.5
V, I
D
=
−29
A
V
DS
=
−15
V, I
D
=
−15
A
V
GS
= 0 V, f = 1.0 MHz,
V
DS
=
−25
V
−1.5
12
16
30
−2.5
16
22
V
mW
Froward Transconductance
CHARGES AND CAPACITANCES
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
S
4800
480
320
49
85
3
13
28
3.2
pF
nC
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Plateau Voltage
V
SWITCHING CHARACTERISTICS
(Notes 4)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
22
195
50
132
ns
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
−0.86
−0.74
36
19
17
44
nC
ns
−1.0
V
Reverse Recovery Time
Charge Time
Discharge Time
Reverse Recovery Charge
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Pulse Test: Pulse Width
≤
300
ms,
Duty Cycle
≤
2%.
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2
NVD5117PL
TYPICAL CHARACTERISTICS
120
V
GS
=
−10
V
−I
D
, DRAIN CURRENT (A)
100
80
60
40
20
0
−4.5
V
−4.2
V
120
−I
D
, DRAIN CURRENT (A)
100
80
60
40
20
0
T
J
= 125°C
T
J
= 25°C
T
J
=
−55°C
2
3
4
5
6
V
DS
≥
−10
V
T
J
= 25°C
−4
V
−3.8
V
−3.6
V
−3.4
V
−3.2
V
−3
V
0
1
2
3
4
5
−V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
−V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (W)
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (W)
0.024
0.022
0.020
0.018
0.016
0.014
0.012
0.010
10
20
Figure 2. Transfer Characteristics
0.065
0.055
0.045
0.035
0.025
0.015
0.005
3
4
5
6
7
8
I
D
=
−29
A
T
J
= 25°C
T
J
= 25°C
V
GS
=
−4.5
V
V
GS
=
−10
V
9
10
30
40
50
60
70
80
90
100 110 120
−V
GS
, GATE−TO−SOURCE VOLTAGE (V)
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (NORMALIZED)
−I
D
, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
2.00
1.80
1.60
1.40
1.20
1.00
0.80
0.60
−50
−25
0
25
50
75
100
125
150
175
100
5
V
GS
=
−10
V
I
D
=
−29
A
−I
DSS
, LEAKAGE (nA)
10000
100000
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
V
GS
= 0 V
T
J
= 150°C
T
J
= 125°C
1000
10
15
20
25
30
35
40
45
50
55
60
T
J
, JUNCTION TEMPERATURE (°C)
−V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
NVD5117PL
TYPICAL CHARACTERISTICS
6000
5500
5000
C, CAPACITANCE (pF)
4500
4000
3500
3000
2500
2000
1500
1000
500
0
0
C
oss
10
20
30
40
50
C
iss
V
GS
= 0 V
T
J
= 25°C
10
Q
T
8
6
4
2
0
Q
gs
Q
gd
−V
GS
, GATE−TO−SOURCE VOLTAGE (V)
C
rss
V
DS
=
−48
V
I
D
=
−29
A
T
J
= 25°C
0
10
20
30
40
50
60
70
80
90
60
−V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Q
g
, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
1000.0
I
S
, SOURCE CURRENT (A)
120
100
80
60
40
20
0
Figure 8. Gate−to−Source vs. Total Charge
V
GS
= 0 V
T
J
= 25°C
t, TIME (ns)
100.0
t
r
t
f
t
d(off)
t
d(on)
10.0
V
DD
=
−48
V
I
D
=
−29
A
V
GS
=
−10
V
1
10
R
G
, GATE RESISTANCE (W)
1.0
100
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
−V
SD
, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
1000
V
GS
=
−10
V
Single Pulse
T
C
= 25°C
100
ms
1 ms
10 ms
250
E
AS
, SINGLE PULSE DRAIN−TO−
SOURCE AVALANCHE ENERGY (mJ)
Figure 10. Diode Forward Voltage vs. Current
10
ms
I
D
=
−40
A
200
150
100
50
0
25
−I
D
, DRAIN CURRENT (A)
100
10
dc
1
R
DS(on)
Limit
Thermal Limit
Package Limit
0.1
1
10
0.1
100
50
75
100
125
150
175
−V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
T
J
, STARTING JUNCTION TEMPERATURE (°C)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
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4
NVD5117PL
TYPICAL CHARACTERISTICS
10
R
qJC(t)
(°C/W) EFFECTIVE TRANSIENT
THERMAL RESISTANCE
1
Duty Cycle = 0.5
0.2
0.1
0.05
0.02
0.01
Single Pulse
0.00001
0.0001
PULSE TIME (sec)
0.001
0.01
0.1
0.1
0.01
0.000001
Figure 13. Thermal Response
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