February 2017
3.3V Single-Rail ARINC 429 Differential Line Driver
with Integrated DO-160G Level 3 Lightning Protection
FEATURES
HI-8597
GENERAL DESCRIPTION
The HI-8597 is a 3.3V single supply ARINC 429 line driver
with built-in lightning protection. The internal lightning
protection circuitry allows compliance with RTCA/DO-
160G, Section 22 Level 3 Pin Injection Test Waveform
Set A (3 & 4), Set B (3 & 5A) and Set Z (3 & 5B) without
the use of any external components, an industry first.
Pin surge levels for Level 3 are summarized as follows:
Waveform
3
Voc/Isc
600V/24A
Waveform
4
Voc/Isc
300V/60A
Waveform
5A
Voc/Isc
300V/300A
Waveform
5B
Voc/Isc
300V/300A
•
Internal lightning protection circuitry allows
compliance with RTCA/DO-160G, Section 22
Level 3 Pin Injection Test Waveform Set A (3 &
4), Set B (3 & 5A) and Set Z (3 & 5B).
•
Operates from a single +3.3V supply
•
Superb short circuit capability on ARINC 429
outputs (±50V for 1 second)
•
All ARINC 429 voltage levels generated on-chip
•
Digitally selectable rise and fall times
•
Tri-state Outputs
•
37.5 Ohm output resistance allows direct
connection to ARINC 429 bus
•
Industrial and Extended temperature ranges
•
Burn-in available
An internal 37.5 Ohm resistor on each output enables
direct connection to the ARINC 429 bus.
In addition, the device includes a dual polarity voltage
doubler, allowing it to operate from a single +3.3V supply
using only four external capacitors.
Other features include high-impedance outputs (tri-
state) when both data inputs are taken high, allowing
multiple line drivers to be connected to a common bus.
Bus pins feature built-in 8kV ESD input protection (HBM),
with 6kV capability on all other pins. All logic inputs are
5V or 3.3V compatible.
The HI-8597 line driver is intended for use where logic
signals must be converted to ARINC 429 levels such as
when using an FPGA or the HI-3586 ARINC 429 protocol
IC. The single supply operation and internal lightning
protection circuitry enable huge board space saving,
making HI-8597 the most compact, cost effective ARINC
429 line driver on the market today.
The part is available in Industrial -40 C to +85 C, or
o
o
Extended, -55 C to +125 C temperature ranges. Optional
burn-in is available on the extended temperature range.
o
o
PIN CONFIGURATION (TOP VIEW)
NC 1
GNDA 2
TXAOUT 3
TXBOUT 4
GNDB 5
SLP 6
TX0IN 7
TX1IN 8
16 VDD2-
15 CN+
14 CN-
HI-8597PSIF
HI-8597PSTF
13 GND
12 VDD
11 CP-
10 CP+
9 VDD2+
16-Pin Plastic ESOIC package
(Wide Body)
Table 1. Function Table
TX1IN
0
0
0
1
1
1
TX0IN
0
1
1
0
0
1
SLP
X
0
1
0
1
X
TXAOUT
0V
-5V
-5V
5V
5V
Hi-Z
TXBOUT
0V
5V
5V
-5V
-5V
Hi-Z
SLOPE
N/A
10μs
1.5μs
10μs
1.5μs
N/A
DS8597 Rev. K
HOLT INTEGRATED CIRCUITS
www.holtic.com
1
02/17
HI-8597
BLOCK DIAGRAM
V
DD
C
SUPPLY
SLP
TX0IN
TX1IN
3.3V
VDD2+
ONE
ESD
PROTECTION
& VOLTAGE
TRANSLATION
5V
CURRENT
CONTROL
“A” SIDE
37.5 OHMS
Lightning
Protection
TXAOUT
NULL
ZERO
CONTROL
LOGIC
-5V
GNDA
VDD2+
ONE
NULL
5V
CURRENT
CONTROL
“B” SIDE
37.5 OHMS
GND
V
DD
ZERO
CONTROL
LOGIC
TXBOUT
-5V
Lightning
Protection
GNDB
VDD2+
VDD2+
CP+
C
FLY
CP-
CN+
C
FLY
CN-
Dual Polarity
Voltage Doubler
VDD2-
C
OUT
VDD2-
C
OUT
Figure 1. HI-8597 Block Diagram
HOLT INTEGRATED CIRCUITS
2
HI-8597
PIN DESCRIPTIONS
Table 2. Pin Descriptions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Pin Name
NC
GNDA
TXAOUT
TXBOUT
GNDB
SLP
TX0IN
TX1IN
V
DD2+
CP+
CP-
V
DD
GND
CN-
CN+
V
DD2-
Function
None
POWER
OUTPUT
OUTPUT
POWER
INPUT
INPUT
INPUT
OUTPUT
ANALOG
ANALOG
POWER
POWER
ANALOG
ANALOG
OUTPUT
Description
No connect.
Ground connection of internal lightning protection circuitry for ARINC
high output. MUST be tied to chip ground pin, GND.
ARINC high output with 37.5 Ohms series resistance
ARINC low output with 37.5 Ohms series resistance
Ground connection of internal lightning protection circuitry for ARINC
low output. MUST be tied to chip ground pin, GND.
Output slew rate control. High selects ARINC 429 high-speed. Low
selects ARINC 429 low-speed.
Data input zero
Data input one
Voltage doubler positive output (~6.25V for 3.3V supply)
V
DD2+
flyback capacitor, C
FLY
; positive terminal
V
DD2+
flyback capacitor, C
FLY
; negative terminal
+3.3V power supply
Ground supply
V
DD2-
flyback capacitor, C
FLY
; negative terminal
V
DD2-
flyback capacitor, C
FLY
; positive terminal
Voltage doubler negative output (~ -6.1V for 3.3V supply)
HOLT INTEGRATED CIRCUITS
3
HI-8597
FUNCTIONAL DESCRIPTION
Figure 1 shows a block diagram of the line driver. The
HI-8597 is internally lightning protected in compliance
with RTCA/DO-160G, Section 22 Level 3 Pin Injection
Test Waveform Set A (3 & 4), Set B (3 & 5A) and Set Z
(3 & 5B). The waveforms are shown in Figure 5 through
Figure 7. The device requires only a single +3.3V power
supply. An integrated inverting / non-inverting voltage
doubler generates the rail voltages (±6.6V) which are
then used to produce the ±5V ARINC-429 output levels.
The internal dual polarity charge pump circuit requires
four external capacitors, two for each polarity generated
by the doubler. CP+ and CP- connect the external
charge transfer or “fly” capacitor, C
FLY
, to the positive
portion of the doubler, resulting in twice V
DD
at the V
DD2+
pin. An output “hold” capacitor, C
OUT
, is placed between
V
DD2+
and GND. C
OUT
should be ten times the size of C
FLY
.
The inverting or negative portion of the converter works
in a similar fashion, with C
FLY
and C
OUT
placed between
CN+ / CN- and V
DD2-
/ GND respectively.
Currents for slope control are set by on-chip resistors.
The TX0IN and TX1IN inputs receive logic signals from a
control transmitter chip such as the HI-3584 or HI-3586.
TXAOUT and TXBOUT hold each side of the ARINC bus
at Ground until one of the inputs becomes a One. If for
example TX1IN goes high, a charging path is enabled to
5V on an “A” side internal capacitor while the “B” side is
enabled to -5V. The charging current is selected by the
SLP pin. If the SLP pin is high, the capacitor is nominally
charged from 10% to 90% in 1.5μs. If SLP is low, the
rise and fall times are 10μs.
A unity gain buffer receives the internally generated
slopes and differentially drives the ARINC line. Current is
limited by the series output resistors at each pin. There
are no fuses at the outputs of the HI-8597.
The HI-8597 has 37.5 ohms in series with each TXOUT
output, allowing direct connection to the ARINC 429
bus. The outputs are automatically lightning protected
in compliance with RTCA/DO-160G, Section 22 Level 3
Pin Injection Test Waveform Set A (3 & 4), Set B (3 & 5A)
and Set Z (3 & 5B) without any external components.
Tri-stateable outputs allow multiple line drivers to be
connected to the same ARINC 429 bus. Setting TX1IN
and TX0IN both to a logic “1” puts the outputs in the
high-impedance state.
ABSOLUTE MAXIMUM RATINGS
Supply Voltages
Junction Temperature (T
JMAX
) ............................. 175 C
Solder Temperature (reflow) .............................. 260
C
Storage Temperature ....................... -65 C to +150 C
RTCA/DO-160G, Section 22 pin injection
Waveform
3
4
5A
5B
Voc/Isc
800V/32A
375V/75A
375V/375A
375V/375A
o
o
o
RECOMMENDED OPERATING
CONDITIONS
Supply Voltages
Temperature Range
V
DD
................................... +3.0V to +3.6V
Industrial Screening .............. -40 C to +85 C
Hi-Temp Screening .............. -55 C to +125 C
NOTE: Stresses above absolute maximum ratings or outside recom-
mended operating conditions may cause permanent damage to the
device. These are stress ratings only. Operation at the limits is not
recommended.
o
o
o
o
o
V
DD
.......................................................... +5V
HOLT INTEGRATED CIRCUITS
4
HI-8597
ELECTRICAL CHARACTERISTICS
Table 3. DC Electrical Characteristics
V
DD
= +3.3V, T
A
= Operating Temperature Range (unless otherwise stated)
Parameters
Input Voltage (TX1IN, TX0IN, SLP)
High
Low
Input Current (TX1IN, TX0IN, SLP)
Source
Sink
ARINC Output Voltage (Differential)
one
zero
null
ARINC Output Voltage (Ref. to GND)
one or zero
null
Operating Supply Current
No load
Max. Load
ARINC Outputs Shorted
Power Dissipation in device
2
No load
Max. Load (TXAOUT to TXBOUT)
ARINC Outputs Shorted (TXOUT outputs)
ARINC Output Impedance
TXOUT pins
ARINC Output Tri-State Current
ARINC Output Tri-State Voltage
Symbol
V
IH
V
IL
I
IH
I
IL
V
DIFF1
V
DIFF0
V
DIFFN
V
DOUT
V
NOUT
I
DDNL
I
DDL
I
DDS
P
DDNL
P
DDLT
P
DDST
Z
OUT
Test Conditions
Min
0.7V
DD
-
Typ
-
-
-
45
10
-10
0
5.0
0
28
65
165
93
215
545
37.5
Max
-
0.3V
DD
0.1
Units
V
V
μA
μA
V
IN
= 0V
V
IN
= 3.3V, 7.34kΩ pulldown
no load; TXAOUT - TXBOUT
no load; TXAOUT - TXBOUT
no load; TXAOUT - TXBOUT
no load & magnitude at pin
no load
SLP = V
DD
TX1IN & TX0IN = 0V
100kHz, 400Ω load
See Note 1
SLP = V
DD
TX1IN & TX0IN = 0V
100kHz, 400Ω load
See Note 1
-
-
9
-11
-0.5
4.5
-0.25
-
-
-
-
-
-
35
11
-9
0.5
5.5
0.25
40
-
-
132
-
-
40
200
V
V
V
V
V
mA
mA
mA
mW
mW
mW
Ohms
μA
V
I
OZ
V
OZ
TX0IN = TX1IN = V
DD
, T
A
= 25
o
C
-5.5V < V
OUT
< +5.5V
TX0IN = TX1IN = V
DD
, T
A
= 25
o
C
-150μA < I
OUT
< +150μA
-200
-5.5
-
+5.5
Note 1:
TXAOUT and/or TXBOUT shorted to each other or ground.
Note 2:
Estimate junction temperature using Theta JC or Theta JA values available on Holt’s website, www.holtic.com. T
J
≤ T
JMAX
.
HOLT INTEGRATED CIRCUITS
5
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
