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74AUP2G240DC,125: 产品描述IC BUFFER INVERT 3.6V 8VSSOP; 产品类别逻辑逻辑; 文件大小892KB，共25页; 制造商Nexperia; 官网地址https://www.nexperia.com

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74AUP2G240DC,125概述

IC BUFFER INVERT 3.6V 8VSSOP

74AUP2G240DC,125规格参数

参数名称	属性值
Brand Name	Nexperia
厂商名称	Nexperia
零件包装代码	SSOP
包装说明	VSSOP,
针数	8
制造商包装代码	SOT765-1
Reach Compliance Code	compliant
Samacsys Description	74AUP2G240 - Low-power dual inverting buffer/line driver; 3-state@en-us
系列	AUP/ULP/V
JESD-30 代码	R-PDSO-G8
JESD-609代码	e4
长度	2.3 mm
逻辑集成电路类型	BUS DRIVER
湿度敏感等级	1
位数	1
功能数量	2
端口数量	2
端子数量	8
最高工作温度	125 °C
最低工作温度	-40 °C
输出特性	3-STATE
输出极性	INVERTED
封装主体材料	PLASTIC/EPOXY
封装代码	VSSOP
封装形状	RECTANGULAR
封装形式	SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）	260
传播延迟（tpd）	26.8 ns
认证状态	Not Qualified
座面最大高度	1 mm
最大供电电压 (Vsup)	3.6 V
最小供电电压 (Vsup)	0.8 V
标称供电电压 (Vsup)	1.2 V
表面贴装	YES
技术	CMOS
温度等级	AUTOMOTIVE
端子面层	Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式	GULL WING
端子节距	0.5 mm
端子位置	DUAL
处于峰值回流温度下的最长时间	30
宽度	2 mm

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74AUP2G240

Low-power dual inverting buffer/line driver; 3-state

Rev. 8 — 24 January 2013

Product data sheet

1. General description

The 74AUP2G240 provides the dual inverting buffer/line driver with 3-state output. The

3-state output is controlled by the output enable input (nOE). A HIGH level at pin nOE

causes the output to assume a high-impedance OFF-state.

Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall

times across the entire V

range from 0.8 V to 3.6 V.

This device ensures a very low static and dynamic power consumption across the entire

range from 0.8 V to 3.6 V.

This device is fully specified for partial Power-down applications using I

OFF

The I

OFF

circuitry disables the output, preventing the damaging backflow current through

the device when it is powered down.

This device has the input-disable feature, which allows floating input signals. The inputs

are disabled when the output enable input nOE is HIGH.

2. Features and benefits



Wide supply voltage range from 0.8 V to 3.6 V



High noise immunity



Complies with JEDEC standards:



JESD8-12 (0.8 V to 1.3 V)



JESD8-11 (0.9 V to 1.65 V)



JESD8-7 (1.2 V to 1.95 V)



JESD8-5 (1.8 V to 2.7 V)



JESD8-B (2.7 V to 3.6 V)



ESD protection:



HBM JESD22-A114F Class 3A exceeds 5000 V



MM JESD22-A115-A exceeds 200 V



CDM JESD22-C101E exceeds 1000 V



Low static power consumption; I

= 0.9

A

(maximum)



Latch-up performance exceeds 100 mA per JESD78 Class II



Inputs accept voltages up to 3.6 V



Low-noise overshoot and undershoot < 10 % of V



Input-disable feature allows floating input conditions



OFF

circuitry provides partial Power-down mode operation



Multiple package options



Specified from

40 C

to +85

C

and

40 C

to +125

C

74AUP2G240DC,125相似产品对比

	74AUP2G240DC,125	74AUP2G240GT,115	74AUP2G240GN,115	74AUP2G240GS,115	74AUP2G240GF,115	74AUP2G240GM,125
描述	IC BUFFER INVERT 3.6V 8VSSOP	IC BUFFER INVERT 3.6V 8XSON	IC BUFFER INVERT 3.6V 8XSON	IC BUFFER INVERT 3.6V 8XSON	IC BUFFER INVERT 3.6V 8XSON	IC BUFFER INVERT 3.6V 8XQFN
Brand Name	Nexperia	Nexperia	-	Nexperia	Nexperia	Nexperia
厂商名称	Nexperia	Nexperia	-	Nexperia	Nexperia	Nexperia
零件包装代码	SSOP	SON	-	SON	SON	QFN
包装说明	VSSOP,	VSSOP,	-	1.35 X 1 MM, 0.35 MM HEIGHT, SOT-1203, XSON-8	VSON,	VQCCN,
针数	8	8	-	8	8	8
制造商包装代码	SOT765-1	SOT833-1	-	SOT1203	SOT1089	SOT902-2
Reach Compliance Code	compliant	compliant	-	compliant	compliant	compliant
Samacsys Description	74AUP2G240 - Low-power dual inverting buffer/line driver; 3-state@en-us	74AUP2G240 - Low-power dual inverting buffer/line driver; 3-state@en-us	-	74AUP2G240 - Low-power dual inverting buffer/line driver; 3-state@en-us	74AUP2G240 - Low-power dual inverting buffer/line driver; 3-state@en-us	74AUP2G240 - Low-power dual inverting buffer/line driver; 3-state@en-us
系列	AUP/ULP/V	AUP/ULP/V	-	AUP/ULP/V	AUP/ULP/V	AUP/ULP/V
JESD-30 代码	R-PDSO-G8	R-PDSO-G8	-	R-PDSO-N8	R-PDSO-N8	S-PQCC-N8
JESD-609代码	e4	e3	-	e3	e3	e4
长度	2.3 mm	1.95 mm	-	1.35 mm	1.35 mm	1.6 mm
逻辑集成电路类型	BUS DRIVER	BUS DRIVER	-	BUS DRIVER	BUS DRIVER	BUS DRIVER
湿度敏感等级	1	1	-	1	1	1
位数	1	1	-	1	1	1
功能数量	2	2	-	2	2	2
端口数量	2	2	-	2	2	2
端子数量	8	8	-	8	8	8
最高工作温度	125 °C	125 °C	-	125 °C	125 °C	125 °C
最低工作温度	-40 °C	-40 °C	-	-40 °C	-40 °C	-40 °C
输出特性	3-STATE	3-STATE	-	3-STATE	3-STATE	3-STATE
输出极性	INVERTED	INVERTED	-	INVERTED	INVERTED	INVERTED
封装主体材料	PLASTIC/EPOXY	PLASTIC/EPOXY	-	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
封装代码	VSSOP	VSSOP	-	VSON	VSON	VQCCN
封装形状	RECTANGULAR	RECTANGULAR	-	RECTANGULAR	RECTANGULAR	SQUARE
封装形式	SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH	-	SMALL OUTLINE, VERY THIN PROFILE	SMALL OUTLINE, VERY THIN PROFILE	CHIP CARRIER, VERY THIN PROFILE
峰值回流温度（摄氏度）	260	260	-	NOT SPECIFIED	NOT SPECIFIED	260
传播延迟（tpd）	26.8 ns	26.8 ns	-	26.8 ns	26.8 ns	26.8 ns
座面最大高度	1 mm	0.5 mm	-	0.35 mm	0.5 mm	0.5 mm
最大供电电压 (Vsup)	3.6 V	3.6 V	-	3.6 V	3.6 V	3.6 V
最小供电电压 (Vsup)	0.8 V	0.8 V	-	0.8 V	0.8 V	0.8 V
标称供电电压 (Vsup)	1.2 V	1.2 V	-	1.1 V	1.1 V	1.1 V
表面贴装	YES	YES	-	YES	YES	YES
技术	CMOS	CMOS	-	CMOS	CMOS	CMOS
温度等级	AUTOMOTIVE	AUTOMOTIVE	-	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE
端子面层	Nickel/Palladium/Gold (Ni/Pd/Au)	Tin (Sn)	-	Tin (Sn)	Tin (Sn)	Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式	GULL WING	GULL WING	-	NO LEAD	NO LEAD	NO LEAD
端子节距	0.5 mm	0.5 mm	-	0.35 mm	0.35 mm	0.5 mm
端子位置	DUAL	DUAL	-	DUAL	DUAL	QUAD
处于峰值回流温度下的最长时间	30	30	-	NOT SPECIFIED	NOT SPECIFIED	30
宽度	2 mm	1 mm	-	1 mm	1 mm	1.6 mm

74AUP2G240DC,125

74AUP2G240DC,125概述

74AUP2G240DC,125规格参数

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