74LV03
Quad 2-input NAND gate
Rev. 4 — 31 August 2017
Product data sheet
1
General description
The 74LV03 is a low-voltage Si-gate CMOS device and is pin and function compatible
with 74HC/HCT03.
The 74LV03 provides the 2-input NAND function.
The 74LV03 has open-drain N-transistor outputs, which are not clamped by a diode
connected to V
CC
. In the OFF-state, i.e., when one input is LOW, the output may be
pulled to any voltage between GND and V
O(max)
. This allows the device to be used as
a LOW-to-HIGH or HIGH-to-LOW level shifter. For digital operation and OR-tied output
applications, these devices must have a pull-up resistor to establish a logic HIGH level.
2
Features and benefits
•
•
•
•
•
•
•
Wide operating voltage: 1.0 V to 5.5 V
Optimized for low voltage applications: 1.0 V to 3.6 V
Accepts TTL input levels between V
CC
= 2.7 V and V
CC
= 3.6 V
Typical V
OLP
(output ground bounce) < 0.8 V @ V
CC
= 3.3 V, T
amb
= 25 °C
Typical V
OHV
(output V
OH
undershoot) > 2 V @ V
CC
= 3.3 V, T
amb
= 25 °C
Level shifter capability
ESD protection:
–
HBM JESD22-A114F exceeds 2000 V
–
MM JESD22-A115-A exceeds 200 V
•
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
3
Ordering information
Package
Temperature range
Name
SO14
Table 1. Ordering information
Type number
74LV03D
Description
plastic small outline package; 14 leads;
body width 3.9 mm
Version
SOT108-1
-40 °C to + 125 °C
Nexperia
Quad 2-input NAND gate
74LV03
4
Functional diagram
1
1 1A
2 1B
4 2A
5 2B
9 3A
10 3B
12 4A
13 4B
1Y 3
2Y 6
3Y 8
4Y 11
mna212
2
4
5
9
10
12
13
&
3
&
6
Y
A
&
8
&
11
B
GND
001aab715
aaa-008083
Figure 1. Logic symbol
Figure 2. IEC logic symbol
Figure 3. Logic diagram (one gate)
5
Pinning information
5.1 Pinning
74LV03
1A
1B
1Y
2A
2B
2Y
GND
1
2
3
4
5
6
7
aaa-027324
14 V
CC
13 4B
12 4A
11 4Y
10 3B
9
8
3A
3Y
Figure 4. Pin configuration SO14
5.2 Pin description
Table 2. Pin description
Symbol
1A, 2A, 3A, 4A
1B, 2B, 3B, 4B
1Y, 2Y, 3Y, 4Y
GND
V
CC
Pin
1, 4, 9, 12
2, 5, 10, 13
3, 6, 8, 11
7
14
Description
data input
data input
data output
ground (0 V)
supply voltage
74LV03
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 4 — 31 August 2017
2 / 12
Nexperia
Quad 2-input NAND gate
74LV03
6
Functional description
[1]
Table 3. Function table
Input
nA
L
L
H
H
[1]
H = HIGH voltage level;
L = LOW voltage level;
Z = high-impedance OFF-state.
Output
nB
L
H
L
H
nY
Z
Z
Z
L
7
Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
CC
I
IK
I
OK
I
O
I
CC
I
GND
T
stg
P
tot
[1]
[2]
Conditions
V
I
< -0.5 V or V
I
> V
CC
+ 0.5 V
V
O
< -0.5 V or V
O
> V
CC
+ 0.5 V
V
O
= -0.5 V to (V
CC
+ 0.5 V)
[1]
[1]
Min
-0.5
-
-
-
-
-50
-65
Max
+7.0
±20
±50
±25
50
-
+150
500
Unit
V
mA
mA
mA
mA
mA
°C
mW
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
T
amb
= -40 °C to +125 °C
[2]
-
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
P
tot
derates linearly with 8 mW/K above 70 °C.
74LV03
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 4 — 31 August 2017
3 / 12
Nexperia
Quad 2-input NAND gate
74LV03
8
Recommended operating conditions
Table 5. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
CC
V
I
V
O
T
amb
Δt/ΔV
supply voltage
input voltage
output voltage
ambient temperature
input transition rise and fall rate
Conditions
[1]
Min
1.0
0
0
-40
Typ
3.3
-
-
+25
-
-
-
-
Max
5.5
V
CC
V
CC
+125
500
200
100
50
Unit
V
V
V
°C
ns/V
ns/V
ns/V
ns/V
V
CC
= 1.0 V to 2.0 V
V
CC
= 2.0 V to 2.7 V
V
CC
= 2.7 V to 3.6 V
V
CC
= 3.6 V to 5.5 V
-
-
-
-
[1]
The static characteristics are guaranteed from V
CC
= 1.2 V to V
CC
= 5.5 V, but LV devices are guaranteed to function down to V
CC
= 1.0 V (with input
levels GND or V
CC
).
9
Static characteristics
Table 6. Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
V
IH
HIGH-level
input voltage
Conditions
V
CC
= 1.2 V
V
CC
= 2.0 V
V
CC
= 2.7 V to 3.6 V
V
CC
= 4.5 V to 5.5 V
-40 °C to +85 °C
Min
0.9
1.4
2.0
0.7V
CC
-
-
-
-
-
-
-
-
-
-
-
-
-40 °C to +125 °C Unit
Min
0.9
1.4
2.0
0.7V
CC
-
-
-
-
-
-
-
-
-
-
-
-
Typ
-
-
-
-
-
-
-
-
0
0
0
0
0
[1]
Max
-
-
-
-
0.3
0.6
0.8
0.3V
CC
-
0.2
0.2
0.2
0.2
0.40
0.55
1.0
Max
-
-
-
-
0.3
0.6
0.8
0.3V
CC
-
0.2
0.2
0.2
0.2
0.50
0.65
1.0
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
μA
V
IL
LOW-level
input voltage
V
CC
= 1.2 V
V
CC
= 2.0 V
V
CC
= 2.7 V to 3.6 V
V
CC
= 4.5 V to 5.5 V
V
OL
LOW-level
output voltage
V
I
= V
IH
or V
IL
I
O
= 100 μA; V
CC
= 1.2 V
I
O
= 100 μA; V
CC
= 2.0 V
I
O
= 100 μA; V
CC
= 2.7 V
I
O
= 100 μA; V
CC
= 3.0 V
I
O
= 100 μA; V
CC
= 4.5 V
I
O
= 6 mA; V
CC
= 3.0 V
I
O
= 12 mA; V
CC
= 4.5 V
0.25
0.35
-
I
I
input leakage
current
V
I
= V
CC
or GND; V
CC
= 5.5 V
74LV03
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 4 — 31 August 2017
4 / 12
Nexperia
Quad 2-input NAND gate
Symbol Parameter
I
OZ
OFF-state
output current
74LV03
Conditions
per input pin; V
CC
= 2.0 V to 3.6 V;
V
I
= V
IL
; V
O
= V
CC
or GND;
other inputs at V
CC
or GND
per input pin; V
CC
= 2.0 V to 3.6 V;
V
I
= V
IL
; V
O
= 6.0 V;
other inputs at V
CC
or GND
[2]
-40 °C to +85 °C
Min
-
-40 °C to +125 °C Unit
Min
-
Typ
-
[1]
Max
±5.0
Max
±10
μA
-
-
±10.0
-
±20
μA
I
CC
ΔI
CC
C
I
[1]
[2]
supply current
additional
supply current
input
capacitance
V
I
= V
CC
or GND; I
O
= 0 A;
V
CC
= 5.5 V
per input; V
I
= V
CC
- 0.6 V;
V
CC
= 2.7 V to 3.6 V
-
-
-
-
-
3.5
20.0
500
-
-
-
-
40
850
-
μA
μA
pF
Typical values are measured at T
amb
= 25 °C.
The maximum operating output voltage (V
O(max)
) is 6.0 V.
10 Dynamic characteristics
Table 7. Dynamic characteristics
GND = 0 V; For test circuit see
Figure 6.
Symbol Parameter
t
pd
propagation
delay
Conditions
nA, nB to nY; see
Figure 5
V
CC
= 1.2 V
V
CC
= 2.0 V
V
CC
= 2.7 V
V
CC
= 3.3 V; C
L
= 15 pF
V
CC
= 3.0 V to 3.6 V
V
CC
= 4.5 V to 5.5 V
[3]
[2]
-40 °C to +85 °C
Min
-
-
-
-
-
-
[4]
-40 °C to +125 °C Unit
Min
-
-
-
-
-
-
-
Typ
50
17
13
8
10
-
4
[1]
Max
-
26
19
-
16
13
-
Max
-
31
23
-
19
16
-
ns
ns
ns
ns
ns
ns
pF
C
PD
[1]
[2]
[3]
[4]
power dissipation C
L
= 0 pF; R
L
= ∞ Ω;
capacitance
V
I
= GND to V
CC
-
All typical values are measured at T
amb
= 25 °C.
t
pd
is the same as t
PLZ
and t
PZL
.
Typical values are measured at nominal supply voltage (V
CC
= 3.3 V).
C
PD
is used to determine the dynamic power dissipation (P
D
in μW).
2
2
P
D
= C
PD
× V
CC
× f
i
× N + Σ(C
L
× V
CC
× f
o
) where:
f
i
= input frequency in MHz,
f
o
= output frequency in MHz
C
L
= output load capacitance in pF
V
CC
= supply voltage in V
N = number of inputs switching
2
Σ(C
L
× V
CC
× f
o
) = sum of the outputs.
74LV03
All information provided in this document is subject to legal disclaimers.
© Nexperia B.V. 2017. All rights reserved.
Product data sheet
Rev. 4 — 31 August 2017
5 / 12
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