74HC253-Q100; 74HCT253-Q100
Dual 4-input multiplexer; 3-state
Rev. 2 — 21 January 2015
Product data sheet
1. General description
The 74HC253-Q100; 74HCT253-Q100 are high-speed Si-gate CMOS devices and are pin
compatible with Low-power Schottky TTL (LSTTL).
The 74HC253-Q100; 74HCT253-Q100 provides a dual 4-input multiplexer with 3-state
outputs which selects 2 bits of data from up to four sources selected by common data
select inputs (S0, S1). The two 4-input multiplexer circuits have individual active LOW
output enable inputs (1OE, 2OE).
The 74HC253-Q100 and 74HCT253-Q100 are the logic implementation of a 2-pole,
4-position switch, where the position of the switch is determined by the logic levels applied
to S0 and S1. The outputs are forced to a high-impedance OFF-state when nOE is HIGH.
The logic equations for the outputs are:
1Y
=
1OE
1I0
S1
S0
+
1I1
S1
S0
+
1I2
S1
S0
+
1I3
S1
S0
2Y
=
2OE
2I0
S1
S0
+
2I1
S1
S0
+
2I2
S1
S0
+
2I3
S1
S0
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from
40 C
to +85
C
and from
40 C
to +125
C
Non-inverting data path
3-state outputs interface directly with system bus
Complies with JEDEC standard no. 7A
Common select inputs
Separate output enable inputs
Input levels:
For 74HC253-Q100: CMOS level
For 74HCT253-Q100: TTL level
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0
)
Nexperia
74HC253-Q100; 74HCT253-Q100
Dual 4-input multiplexer; 3-state
3. Applications
Data selectors
Data multiplexers
4. Ordering information
Table 1.
Ordering information
Package
Temperature range
74HC253D-Q100
74HCT253D-Q100
40 C
to +125
C
Name
SO16
Description
plastic small outline package; 16 leads; body width
3.9 mm
Version
SOT109-1
Type number
5. Functional diagram
Fig 1.
Logic symbol
Fig 2.
Functional diagram
74HC_HCT253_Q100
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 2 — 21 January 2015
2 of 15
Nexperia
74HC253-Q100; 74HCT253-Q100
Dual 4-input multiplexer; 3-state
Fig 3.
Logic diagram
6. Pinning information
6.1 Pinning
Fig 4.
Pin configuration SO16
74HC_HCT253_Q100
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 2 — 21 January 2015
3 of 15
Nexperia
74HC253-Q100; 74HCT253-Q100
Dual 4-input multiplexer; 3-state
6.2 Pin description
Table 2.
Symbol
1OE, 2OE
S0, S1
1I0, 1I1, 1I2, 1I3
1Y
GND
2Y
2I0, 2I1, 2I2, 2I3
V
CC
Pin description
Pin
1, 15
14, 2
6, 5, 4, 3
7
8
9
10, 11, 12, 13
16
Description
output enable inputs (active LOW)
data select inputs
data inputs source 1
multiplexer output source 1
ground (0 V)
multiplexer output source 2
data inputs source 2
supply voltage
7. Functional description
Table 3.
S0
X
L
L
H
H
L
L
H
H
[1]
Function table
[1]
data inputs
S1
X
L
L
L
L
H
H
H
H
nI0
X
L
H
X
X
X
X
X
X
nI1
X
X
X
L
H
X
X
X
X
nI2
X
X
X
X
X
L
H
X
X
nI3
X
X
X
X
X
X
X
L
H
output enable
nOE
H
L
L
L
L
L
L
L
L
output
nY
Z
L
H
L
H
L
H
L
H
select Inputs
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
8. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
I
IK
I
OK
I
O
I
CC
I
GND
T
stg
Parameter
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
V
I
<
0.5
V or V
I
> V
CC
+ 0.5 V
V
O
<
0.5
V or V
O
> V
CC
+ 0.5 V
0.5
V < V
O
< V
CC
+ 0.5 V
[1]
[1]
Conditions
Min
0.5
-
-
-
-
70
65
Max
+7.0
20
50
35
70
-
+150
Unit
V
mA
mA
mA
mA
mA
C
74HC_HCT253_Q100
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 2 — 21 January 2015
4 of 15
Nexperia
74HC253-Q100; 74HCT253-Q100
Dual 4-input multiplexer; 3-state
Table 4.
Limiting values
…continued
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
P
tot
Parameter
total power dissipation
Conditions
T
amb
=
40 C
to +125
C
SO16 package
[1]
[2]
[2]
Min
-
Max
500
Unit
mW
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
P
tot
derates linearly with 8 mW/K above 70
C.
9. Recommended operating conditions
Table 5.
Recommended operating conditions
Voltages are referenced to GND (ground = 0 V)
Symbol Parameter
V
CC
V
I
V
O
T
amb
t/V
supply voltage
input voltage
output voltage
ambient temperature
input transition rise and fall rate
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
Conditions
74HC253-Q100
Min
2.0
0
0
40
-
-
-
Typ
5.0
-
-
-
-
1.67
-
Max
6.0
V
CC
V
CC
+125
625
139
83
74HCT253-Q100
Min
4.5
0
0
40
-
-
-
Typ
5.0
-
-
-
-
1.67
-
Max
5.5
V
CC
V
CC
+125
-
139
-
V
V
V
C
ns/V
ns/V
ns/V
Unit
10. Static characteristics
Table 6.
Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
74HC253-Q100
V
IH
HIGH-level
input voltage
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
V
IL
LOW-level
input voltage
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
V
OH
HIGH-level
output voltage
V
I
= V
IH
or V
IL
I
O
=
20 A;
V
CC
= 2.0 V
I
O
=
20 A;
V
CC
= 4.5 V
I
O
=
20 A;
V
CC
= 6.0 V
I
O
=
6.0
mA; V
CC
= 4.5 V
I
O
=
7.8
mA; V
CC
= 6.0 V
1.9
4.4
5.9
3.98
5.48
2.0
4.5
6.0
4.32
5.81
-
-
-
-
-
1.9
4.4
5.9
3.84
5.34
-
-
-
-
-
1.9
4.4
5.9
3.7
5.2
-
-
-
-
-
V
V
V
V
V
1.5
3.15
4.2
-
-
-
1.2
2.4
3.2
0.8
2.1
2.8
-
-
-
0.5
1.35
1.8
1.5
3.15
4.2
-
-
-
-
-
-
0.5
1.35
1.8
1.5
3.15
4.2
-
-
-
-
-
-
0.5
1.35
1.8
V
V
V
V
V
V
Conditions
Min
25
C
Typ
Max
40 C
to +85
C 40 C
to +125
C
Unit
Min
Max
Min
Max
74HC_HCT253_Q100
All information provided in this document is subject to legal disclaimers.
©
Nexperia B.V. 2017. All rights reserved
Product data sheet
Rev. 2 — 21 January 2015
5 of 15
FPGA/CPLD
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