TDF8599A
I
2
C-bus controlled dual channel 135 W/4
Ω,
single channel
250 W/2
Ω
class-D power amplifier with load diagnostics
Rev. 02 — 30 June 2009
Product data sheet
1. General description
The TDF8599A is a dual Bridge-Tied Load (BTL) car audio amplifier comprising an
NDMOST-NDMOST output stage based on SOI BCDMOS technology. Low power
dissipation enables the TDF8599A high-efficiency, class-D amplifier to be used with a
smaller heat sink than those normally used with standard class-AB amplifiers.
The TDF8599A can operate in either non-I
2
C-bus mode or I
2
C-bus mode. When in
I
2
C-bus mode, DC load detection results and fault conditions can be easily read back from
the device. Up to 15 I
2
C-bus addresses can be selected depending on the value of the
external resistor connected to pins ADS and MOD.
When pin ADS is short circuited to ground, the TDF8599A operates in non-I
2
C-bus mode.
Switching between Operating mode and Mute mode in non-I
2
C-bus mode is only possible
using pins EN and SEL_MUTE.
2. Features
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
High-efficiency
Low quiescent current
Operating voltage from 8 V to 35 V
Two 4
Ω/2 Ω
capable BTL channels or one 1
Ω
capable BTL channel
Differential inputs
I
2
C-bus mode with 15 I
2
C-bus addresses or non-I
2
C-bus mode operation
Clip detect
Independent short circuit protection for each channel
Advanced short circuit protection for load, GND and supply
Load dump protection
Thermal foldback and thermal protection
DC offset protection
Selectable AD or BD modulation
Parallel channel mode for high current drive capability
Advanced clocking:
N
Switchable oscillator clock source: internal for Master mode or external for Slave
mode
N
Spread spectrum mode
N
Phase staggering
N
Frequency hopping
I
No ‘pop noise’ caused by DC output offset voltage
NXP Semiconductors
TDF8599A
I
2
C-bus controlled dual channel class-D power amplifier
I
I
2
C-bus mode:
N
DC load detection
N
AC load detection
N
Thermal pre-warning diagnostic level setting
N
Identification of activated protections or warnings
N
Selectable diagnostic information available using pins DIAG and CLIP
I
Qualified in accordance with AEC-Q100
3. Applications
I
Car audio
4. Quick reference data
Table 1.
Quick reference data
V
P
= 14.4 V unless otherwise stated.
Symbol
V
P
I
P
I
q(tot)
P
o
Parameter
supply voltage
supply current
total quiescent current
output power
off state; T
j
≤
85
°C;
V
P
= 14.4 V
Operating mode; no load, snubbers and
filter connected
Stereo mode:
V
P
= 14.4 V; THD = 1 %; R
L
= 4
Ω
V
P
= 14.4 V; THD = 10 %; R
L
= 4
Ω
square wave (EIAJ); R
L
= 4
Ω
V
P
= 35 V; THD = 10 %; R
L
= 4
Ω
V
P
= 14.4 V; THD = 1 %; R
L
= 2
Ω
V
P
= 14.4 V; THD = 10 %; R
L
= 2
Ω
square wave (EIAJ); R
L
= 2
Ω
Parallel mode:
V
P
= 14.4 V; THD = 10 %; R
L
= 2
Ω
V
P
= 35 V; THD = 10 %; R
L
= 2
Ω
V
P
= 25 V; THD = 1 %; R
L
= 1
Ω
[1]
[2]
In this data sheet supply voltage V
P
describes V
P1
, V
P2
and V
PA
.
Output power is measured indirectly based on R
DSon
measurement.
[2]
[2]
Conditions
[1]
Min
8
-
-
Typ
14.4
2
90
Max
35
10
120
Unit
V
µA
mA
18
23
-
-
26
34
-
-
-
135
20
25
40
135
29
38
60
50
250
150
-
-
-
-
-
-
-
-
-
-
W
W
W
W
W
W
W
W
W
W
5. Ordering information
Table 2.
Ordering information
Package
Name
TDF8599ATH
HSOP36
Description
plastic, heatsink small outline package; 36 leads; low stand-off height
Version
SOT851-2
Type number
TDF8599A_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 30 June 2009
2 of 54
NXP Semiconductors
TDF8599A
I
2
C-bus controlled dual channel class-D power amplifier
6. Block diagram
V
DDA
10
9
8
DRIVER
HIGH
PWM
CONTROL
IN1P
1
DRIVER
LOW
PGND1
V
P1
IN1N
2
PWM
CONTROL
DRIVER
LOW
ACGND
5
+
V
P1
31
V
P2
24
AGND
SVRR
STABI1
34
32
V
P1
VSTAB1
BOOT1N
TDF8599A
33
OUT1N
29
BOOT1P
DRIVER
HIGH
28
OUT1P
PGND1
V
P2
DRIVER
HIGH
PWM
CONTROL
23
BOOT2N
22
DRIVER
LOW
PGND2
V
P2
26
OUT2N
IN2P
3
BOOT2P
IN2N
4
PWM
CONTROL
DRIVER
HIGH
27
DRIVER
LOW
OUT2P
OSCSET
OSCIO
SSM
MOD
V
DDD
EN
SEL_MUTE
SCL
SDA
ADS
18
19
17
12
35
6
7
16
15
11
36
GNDD/HW
14
DIAG
13
20
30
PGND1
MODE
SELECT
+
I
2
C-BUS
DIAGNOSTICS
OSCILLATOR
PGND2
5 V STABI
STABI2
21
VSTAB2
PROTECTION
OVP, OCP, OTP
UVP, TFP, WP, DCP
25
PGND2
001aak071
CLIP DCP
Fig 1.
Block diagram
TDF8599A_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 30 June 2009
3 of 54
NXP Semiconductors
TDF8599A
I
2
C-bus controlled dual channel class-D power amplifier
7. Pinning information
7.1 Pinning
GNDD/HW 36
V
DDD
35
VSTAB1 34
OUT1N 33
BOOT1N 32
V
P1
31
PGND1 30
BOOT1P 29
OUT1P 28
OUT2P 27
BOOT2P 26
PGND2 25
V
P2
24
BOOT2N 23
OUT2N 22
VSTAB2 21
DCP 20
OSCIO 19
001aak072
1
2
3
4
5
6
7
8
IN1P
IN1N
IN2P
IN2N
ACGND
EN
SEL_MUTE
SVRR
AGND
TDF8599ATH
9
10 V
DDA
11 ADS
12 MOD
13 CLIP
14 DIAG
15 SDA
16 SCL
17 SSM
18 OSCSET
Fig 2.
Heatsink up (top view) pin configuration TDF8599ATH
7.2 Pin description
Table 3.
Symbol
IN1P
IN1N
IN2P
IN2N
ACGND
EN
Pin description
Pin
1
2
3
4
5
6
Type
[1]
I
I
I
I
I
I
Description
channel 1 positive audio input
channel 1 negative audio input
channel 2 positive audio input
channel 2 negative audio input
decoupling for input reference voltage
enable input:
non-I
2
C-bus mode: switch between off and Mute mode
I
2
C-bus mode: off and Standby mode
SEL_MUTE
SVRR
AGND
V
DDA
ADS
MOD
TDF8599A_2
7
8
9
10
11
12
I
I
G
P
I
I
select mute or unmute
decoupling for internal half supply reference voltage
analog supply ground
analog supply voltage
non-I
2
C-bus mode: connected to ground
I
2
C-bus mode: selection and address selection pin
modulation mode, phase shift and parallel mode select
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 30 June 2009
4 of 54
NXP Semiconductors
TDF8599A
I
2
C-bus controlled dual channel class-D power amplifier
Pin description
…continued
Pin
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
G
O
G
P
O
O
P
G
O
I/O
I
Type
[1]
O
O
I/O
I
Description
clip output; open-drain
diagnostic output; open-drain
I
2
C-bus data input and output
I
2
C-bus clock input
master setting: Spread spectrum mode frequency
slave setting: phase lock operation
master/slave oscillator setting
master only setting: set internal oscillator frequency
external oscillator slave setting: input
internal oscillator master setting: output
DC protection input for the filtered output voltages
decoupling internal stabilizer 2 for DMOST drivers
channel 2 negative PWM output
boot 2 negative bootstrap capacitor
channel 2 power supply voltage
channel 2 power ground
boot 2 positive bootstrap capacitor
channel 2 positive PWM output
channel 1 positive PWM output
boot 1 positive bootstrap capacitor
channel 1 power ground
channel 1 power supply voltage
boot 1 negative bootstrap capacitor
channel 1 negative PWM output
decoupling internal stabilizer 1 for DMOST drivers
decoupling of the internal 5 V logic supply
ground digital supply voltage
handle wafer connection
Table 3.
Symbol
CLIP
DIAG
SDA
SCL
SSM
OSCSET
OSCIO
DCP
VSTAB2
OUT2N
BOOT2N
V
P2[2]
PGND2
BOOT2P
OUT2P
OUT1P
BOOT1P
PGND1
V
P1[2]
BOOT1N
OUT1N
VSTAB1
V
DDD
GNDD/HW
[1]
[2]
I = input, O = output, I/O = input/output, G = ground and P = power supply.
In this data sheet supply voltage V
P
describes V
P1
, V
P2
and V
PA
.
8. Functional description
8.1 General
The TDF8599A is a dual full bridge (BTL) audio power amplifier using class-D technology.
The audio input signal is converted into a Pulse-Width Modulated (PWM) signal using the
analog input and PWM control stages. A PWM signal is applied to driver circuits for both
high-side and low-side enabling the DMOS power output transistors to be driven. An
external 2
nd
order low-pass filter converts the PWM signal into an analog audio signal
across the loudspeakers.
TDF8599A_2
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02 — 30 June 2009
5 of 54
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