PHYSICAL LAYER PRODUCT
DATACOM PRODUCT
VSC7216-02
VSC7216-02 Low Power Quad 1.25Gb/s Backplane Transceiver
S P E C I F I C AT I O N S :
!REFCLK:
24.5 - 136MHz
!Tx/Rx
REFCLK Offset: 200 ppm
!Serial
Input Differential Terminations Adjustable Between 100Ω
and 150Ω
!Fast
Lock CRU: <128 DataTransitions
!Up
to 90 Bit Periods of Inter-channel Deskew
!Tolerates
+/- 5 Bit Times of Clock Drift Betweens Resynchronizations
F E AT U R E S :
!Compatible
to Industry Standard VSC7216-01
!Redundant
Transmit and Receive Serial I/O’s
!LVTTL
Parallel Data I/O
!Maximum
Case Temperature: 110˚C
!Rate
Matching Between Upstream/Downstream
VSC7216-02’s
!Selectable
High Speed Input Termination
A P P L I C AT I O N S :
!Multi-channel
and Multi-chip Aggregation Capability
!Backplane
Interconnect for Data Communications
!Serial
Output Swing Reduction Control
!Serial
Bus Extension
!Transmitter
Pre-Distortion and Receiver Equalization
!Gigabit
Ethernet Transceiver
!Multiple
Clocking Options
!Fibre
Channel Transceiver
!Internal
Serial and Parallel Loopback Modes
!Serial
Link Redundancy
!JTAG
and BIST Enabled
!Optional
8B/10B Encoder/Decoder
!Fast
Lock for use in Asynchronous Switching Applications
!Adjustable
Latency and Deskewing for Varied System
Environments
!Analog
Signal Detect for each PECL Input
VSC7216-02
S E R I A L D ATA T R A N S F E R R AT E S F O R E A C H C H A N N E L :
Full Rate Mode
0.98 - 1.36Gb/s
Half Rate Mode
0.49 - 0.68Gb/s
!Offered
Extended Temperature Range as VSC7216-06
!2.5V
Supply, Internal 1.8V Regulator
!700
mW Power Dissipation
!21
x 21mm, or 27 x 27mm 256-pin Thermally Enhanced Ball Grid Array
(TBGA)
PB-VSC7216-001
VSC7216-02
VSC7216-02 Low Power Quad 1.25Gb/s Backplane Transceiver
GENERAL DESCRIPTION:
The VSC7216-02 is a quad channel
parallel-to-serial and serial-to-parallel
transceiver chip designed for use in high
bandwidth data transmission between
busses, backplanes and other subsystems.
Each channel’s transmitter section contains parallel 8-bit or
10-bit input circuitry, an 8B/10B encoder, serializer and a pair
of serial PECL output drivers and additional control inputs.
Each channel’s receiver section contains a pair of PECL
inputs, clock and data recovery circuitry, a deserializer, an
8B/10B decoder, elastic buffers, 8-bit or 10-bit output drivers
and additional control outputs. Each transmitter may be
supplied 8-bit data which will be encoded into 10-bit
characters for transmission, or may be supplied pre-
encoded 10-bit data in which case the internal encoder is
bypassed. The four channels may operate independently
or in a synchronized mode transferring data that is word-
aligned across 16 or 32 data inputs.
V S C 7 2 1 6 - 0 2 B L O C K D I A G R A M : (Single Channel Shown)
PTXEN
T(7:0)
C/D
WSEN
TBC
KCHAR
PLL
Clock
Gen
8
R(7:0)
IDLE
KCH
ERR
Elastic
Buffer
RXCLK
8B/10B
Decode
10
Clock/
Data
Recover
TXCLK
8
D
Q
8B/10B
Encode
10
PTX+
PTX-
RTX+
RTX-
RTXEN
Backplane
V S C 7 2 1 6 - 0 2 T W O A P P L I C AT I O N S :
Multi-Gigabit
Interconnect
Multi-Gigabit
Interconnect
Between Backplanes...
VSC7216-02
VSC7216-02
Backplane
Backplane
Across a Backplane...
Multi-Gigabit
Interconnect
Multi-Gigabit
Interconnect
VSC7216-02
VSC7216-02
VSC7216-02 CONNECTION TO VITESSE'S
CROSSPOINT PRODUCTS:
VSC7216-02
VSC7216-02
VSC7216-02
VSC837
CROSSPOINT
SWITCH
VSC7216-02
VSC7216-02
VSC7216-02
PSDET
PRX+
PRX-
RRX+
RRX-
RSDET
RRXSEL
Your Partner for Success.
For more information on Vitesse Products visit the Vitesse web site
at www.vitesse.com or contact Vitesse Sales at (800) VITESSE
or sales@vitesse.com
741 Calle Plano
Camarillo, CA 93012
Tel: 805.388.3700
Fax: 805.987.5896
www.vitesse.com
©2002 Vitesse Semiconductor Corporation