• Multi I/O Support - Single I/O, Dual I/O and Quad I/O
• Support DTR (Double Transfer Rate) Mode
• 8/16/32/64 byte Wrap-Around Read Mode
MX25U51245G
Contents
1. FEATURES .............................................................................................................................................................. 5
2. GENERAL DESCRIPTION ..................................................................................................................................... 7
6. DATA PROTECTION.............................................................................................................................................. 11
8. COMMAND SET .................................................................................................................................................... 20
Status Register ........................................................................................................................................ 25
4 x I/O Read Mode (4READ) ................................................................................................................... 50
4 x I/O Double Transfer Rate Read Mode (4DTRD) ................................................................................ 52
Preamble Bit ........................................................................................................................................... 54
4 Byte Address Command Set ................................................................................................................. 58
Fast Boot ................................................................................................................................................. 69
13. POWER-ON STATE ........................................................................................................................................... 111
16. ERASE AND PROGRAMMING PERFORMANCE ............................................................................................ 120
17. DATA RETENTION ............................................................................................................................................ 120
19. ORDERING INFORMATION .............................................................................................................................. 121
20. PART NAME DESCRIPTION ............................................................................................................................. 122
21. PACKAGE INFORMATION ................................................................................................................................ 123
22. REVISION HISTORY ......................................................................................................................................... 126
P/N: PM2244
4
Rev. 1.1, June 29, 2017
MX25U51245G
1.8V 512M-BIT [x 1/x 2/x 4] CMOS MXSMIO
(SERIAL MULTI I/O)
FLASH MEMORY
1. FEATURES
GENERAL
• Supports Serial Peripheral Interface -- Mode 0 and Mode 3
• Single Power Supply Operation
- 1.65 to 2.0 volt for read, erase, and program operations
•
512Mb: 536,870,912 x 1 bit structure or 268,435,456 x 2 bits (two I/O mode) structure or 134,217,728 x 4 bits (four
I/O mode) structure
• Protocol Support
- Single I/O, Dual I/O and Quad I/O
• Latch-up protected to 100mA from -1V to Vcc +1V
• Fast read for SPI mode
- Support fast clock frequency up to 166MHz
- Support Fast Read, 2READ, DREAD, 4READ, QREAD instructions
- Support DTR (Double Transfer Rate) Mode
- Configurable dummy cycle number for fast read operation
• Quad Peripheral Interface (QPI) available
• Equal Sectors with 4K byte each, or Equal Blocks with 32K byte each or Equal Blocks with 64K byte each
- Any Block can be erased individually
• Programming :
- 256byte page buffer
- Quad Input/Output page program(4PP) to enhance program performance
• Typical 100,000 erase/program cycles
• 20 years data retention
SOFTWARE FEATURES
• Input Data Format
- 1-byte Command code
• Advanced Security Features
- Block lock protection
The BP0-BP3 and T/B status bits define the size of the area to be protected against program and erase
instructions
- Advanced sector protection function
• Additional 8K bit security OTP
-
Features unique identifier
-
Factory locked identifiable, and customer lockable
•
Command Reset
•
Program/Erase Suspend and Resume operation
•
Electronic Identification
-
JEDEC 1-byte manufacturer ID and 2-byte device ID
- RES command for 1-byte Device ID
- REMS command for 1-byte manufacturer ID and 1-byte device ID
•
Support Serial Flash Discoverable Parameters (SFDP) mode
2008年8月26-29日,华南地区的五大品牌工业展会——NEPCON / EMT 华南展(第十四届华南国际电子生产设备暨微电子工业展/华南国际电子制造技术展览会)、华南国际汽车电子展(AE South China)、华南国际工业组装技术与装备展览会(ATE South China)和华南国际平面显示器制造技术展(Finetech South China)将在深圳会展中心隆重举行。从组委会获...[详细]