240Pin DDR3L 1600 RDIMM
4GB Based on 512Mx8
AQD-D3L4GR16-SG
Description
AQD-D3L4GR16-SG is a DDR3 Registered DIMM,
high-speed, low power memory module that use 9 pcs of
512Mx8bits DDR3L low voltage SDRAM in FBGA
package, 1 pcs register in TFBGA package and a 2048
bits serial EEPROM on a 240-pin printed circuit board.
AQD-D3L4GR16-SG is a Dual In-Line Memory Module
and is intended for mounting into 240-pin edge connector
sockets.
Synchronous design allows precise cycle control with the
use of system clock. Data I/O transactions are possible
on both edges of DQS. Range of operation frequencies,
programmable latencies allow the same device to be
useful for a variety of high bandwidth, high performance
memory system applications.
/S0, /S1
CKE0, CKE1
ODT0, ODT1
DQ0~DQ63
CB0~CB7
DQS0~DQS8
Data Strobe
/DQS0~/DQS8
DM0~DM8
CK0, /CK0
/RESET
/EVENT
/ERROUT
control bus
Parity bit for address and Control
Par-In
bus
VDD
VSS
Core and I/O Power
Ground
Data Masks
Clocks Input
Reset Pin
Temperature Event Pin
Parity error found on address and
Chip Selects
Clock Enables
On-die termination control
Data Input/Output
ECC Check bits
Pin Identification
Pin Identification
Symbol
A0~A15, BA0~BA2
/RAS
/CAS
/WE
Function
Address Inputs
Row Address Strobe
Column Address Strobe
Write Enable
Features
RoHS compliant products.
JEDEC standard 1.35V(1.28V~1.45V) Power supply
JEDEC standard 1.5V(1.425V~1.575V) Power supply
VDDQ=1.35V(1.28V~1.45V) & 1.5V(1.425V~1.575V)
Clock Freq: 667MHZ for 1333Mb/s/Pin.
Clock Freq: 800MHZ for 1600Mb/s/Pin.
Programmable CAS Latency: 6, 7, 8, 9, 10, 11
Programmable Additive Latency (Posted /CAS):
0,CL-2 or CL-1 clock
Programmable /CAS Write Latency (CWL)
= 8(DDR3-1600)
8 bit pre-fetch
Burst Length: 4, 8
Bi-directional Differential Data-Strobe
Internal calibration through ZQ pin
On Die Termination with ODT pin
VREFDQ, VREFCA Input/Output Reference
VTT
VDDSPD
SCL
SDA
SA0~SA2
2
Termination Voltage
SPD Power
SPD Clock Input
SPD Data
SPD Address
On DIMM thermal Sensor
模拟与混合信号
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