100390 Low Power Single Supply Hex PECL-to-TTL Translator
September 1990
Revised August 2000
100390
Low Power Single Supply Hex PECL-to-TTL Translator
General Description
The 100390 is a hex translator for converting F100K logic
levels to TTL logic levels. Unlike other level translators, the
100390 operates using only one
+
5V supply. Differential
inputs allow each circuit to be used as an inverting, nonin-
verting, or differential receiver. An internal reference gener-
ator provides V
BB
for single-ended operation. The standard
FAST
3-STATE outputs are enabled by a common active
low TTL compatible OE input. Partitioned V
CC
s on chip are
brought out on separate power pins, allowing the noisy TTL
V
CC
power plane to be isolated from the relatively quiet
ECL V
CC
. The 100390 is ideal for applications limited to a
single
+
5V supply, allowing for easy ECL to TTL Interfac-
ing.
Features
s
Operates from a single
+
5V supply
s
3-STATE outputs
s
2000V ESD protection
s
V
BB
supplied for single-ended operation
Ordering Code:
Order Number
100390SC
100390PC
100390QC
100390QI
Package Number
M24B
N24E
V28A
V28A
Package Description
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
Industrial Temperature Range (
−
40
°
C to
+
85
°
C)
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagrams
24-Pin DIP/SOIC
28-Pin PLCC
FAST is a registered trademark of Fairchild Semiconductor.
© 2000 Fairchild Semiconductor Corporation
DS010897
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100390
Logic Symbol
Pin Descriptions
Pin Names
D
0
–D
5
D
0
–D
5
Q
0
–Q
5
OE
V
BB
Description
Data Inputs (PECL)
Inverting Data Inputs (PECL)
Data Outputs (TTL)
Output Enable (TTL)
Reference Voltage (PECL)
Truth Table
Data
Inputs
(PECL)
D
n
X
L
H
L
H
OPEN
L
H
V
BB
V
BB
V
BB
OPEN
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
Z
=
HIGH Impedance
U
=
Undefined
Control
Input
(TTL)
OE
H
L
L
L
L
L
L
L
L
L
L
L
TTL
Outputs
Comments
Q
n
Z
L
H
U
U
U
L
H
H
L
H
L
Outputs Disable
Differential Operation
Differential Operation
Invalid Input States
Invalid Input States
Invalid Input States
Single Ended Operation
Single Ended Operation
Single Ended Operation
Single Ended Operation
Single Ended Operation
Single Ended Operation
D
n
X
H
L
L
H
OPEN
V
BB
V
BB
L
H
OPEN
V
BB
Logic Diagram
Detail
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2
100390
Absolute Maximum Ratings
(Note 1)
Storage Temperature
Maximum Junction Temperature
V
CC
Pin Potential to Ground Pin
TTL Input Voltage (Note 2)
TTL Input Current (Note 2)
V
BB
Output Current
ECL Input Potential
V
CC
Differential
ECL V
CC
to TTL V
CC
Voltage Applied to Output
in High State (with V
CC
=
0V)
3-STATE Output
Current Applied to Output
in Low State (Max)
ESD Last Passing Voltage (Min)
Twice the Rated I
OL
(mA)
2000V
−
65
°
C to
+
150
°
C
+
150
°
C
−
0.5V to
+
7.0V
−
0.5V to
+
7.0V
−
30 mA to
+
5.0 mA
−
5.0 mA to
+
1.0 mA
GND to ECL V
CC
+
0.5V
Recommended Operating
Conditions
Case Temperature
Supply Voltage
0
°
C to
+
85
°
C
+
4.75V to
+
5.25V
−
1.0V to
+
1.0V
−
0.5V to
+
5.5V
Note 1:
The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 2:
Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
ECL V
CC
= +
5.0V
±
5%, TTL V
CC
= +5.0V ±5%,
GND
=
0V
Symbol
V
IH
Parameter
Input HIGH Voltage
Data
OE
V
IL
Input LOW Voltage
Data
OE
V
BB
V
OH
V
OL
I
IH
Output Reference Voltage
Output HIGH Voltage (TTL)
Output LOW Voltage (TTL)
Input HIGH Current
Data
OE
I
IL
I
BVI
I
CBO
I
OZH
I
OZL
I
CC
I
CCZ
I
CCL
I
CCH
I
OS
V
Diff
V
CM
V
CD
Input LOW Current
Input Breakdown Current
Input Leakage Current
3-STATE Current Output HIGH
3-STATE Current Output LOW
ECL Supply Current
TTL Supply Current
TTL Supply Current
TTL Supply Current HIGH
Output Short-Circuit Current
Differential Input Voltage
Common Mode Voltage
Clamp Diode Voltage
13
10
8
0.4
−150
150
ECL V
CC
−
2.0
ECL V
CC
−
0.5
−1.2
OE
OE
−10
50
−50
30
20
17
2.0
−60
ECL V
CC
−
1.38
2.7
0.5
50
20
−200
10
Min
Max
Units
V
V
V
V
V
V
V
µA
µA
µA
µA
µA
µA
µA
mA
mA
mA
mA
mA
mV
V
V
I
IN
= −18
mA
3-STATE
Low State
HIGH State
V
OUT
=
0.0V, V
CC
= +5.25
Required for Full Output Swing
Conditions
Guaranteed HIGH Signal for ALL
Inputs (with One Input Tied to V
BB
)
Guaranteed HIGH Signal (TTL)
Guaranteed LOW Signal for ALL
Inputs (with One Input Tied to V
BB
)
Guaranteed LOW Signal (TTL)
I
BB
=
0.0 mA or
−1.0
mA
I
OH
= −3
mA
I
OL
=
24 mA
V
IN
=
V
IH
(Max), D
0
–D
5
=
V
BB
,
D
0
–D
5
=
V
IL
(Min)
V
IN
=
2.7V (TTL)
V
IN
=
0.5V (TTL)
V
IN
=
7.0V (TTL)
V
IN
=
GND, D
0
–D
5
=
V
BB
D
0
–D
5
=
V
IL
(Min)
V
OUT
= +2.7V
V
OUT
= +0.5V
ECL V
CC
−
1.165 ECL V
CC
−
0.870
2.0
ECL V
CC
−
1.830 ECL V
CC
−
1.475
0.8
ECL V
CC
−
1.26
3
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100390
DIP AC Electrical Characteristics
V
CC
=
5.0V
±
5%; T
C
=
0°C to
+85°C
Symbol
f
MAX
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Output Disable Time
Parameter
Min
Maximum Clock Frequency
Propagation Delay
Data to Output
Output Enable Time
100
3.5
2.7
2.4
2.9
2.3
7.2
4.8
4.0
5.8
3.9
T
C
=
0°C
Max
T
C
= +25°C
Min
100
3.5
2.7
2.4
2.9
2.2
6.8
4.8
4.0
5.4
3.9
Max
T
C
= +85°C
Min
100
3.5
3.0
2.6
2.7
2.2
6.7
5.1
4.2
5.1
3.9
Max
MHz
ns
ns
ns
Figure 1
Figure 2
Figure 2
Units
Figure
Number
SOIC and PLCC Package AC Electrical Characteristics
V
CC
=
5.0V
±
5%; T
C
=
0°C to
+85°C
Symbol
f
MAX
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Output Disable Time
Parameter
Maximum Clock Frequency
Propagation Delay
Data to Output
Output Enable Time
T
C
=
0°C
Min
100
3.5
2.7
2.4
2.9
2.3
7.0
4.6
3.8
5.6
3.7
Max
T
C
= +25°C
Min
100
3.5
2.7
2.4
2.9
2.2
6.6
4.6
3.8
5.2
3.7
Max
T
C
= +85°C
Min
100
3.5
3.0
2.6
2.7
2.2
6.5
4.9
4.0
4.9
3.7
Max
Units
MHz
ns
ns
ns
Figure 1
Figure 2
Figure 2
Figure
Number
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4
100390
Switching Waveforms
FIGURE 1. Data to Output Propagation Delay
FIGURE 2. Enable/Disable Propagation Delay
Test Circuit
Notes:
GND
=
0V, ECL V
CC
= +5V,
TTL V
CC
= +5V
L1 and L2
=
equal length 50Ω impedance lines
50Ω terminators are internal to S/H measurement unit
Decoupling 0.1
µF
from GND to ECL V
CC
and TTL V
CC
All unused outputs are loaded with 500Ω to GND
C
L
=
Fixture and stray capacitance
=
50 pF
Switch S1 is open for t
PLH
, t
PHL
, t
PHZ
and t
PZH
tests
Switch S1 is closed only for t
PLZ
and t
PZL
tests
FIGURE 3. AC Test Circuit
5
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