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XC6117F543

产品描述CMOS Voltage Detector
文件大小525KB,共26页
制造商TOREX(特瑞仕)
官网地址http://www.torex.co.jp/chinese/
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XC6117F543概述

CMOS Voltage Detector

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Preliminary
◆CMOS
Voltage Detector
◆Manual
Reset Input
◆Watchdog
Functions
◆Built-in
Delay Circuit
◆Detect
Voltage Range: 1.6~5.0V, ± 2%
◆Reset
Function is Selectable
V
DFL
(Low When Detected)
V
DFH
(High When Detected)
■APPLICATIONS
●Microprocessor
reset circuits
●Memory
battery backup circuits
●System
power-on reset circuits
●Power
failure detection
■GENERAL
DESCRIPTION
■FEATURES
Detect Voltage Range
Hysteresis Range
: 1.6V ~ 5.0V, +2%
(100mV increments)
: V
DF
x 5%, TYP.
(XC6101~XC6107)
V
DF
x 0.1%, TYP.
(XC6111~XC6117)
: 1.0V ~ 6.0V
The XC6101~XC6107, XC6111~XC6117 series are
groups of high-precision, low current consumption voltage
detectors with manual reset input function and watchdog
functions incorporating CMOS process technology. The
series consist of a reference voltage source, delay circuit,
comparator, and output driver.
With the built-in delay circuit, the XC6101 ~ XC6107,
XC6111 ~ XC6117 series’ ICs do not require any external
components to output signals with release delay time.
Moreover, with the manual reset function, reset can be
asserted at any time. The ICs produce two types of
output; V
DFL
(low when detected) and V
DFH
(high when
detected).
With the XC6101 ~ XC6105, XC6111 ~ XC6115 series’
ICs, the WD pin can be left open if the watchdog function
is not used.
Whenever the watchdog pin is opened, the internal
counter clears before the watchdog timeout occurs.
Since the manual reset pin is internally pulled up to the V
IN
pin voltage level, the ICs can be used with the manual
reset pin left unconnected if the pin is unused.
The detect voltages are internally fixed 1.6V ~ 5.0V in
increments of 100mV, using laser trimming technology.
Six watchdog timeout period settings are available in a
range from 6.25msec to 1.6sec.
Seven release delay time 1 are available in a range from
3.13msec to 1.6sec.
Operating Voltage Range
Detect Voltage Temperature
Characteristics
: +100ppm/
O
C (TYP.)
Output Configuration
: N-channel open drain,
CMOS
Watchdog Pin
: Watchdog input
If watchdog input maintains
‘H’ or ‘L’ within the watchdog
timeout period, a reset signal
is output to the RESET
output pin
Manual Reset Pin
: When driven ‘H’ to ‘L’ level
signal, the MRB pin voltage
asserts forced reset on the
output pin.
Release Delay Time
: 1.6sec, 400msec, 200msec,
100msec, 50msec, 25msec,
3.13msec (TYP.) can be
selectable.
Watchdog Timeout Period
: 1.6sec, 400msec, 200msec,
100msec, 50msec,
6.25msec (TYP.) can be
selectable.
■TYPICAL
APPLICATION CIRCUIT
■TYPICAL
PERFORMANCE
CHARACTERISTICS
●Supply
Current vs. Input Voltage
XC61X1~XC61X5 (2.7V)
30
Supply Current:
 
ISS (µA)
25
20
15
10
5
0
0
1
2
3
4
5
Input Voltage:
 
VIN (V)
6
Ta=-40
Ta=25
Ta=85
* Not necessary with CMOS output products.
* ‘x’ represents both ‘0’ and ‘1’. (ex. XC61x1⇒XC6101 and XC6111)
XC6101_07_XC6111_17 ETR0207_009
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