LTC1426
Micropower
Dual 6-Bit PWM DAC
FEATURES
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DESCRIPTION
The
LTC
®
1426
is a dual micropower 6-bit PWM DAC fea-
turing versatile PWM outputs and a flexible pushbutton
compatible digital interface. The DAC outputs provide a
PWM signal that swings from 0V to V
REF
, allowing the
full-scale output to be varied by adjusting the voltage at
V
REF
. The PWM output frequency is typically 5kHz, easing
output filtering requirements. V
CC
supply current is typi-
cally 50µA and drops to 0.2µA in shutdown.
The LTC1426 can be controlled using one of two inter-
face modes: pushbutton and pulse. The LTC1426 auto-
matically configures itself into the appropriate mode at
start-up by monitoring the state of the CLK pins. In push-
button mode, the CLK pins can be directly connected
to external pushbuttons to control the DAC output. In
pulse mode, the CLK pins can be connected to CMOS
compatible logic. The DAC outputs initially power up at
half scale and the contents of the internal DAC registers
are retained in shutdown.
The LTC1426 is available in 8-pin MSOP and SO packages.
All registered trademarks and trademarks are the property of their respective owners.
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Wide Supply Range: 2.7V ≤ V
CC
≤ 5.5V
Wide Reference Voltage Range: 0V to 5.5V
Two Interface Modes:
Pulse Mode (Increment Only)
Pushbutton Mode (Increment/Decrement)
Low Supply Current: 50µA
0.2µA Supply Current in Shutdown
Available in 8-Pin MSOP and SO Packages
DAC Contents Are Retained in Shutdown
DACs Power-Up at Midrange
Low Output Impedance: < 100Ω
Output Frequency: 5kHz Typ
APPLICATIONS
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LCD Contrast and Backlight Brightness Control
Power Supply Voltage Adjustment
Battery Charger Voltage and Current Adjustment
GaAs FET Bias Adjustment
Trimmer Pot Elimination
TYPICAL APPLICATION
Pushbutton Adjustable CCFL/LCD Contrast Generator
UP TO 6mA
LAMP
HIGH VOLTAGE
ROYER
16
15
14
13
12
11
10
9
5V
C9
2.2µF
8V TO
28V
C10
2.2µF
35V
5V
R
SHDN
1M
C1
0.1µF
R1
44.2k
1%
R2
44.2k
1%
C2
1µF
C7 1µF
I
CCFL
= 0µA TO 50µA
1
2
3
4
5
6
7
CCFL PGND CCFL V
SW
I
CCFL
DIO
CCFL V
C
AGND
SHDN
LCD V
C
LT1182
BULB
BAT
ROYER
V
IN
FBP
FBN
LCD V
SW
R
P1
47k
UP
R
P2
47k
UP CONTRAST
UP/DOWN 1
CCFL UP/DOWN 2
SHDN
+
LTC1426
CLK1
CLK2
GND
SHDN
V
CC
V
REF
8
7
6
5
R5
20k
1%
C4
0.1µF
DOWN
DOWN
3
4
PWM1 PWM2
R3
5.1k
1%
R4
4.99k
1%
C3
10µF
R7 8
C8 10k
LCD PGND
0.68µF
+
C11
2.2µF
35V
LCD
CONTRAST
CONVERTER
V
OUT
NEGATIVE
LCD CONTRAST
V
OUT
= –10V TO –30V
Rev A
1426 TA01
R6
40k
1%
CONSULT THE LT1182 DATA SHEET FOR
DETAILS ON THE HIGH VOLTAGE ROYER
AND LCD CONTRAST CONVERTER SECTIONS
Document Feedback
For more information
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1
LTC1426
ABSOLUTE MAXIMUM RATINGS
(Note 1)
Total Supply Voltage (V
CC
) ........................................7V
Reference Voltage (V
REF
) ............................... – 0.3 to 7V
Input Voltage (All Inputs) .............. – 0.3 to (V
CC
+ 0.3V)
DAC Output Short-Circuit Duration ................. Indefinite
I
PWM(MAX)
.......................................................... 100mA
Operating Temperature Range
LTC1426C ................................................ 0°C to 70°C
LTC1426I............................................. – 40°C to 85°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec) .................. 300°C
PIN CONFIGURATION
TOP VIEW
TOP VIEW
CLK1
CLK2
GND
PWM1
1
2
3
4
8
7
6
5
SHDN
V
CC
V
REF
PWM2
CLK1 1
CLK2 2
GND 3
PWM1 4
8
7
6
5
SHDN
V
CC
V
REF
PWM2
MS8 PACKAGE
8-LEAD PLASTIC MSOP
T
JMAX
= 100°C,
θ
JA
= 200°C/W
S8 PACKAGE
8-LEAD PLASTIC SO
T
JMAX
= 100°C,
θ
JA
= 130°C/W
OBSOLETE PACKAGE
ORDER INFORMATION
LEAD FREE FINISH
LTC1426CMS8#PBF
LTC1426CS8#PBF
LTC1426IS8#PBF
TAPE AND REEL
LTC1426CMS8#TRPBF
LTC1426CS8#TRPBF
LTC1426IS8#TRPBF
PART MARKING
LTBQ
1426
1426I
PACKAGE DESCRIPTION
8-Lead Plastic MSOP
8-Lead Plastic SO
8-Lead Plastic SO
TEMPERATURE RANGE
0°C to 70°C
0°C to 70°C
–40°C to 85°C
Consult ADI Marketing for parts specified with wider operating temperature ranges.
Tape and reel specifications.
Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C.
SYMBOL PARAMETER
V
CC
V
REF
I
CC
I
REF
Supply Voltage
Reference Voltage
Supply Current
Pulse Mode: V
SHDN
= V
CC
, V
CLK1
= V
CLK2
= 0V, PWM1 = PWM2 = NC
Pushbutton Mode: V
SHDN
= V
CC
, V
CLK1
= V
CLK2
= PWM1 = PWM2 = NC
SHDN
= 0 (Note 3)
Pulse Mode: V
SHDN
= V
CC
, V
CLK1
= V
CLK2
= 0V, PWM1 = PWM2 = NC
Pushbutton Mode: V
SHDN
= V
CC
, V
CLK1
= V
CLK2
= PWM1 = PWM2 = NC
SHDN
= 0 (Note 3)
CONDITIONS
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ELECTRICAL CHARACTERISTICS
MIN
2.7
0
TYP
MAX
5.5
5.5
UNITS
V
V
µA
µA
µA
µA
µA
µA
bits
Rev A
40
50
0.2
75
75
0.2
6
100
100
±10
150
150
±10
Reference Current
DAC Resolution
2
For more information
www.analog.com
LTC1426
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C.
SYMBOL PARAMETER
DAC Frequency
DAC Output Impedance
DAC Full-Scale Duty Cycle
DAC Zero-Scale Duty Cycle
DNL
INL
FS Error
I
IN
DAC Differential Nonlinearity Monotonicity Guaranteed (Note 4)
DAC Integral Nonlinearity
DAC Full-Scale Error
Logic Input Current
Pulse Mode: 0V ≤ V
IN
≤ V
CC
Pushbutton Mode: 0V ≤ V
IN
≤ V
CC
V
IH
CLK High Level
Input Voltage (Note 5)
V
CC
= 5.5V
V
CC
= 3.6V
V
IL
CLK Low Level
Input Voltage (Note 5)
V
CC
= 4.5V
V
CC
= 2.7V
I
OZ
Z
IN
f
CLK
t
CKHI
t
CKLO
t
PW
t
DEB
t
DELAY
f
REPEAT
Three-State Output Leakage
CLK Input Resistance
Clock Frequency
Clock High Time
Clock Low Time
Pulse Width
Debounce Time
Repeat Rate Delay
Repeat Frequency
SHDN
= 0
Pushbutton Mode, CLK1/CLK2
Pulse Mode, V
CC
= 3.3V
Pulse Mode, V
CC
= 2.7V
Pulse Mode, V
CC
= 3.3V
Pulse Mode, V
CC
= 2.7V
Pulse Mode, V
CC
= 3.3V
Pulse Mode, V
CC
= 2.7V
Pushbutton Mode
Pushbutton Mode
Pushbutton Mode
Pushbutton Mode
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ELECTRICAL CHARACTERISTICS
CONDITIONS
0°C ≤ T
A
≤ 70°C
– 40°C ≤ T
A
≤ 85°C
MIN
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TYP
5
5
20
98.44
0
MAX
6
6
100
UNITS
kHz
kHz
Ω
%
%
3
2
V
CC
= 2.7V, V
REF
= 0.5V
±0.05
±0.05
±0.50
±5
±5
±5
±10
2.0
4.4
1.9
2.9
0.8
0.8
0.45
0.45
±5
2.5
1
750
450
600
450
600
670
10.7
340
11.7
12.8
410
19.5
21.3
680
23.4
LSB
LSB
LSB
µA
µA
µA
µA
V
V
V
V
V
V
V
V
µA
MΩ
MHz
kHz
ns
ns
ns
ns
µs
ms
ms
Hz
(Note 4)
SHDN
CLK1, CLK2
SHDN
CLK1, CLK2
SHDN
CLK1, CLK2
SHDN
CLK1, CLK2
SHDN
CLK1, CLK2
SHDN
CLK1, CLK2
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Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to ground, unless otherwise
specified. All typicals are given for V
CC
= V
REF
= 5V, T
A
= 25°C and PWM1/
PWM2 output to GND, C
PWM
= 10pF.
Note 3:
Shutdown current can be negative due to leakage currents if V
CC
>
V
REF
or V
REF
> V
CC
.
Note 4:
Guaranteed by Design. Decouple the V
CC
and V
REF
pins to GND
using high quality, low ESR, low ESL 0.1µF capacitors to eliminate PWM
switching noise that may otherwise get coupled into the CLK1/CLK2 high
impedance input buffers. The decoupling capacitors should be located in
close proximity to these pins and the ground line to have maximum effect.
Note 5:
Input thresholds apply for both pushbutton and pulse modes.
Rev A
For more information
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3
LTC1426
TYPICAL PERFORMANCE CHARACTERISTICS
Differential Nonlinearity (DNL)
0.05
V
CC
= V
REF
= 5V
0.04 T
A
= 25°C
0.03
DNL ERROR (LSB)
0.02
0.01
0
ERROR (LSB)
0.05
Integral Nonlinearity (INL)
OUTPUT PULL-DOWN VOLTAGE (mV)
V
CC
= V
REF
= 5V
0.04 T
A
= 25°C
0.03
0.02
0.01
0
1000
Output Pull-Down Voltage
vs Output Current Sink Capability
V
CC
= 5V
85°C
25°C
– 40°C
10
100
– 0.01
– 0.02
– 0.03
– 0.04
– 0.05
0
8
16
24
32 40
CODE
48
56
64
– 0.01
– 0.02
– 0.03
– 0.04
– 0.05
0
8
16
24
32 40
CODE
48
56
64
1
0.1
0.1
1
10
100
OUTPUT CURRENT SINK CAPABILITY (mA)
1426 G03
1426 G01
1426 G02
Minimum Clock High Time
vs Temperature
600
500
SUPPLY CURRENT (µA)
CLOCK HIGH TIME (ns)
400
300
200
100
0
– 40
38.5
36.5
34.5
32.5
30.5
28.5
26.5
24.5
– 15
10
35
TEMPERATURE (°C)
60
85
1426 G04
Supply Current
vs Logic Input Voltage
60
PUSHBUTTON
MODE
SUPPLY CURRENT (µA)
50
40
30
20
10
Supply Current vs Temperature
V
CC
= 5V
PUSHBUTTON
MODE
V
CC
= 3V
PULSE
MODE
PULSE
MODE
V
CC
= 5V
22.5
T
A
= 25°C
CLK1 AND CLK2
TIED TOGETHER
0
1
3
4
2
LOGIC INPUT VOLTAGE (V)
5
1426 F05
0
– 40
– 15
10
35
TEMPERATURE (°C)
60
85
1426 G06
PIN FUNCTIONS
CLK1 (Pin 1):
Channel 1 Clock/Pushbutton Input.
CLK2 (Pin 2):
Channel 2 Clock/Pushbutton Input.
GND (Pin 3):
Ground. It is recommended that GND be
tied to a ground plane.
PWM1 (Pin 4):
Channel 1 PWM Output.
PWM2 (Pin 5):
Channel 2 PWM Output.
V
REF
(Pin 6):
Voltage Reference Input. V
REF
powers the
DAC output buffers and can be used to control the output
span. Bypass V
REF
to GND with an external capacitor to
minimize output errors. V
REF
can be tied to V
CC
if desired.
V
CC
(Pin 7):
Voltage Supply. This supply must be kept
free from noise and ripple by bypassing directly to the
ground plane.
SHDN
(Pin 8):
Shutdown. A logic low puts the chip into
shutdown mode with the PWM outputs in high imped-
ance. The digital settings for the DACs are retained in
shutdown.
Rev A
4
For more information
www.analog.com
LTC1426
TIMING DIAGRAMS
Pulse Mode Timing
t
CKL0
CLK1
CLK2
1426 TC01
Pushbutton Mode Timing
t
PW
CLK1
CLK2
t
CKHI
1426 TC02
BLOCK DIAGRAM
LATCH
AND
LOGIC
MODE SELECT
0 = PUSHBUTTON MODE
1 = PULSE MODE
POWER-ON
RESET
6-BIT
UP/DOWN
COUNTER
6
COMPARATOR
6
COMPARATOR
6
DRIVER
PWM2
DRIVER
PWM1
V
REF
CLK1
CLK2
INPUT
CONDITIONING
CONTROL
LOGIC
6-BIT
UP/DOWN
COUNTER
6-BIT
UP
COUNTER
DEBOUNCE
CIRCUIT
SHDN
OSCILLATOR
1426 F01
Figure 1. LTC1426 Block Diagram
DEFINITIONS
LSB:
The least significant bit or the ideal duty cycle dif-
ference between two successive codes.
LSB = DC
MAX
/64
DC
MAX
= The DAC output maximum duty cycle
Resolution:
The resolution is the number of DAC output
states (64) that divide the full-scale output duty cycle
range. The resolution does not necessarily imply linearity.
INL:
End point integral nonlinearity is the maximum devia-
tion from a straight line passing through the end points
of the DAC transfer curve. The INL error at a given code
is calculated as follows:
INL = (DC
OUT
– DC
IDEAL
)/LSB
DC
IDEAL
= (Code)(LSB)
DC
OUT
= the DAC output duty cycle measured at the
given number of clocked in pulses.
DNL:
Differential nonlinearity is the difference between
the measured duty cycle change and the ideal 1LSB duty
cycle change between any two adjacent codes. The DNL
error between any two codes is calculated as follows:
DNL = (∆DC
OUT
– LSB)/LSB
∆DC
OUT
= The measured duty cycle difference
between two adjacent codes.
Full-Scale Error:
Full-scale error is the difference between
the ideal and measured DAC output duty cycles with all
bits set to one (Code = 63). The full-scale error is calcu-
lated as follows:
FSE = (DC
OUT
– DC
IDEAL
)/LSB
DC
IDEAL
= DC
MAX
Rev A
For more information
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5
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