The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 2:
ESD testing conforms to MIL-STD-883, Method 3015.
Commercial Version
DC Electrical Characteristics
(Note 3)
V
EE
= −4.2V
to
−5.7V,
V
CC
=
V
CCA
=
GND, T
C
=
0
°
C to
+
85
°
C
Symbol
V
OH
V
OL
V
OHC
V
OLC
V
BB
V
DIFF
V
CM
V
IH
V
IL
I
IL
I
IH
Parameter
Output HIGH Voltage
Output LOW Voltage
Output HIGH Voltage
Output LOW Voltage
Output Reference Voltage
Input Voltage Differential
Common Mode Voltage
Input HIGH Voltage
Input LOW Voltage
Input LOW Current
Input HIGH Current
CLKIN, CLKIN
EN
I
CBO
I
EE
Input Leakage Current
Power Supply Current
−10
−115
−57
100
250
µA
mA
V
IN
=
V
EE
Inputs Open
µA
−1380
150
V
CC
−
2.0
−1165
−1830
0.50
V
CC
−
0.5
−870
−1475
−1320
Min
−1025
−1830
−1035
−1610
−1260
Typ
−955
−1705
Max
−870
−1620
Units
mV
mV
mV
mV
mV
mV
V
mV
mV
µA
Guaranteed HIGH Signal for
All Inputs
Guaranteed LOW Signal for
All Inputs
V
IN
=
V
IL
(Min)
V
IN
=
V
IH
(Max)
V
IN
=
V
IH
(Max)
or V
IL
(Min)
V
IN
=
V
IH
or V
IL
(Max)
I
VBB
= −300 µA
Required for Full Output Swing
Conditions
Loading with
50Ω to
−2.0V
Loading with
50Ω to
−2.0V
Note 3:
The specified limits represent the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional
noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are cho-
sen to guarantee operation under “worst case” conditions.
www.fairchildsemi.com
2
100311
Commercial Version
(Continued)
AC Electrical Characteristics
V
EE
= −
4.2V to
−
5.7V, V
CC
=
V
CCA
=
GND
Symbol
f
MAX
t
PLH
t
PHL
Parameter
Max Toggle Frequency
CLKIN to Q
n
Propagation Delay,
CLKIN
n
to CLK
n
Differential
Single-Ended
t
PLH
t
PHL
t
PS
t
OSLH
t
OSHL
t
OST
t
S
t
H
t
R
t
TLH
t
THL
Propagation Delay
SEL to Output
LH–HL Skew
Gate–Gate Skew LH
Gate–Gate Skew HL
Gate–Gate LH–HL Skew
Setup Time
EN
n
to CLKIN
n
Hold Time
EN
n
to CLKIN
n
Release Time
EN
n
to CLKIN
n
Transition Time
20% to 80%, 80% to 20%
275
500
750
275
480
750
275
460
750
ps
Figure 4
300
300
300
ps
0
0
0
ps
250
10
20
20
30
30
50
50
60
250
10
20
20
30
30
50
50
60
300
10
20
20
30
30
50
50
60
ps
ps
(Note 5)(Note 8)
(Note 6)(Note 8)
(Note 6)(Note 8)
(Note 7)(Note 8)
0.75
0.65
0.75
0.84
0.90
1.03
0.95
1.05
1.20
0.75
0.67
0.80
0.86
0.93
1.05
0.95
1.17
1.25
0.84
0.74
0.85
0.93
1.06
1.12
1.04
1.24
1.35
ns
Figure 2
ns
Figure 3
T
C
=
0°C
Min
750
Typ
Max
Min
750
T
C
= +25°C
Typ
Max
Min
750
T
C
= +85°C
Typ
Max
Units
MHz
Conditions
(Note 4)
Note 4:
f
MAX
=
the highest frequency at which output V
OL
/V
OH
levels still meet V
IN
specifications. The F311 will function @ 1 GHz.
Note 5:
t
PS
describes opposite edge skews, i.e. the difference between the delay of a differential output signal pair’s LOW-to-HIGH and HIGH-to-LOW prop-
agation delays. With differential signal pairs, a LOW-to-HIGH or HIGH-to-LOW transition is defined as the transition of the true output or input pin.
Note 6:
t
OSLH
describes in-phase gate-to-gate differential propagation skews with all differential outputs going LOW-to-HIGH; t
OSHL
describes the same con-
ditions except with the outputs going HIGH-to-LOW.
Note 7:
t
OST
describes the maximum worst case difference in any of the t
PS
, t
OSLH
or t
OST
delay paths combined.
Note 8:
The skew specifications pertain to differential I/O paths.
Industrial Version
DC Electrical Characteristics
(Note 9)
V
EE
= −4.2V
to
−5.7V,
V
CC
=
V
CCA
=
GND, T
C
= −
40
°
C to
+
85
°
C
Symbol
V
OH
V
OL
V
OHC
V
OLC
V
BB
V
DIFF
V
CM
V
IH
Parameter
Output HIGH Voltage
Output LOW Voltage
Output HIGH Voltage
Output LOW Voltage
Output Reference Voltage
Input Voltage Differential
Common Mode Voltage
Input HIGH Voltage
−1395
150
−1170
−870
T
C
= −40°C
Min
−1085
−1830
−1095
−1565
−1255
−1380
150
−1165
−870
Max
−870
−1575
T
C
=
0°C to
+85°C
Min
−1025
−1830
−1035
−1610
−1260
Max
−870
−1620
Units
mV
mV
mV
mV
mV
mV
V
mV
Guaranteed HIGH Signal for
All Inputs
Conditions
V
IN
=
V
IH
(Max)
or V
IL
(Min)
V
IN
=
V
IH
or V
IL
(Min)
I
VBB
= −300 µA
Required for Full Output Swing
Loading with
50Ω to
−2.0V
Loading with
50Ω to
−2.0V
V
CC
−
2.0 V
CC
−
0.5 V
CC
−
2.0 V
CC
−
0.5
3
www.fairchildsemi.com
100311
Industrial Version
(Continued)
DC Electrical Characteristics
(Note 9)
V
EE
= −4.2V
to
−5.7V,
V
CC
=
V
CCA
=
GND
Symbol
V
IL
I
IL
I
IH
Parameter
Input LOW Voltage
Input LOW Current
Input HIGH Current
CLKIN, CLKIN
EN
I
CBO
I
EE
V
PP
V
CMR
Input Leakage Current
Power Supply Current
Minimum Input Swing
Common Mode Range
−10
−115
150
V
CC
−2.0
V
CC
−0.5
−57
100
250
−10
−115
150
V
CC
−2.0
V
CC
−0.5
−57
100
250
µA
mA
mV
V
V
IN
=
V
EE
Inputs Open
µA
T
C
= −40°C
Min
−1830
0.50
Max
−1480
T
C
=
0°C to
+85°C
Min
−1830
0.50
Max
−1475
mV
µA
Guaranteed LOW Signal for
All Inputs
V
IN
=
V
IL
(Min)
V
IN
=
V
IH
(Max)
Units
Conditions
Note 9:
The specified limits represent the “worst case” value for the parameter. Since these values normally occur at the temperature extremes, additional
noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are cho-
sen to guarantee operation under “worst case” conditions.
AC Electrical Characteristics
V
EE
= −
4.2V to
−
5.7V, V
CC
=
V
CCA
=
GND
Symbol
f
MAX
t
PLH
t
PHL
Parameter
Min
Max Toggle Frequency
CLKIN to Q
n
Propagation Delay,
CLKIN
n
to CLK
n
Differential
Single-Ended
t
PLH
t
PHL
t
PS
t
OSLH
t
OSHL
t
OST
t
S
t
H
t
R
t
TLH
t
THL
Propagation Delay
SEL to Output
LH–HL Skew
Gate–Gate Skew LH
Gate–Gate Skew HL
Gate–Gate LH–HL Skew
Setup Time
EN
n
to CLKIN
n
Hold Time
EN
n
to CLKIN
n
Release Time
EN
n
to CLKIN
n
Transition Time
20% to 80%, 80% to 20%
275
500
750
275
480
750
275
460
750
ps
Figure 4
300
300
300
ps
0
0
0
ps
250
10
20
20
30
30
50
50
60
250
10
20
20
30
30
50
50
60
300
10
20
20
30
30
50
50
60
ps
ps
(Note 11)(Note 14)
(Note 12)(Note 14)
(Note 12)(Note 14)
(Note 13)(Note 14)
0.72
0.62
0.70
0.81
0.89
0.97
0.92
1.02
1.20
0.77
0.67
0.80
0.86
0.93
1.05
0.95
1.17
1.25
0.84
0.74
0.85
0.93
1.06
1.12
1.04
1.24
1.35
ns
Figure 2
ns
Figure 3
750
T
C
= −40°C
Typ
Max
Min
750
T
C
= +25°C
Typ
Max
Min
750
T
C
= +85°C
Typ
Max
MHz
(Note 10)
Units
Conditions
Note 10:
f
MAX
=
the highest frequency of which output V
OL
/V
OH
levels still meet V
IN
specifications. The F311 will function @ 1 GHz
Note 11:
t
PS
describes opposite edge skews, i.e. the difference between the delay of a differential output signal pair's LOW-to-HIGH and HIGH-to-LOW prop-
agation delays. With differential signal pairs, a LOW-to-HIGH or HIGH-to-LOW transition is defined as the transition of the true output or input pin.
Note 12:
t
OSLH
describes in-phase gate differential propagation skews with all differential outputs going LOW-to-HIGH; t
OSHL
describes the same conditions
except with the outputs going HIGH-to-LOW.
Note 13:
t
OST
describes the maximum worst case difference in any of the t
PS
, t
OSLH
or t
OST
delay paths combined.
Note 14:
The skew specifications pertain to differential I/O paths.
www.fairchildsemi.com
4
100311
Test Circuit
Note:
Shown for testing CLKIN to CLK1 in the differential mode.
L1, L2, L3 and L4
=
equal length 50Ω impedance lines.
All unused inputs and outputs are loaded with 50Ω in parallel with
≤
3 pF to GND.
Scope should have 50Ω input terminator internally.
FIGURE 1. AC Test Circuit
Switching Waveforms
FIGURE 2. Propagation Delay, EN to Outputs
FIGURE 3. Propagation Delay, CLKIN/CLKIN to Outputs
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