LT1711/LT1712
Single/Dual 4.5ns, 3V/5V/±5V,
Rail-to-Rail Comparators
FEATURES
s
s
s
DESCRIPTIO
s
s
s
s
s
Ultrafast: 4.5ns at 20mV Overdrive
5.5ns at 5mV Overdrive
Rail-to-Rail Inputs
Rail-to-Rail Complementary Outputs (TTL/CMOS
Compatible)
Specified at 2.7V, 5V and
±5V
Supplies
Output Latch
Inputs Can Exceed Supplies Without Phase Reversal
LT1711: 8-Lead MSOP Package
LT1712: 16-Lead Narrow SSOP Package
The LT
®
1711/LT1712 are UltraFast
TM
4.5ns comparators
featuring rail-to-rail inputs, rail-to-rail complementary out-
puts and an output latch. Optimized for 3V and 5V power
supplies, they operate over a single supply voltage range
from 2.4V to 12V or from
±2.4V
to
±6V
dual supplies.
The LT1711/LT1712 are designed for ease of use in a
variety of systems. In addition to wide supply voltage
flexibility, rail-to-rail input common mode range extends
100mV beyond both supply rails, and the outputs are
protected against phase reversal for inputs extending
further beyond the rails. Also, the rail-to-rail inputs may be
taken to opposite rails with no significant increase in input
current. The rail-to-rail matched complementary outputs
interface directly to TTL or CMOS logic and can sink 10mA
to within 0.5V of GND or source 10mA to within 0.7V of V
+
.
The LT1711/LT1712 have internal TTL/CMOS compatible
latches for retaining data at the outputs. Each latch holds
data as long as the latch pin is held high. Latch pin
hysteresis provides protection against slow moving or
noisy latch signals. The LT1711 is available in the 8-pin
MSOP package. The LT1712 is available in the 16-pin
narrow SSOP package.
, LTC and LT are registered trademarks of Linear Technology Corporation.
UltraFast is a trademark of Linear Technology Corporation.
APPLICATIO S
s
s
s
s
s
s
s
s
s
s
s
High Speed Automatic Test Equipment
Current Sense for Switching Regulators
Crystal Oscillator Circuits
High Speed Sampling Circuits
High Speed A/D Converters
Pulse Width Modulators
Window Comparators
Extended Range V/F Converters
Fast Pulse Height/Width Discriminators
Line Receivers
High Speed Triggers
TYPICAL APPLICATIO
A 4× NTSC Subcarrier Voltage-Tunable Crystal Oscillator
5V
1N4148
1M
5V
1M
2k
100pF
MV-209
VARACTOR
DIODE
1M*
47k* LT1004-2.5
3.9k*
1k*
5.5
LT1711/LT1712 Propagation Delay
vs Input Overdrive
V
IN
0V TO 5V
6.0
T
A
= 25°C
V
+
= 5V
V
–
= 0V
V
STEP
= 100mV
t
PD+
1M
0.047µF
C SELECT
(CHOOSE FOR CORRECT
PLL LOOP RESPONSE)
PROPAGATION DELAY (ns)
5.0
4.5
4.0
3.5
3.0
0
10
390Ω
+
LT1711
Y1** 15pF 100pF
–
2k
200pF
FREQUENCY
OUTPUT
171112 TA01
* 1% FILM RESISTOR
** NORTHERN ENGINEERING LABS C-2350N-14.31818MHz
U
t
PD–
20
40
50
30
INPUT OVERDRIVE (mV)
60
171112 TA02
U
U
1
LT1711/LT1712
ABSOLUTE
AXI U
RATI GS
Supply Voltage
V
+
to V
–
............................................................ 12.6V
V
+
to GND ........................................................ 12.6V
V
–
to GND .............................................– 10V to 0.3V
Differential Input Voltage ...................................
±12.6V
Latch Pin Voltage ...................................................... 7V
Input and Latch Current .....................................
±10mA
PACKAGE/ORDER I FOR ATIO
ORDER PART
NUMBER
TOP VIEW
V
+
1
+IN 2
–IN 3
V
–
4
8
7
6
5
Q
Q
GND
LATCH
ENABLE
LT1711CMS8
LT1711IMS8
MS8 PART MARKING
LTTC
LTTD
MS8 PACKAGE
8-LEAD PLASTIC MSOP
T
JMAX
= 150°C,
θ
JA
= 250°C/ W (NOTE 12)
Consult factory for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The
q
denotes specifications which apply over the full operating temperature range, otherwise specifications are at T
A
= 25°C.
V
+
= 2.7V or V
+
= 5V, V
–
= 0V, V
CM
= V
+
/2, V
LATCH
= 0.8V, C
LOAD
= 10pF, V
OVERDRIVE
= 20mV, unless otherwise specified.
SYMBOL PARAMETER
V
+
V
OS
Positive Supply Voltage Range
Input Offset Voltage (Note 4)
R
S
= 50Ω, V
CM
= V
+
/2
R
S
= 50Ω, V
CM
= V
+
/2
R
S
= 50Ω, V
CM
= 0V
R
S
= 50Ω, V
CM
= V
+
CONDITIONS
q
q
∆V
OS
/∆T
I
OS
I
B
V
CM
CMRR
Input Offset Voltage Drift
Input Offset Current
Input Bias Current (Note 5)
q
Input Voltage Range (Note 9)
Common Mode Rejection Ratio
V
+
= 5V, 0V
≤
V
CM
≤
5V
V
+
= 5V, 0V
≤
V
CM
≤
5V
V
+
= 2.7V, 0V
≤
V
CM
≤
2.7V
V
+
= 2.7V, 0V
≤
V
CM
≤
2.7V
2.4V
≤
V
+
≤
7V, V
CM
= 0V
PSRR
+
Positive Power Supply Rejection Ratio
2
U
U
W
W W
U
W
(Note 1)
Output Current (Continuous) ..............................
±20mA
Operating Temperature Range ................ – 40°C to 85°C
Specified Temperature Range (Note 2) ... – 40°C to 85°C
Junction Temperature .......................................... 150°C
Storage Temperature Range ................. – 65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
TOP VIEW
–IN A
+IN A
V
–
V
+
V
+
V
–
+IN B
–IN B
1
2
3
4
5
6
7
8
LATCH
ENABLE A
15 GND
16
14 Q A
13 Q A
12 Q B
11 Q B
10 GND
LATCH
9
ENABLE B
ORDER PART
NUMBER
LT1712CGN
LT1712IGN
GN PART MARKING
1712
1712I
GN PACKAGE
16-LEAD PLASTIC SSOP
T
JMAX
= 150°C,
θ
JA
= 120°C/ W (NOTE 12)
MIN
2.4
TYP
0.5
0.7
1
MAX
7
5.0
6.0
UNITS
V
mV
mV
mV
mV
µV/°C
µA
µA
µA
µA
V
dB
dB
dB
dB
dB
dB
q
q
10
0.2
– 18
– 35
– 0.1
56
53
54
50
58
56
65
65
75
–5
3
6
5
10
V
+
+ 0.1
q
q
q
q
LT1711/LT1712
ELECTRICAL CHARACTERISTICS
The
q
denotes specifications which apply over the full operating temperature range, otherwise specifications are at T
A
= 25°C.
V
+
= 2.7V or V
+
= 5V, V
–
= 0V, V
CM
= V
+
/2, V
LATCH
= 0.8V, C
LOAD
= 10pF, V
OVERDRIVE
= 20mV, unless otherwise specified.
SYMBOL PARAMETER
PSRR
–
A
V
V
OH
V
OL
I
+
I
–
V
IH
V
IL
I
IL
t
PD
∆t
PD
t
r
t
f
t
LPD
t
SU
t
H
t
DPW
f
MAX
t
JITTER
Negative Power Supply Rejection Ratio
Small-Signal Voltage Gain (Note 10)
Output Voltage Swing HIGH
Output Voltage Swing LOW
Positive Supply Current (Per Comparator)
Negative Supply Current (Per Comparator)
Latch Pin High Input Voltage
Latch Pin Low Input Voltage
Latch Pin Current
Propagation Delay (Note 6)
V
LATCH
= V
+
∆V
IN
= 100mV, V
OVERDRIVE
= 20mV
∆V
IN
= 100mV, V
OVERDRIVE
= 20mV
∆V
IN
= 100mV, V
OVERDRIVE
= 5mV
∆V
IN
= 100mV, V
OVERDRIVE
= 20mV
10% to 90%
90% to 10%
I
OUT
= 1mA, V
OVERDRIVE
= 50mV
I
OUT
= 10mA, V
OVERDRIVE
= 50mV
I
OUT
= – 1mA, V
OVERDRIVE
= 50mV
I
OUT
= – 10mA, V
OVERDRIVE
= 50mV
V
+
= 5V, V
OVERDRIVE
= 1V
q
q
q
q
q
CONDITIONS
– 7V
≤
V
–
≤
0V, V
+
= 5V, V
CM
= 5V
q
MIN
60
58
1
V
+
– 0.5
V
+
– 0.7
TYP
80
15
V
+
– 0.2
V
+
– 0.4
0.20
0.35
15
8
MAX
UNITS
dB
dB
V/mV
V
V
0.4
0.5
19
26
10
13
0.8
15
V
V
mA
mA
mA
mA
V
V
µA
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
ps
RMS
V
+
= 5V, V
OVERDRIVE
= 1V
q
q
q
q
2.4
4.5
q
6.0
8.5
1.5
5.5
0.5
2
2
5
1
0
5
Differential Propagation Delay (Note 6)
Output Rise Time
Output Fall Time
Latch Propagation Delay (Note 7)
Latch Setup Time (Note 7)
Latch Hold Time (Note 7)
Minimum Latch Disable Pulse Width (Note 7)
Maximum Toggle Frequency
Output Timing Jitter
V
IN
= 100mV
P-P
Sine Wave
V
IN
= 630mV
P-P
(0dBm) Sine Wave, f = 30MHz
100
11
The
q
denotes specifications which apply over the full operating temperature range, otherwise specifications are at T
A
= 25°C.
V
+
= 5V, V
–
= – 5V, V
CM
= 0V, V
LATCH
= 0.8V, C
LOAD
= 10pF, V
OVERDRIVE
= 20mV, unless otherwise specified.
SYMBOL PARAMETER
V
+
V
–
V
OS
Positive Supply Voltage Range
Negative Supply Voltage Range (Note 3)
Input Offset Voltage (Note 4)
R
S
= 50Ω, V
CM
= 0V
R
S
= 50Ω, V
CM
= 0V
R
S
= 50Ω, V
CM
= 5V
R
S
= 50Ω, V
CM
= –5V
CONDITIONS
q
q
q
MIN
2.4
–7
TYP
MAX
7
0
UNITS
V
V
mV
mV
mV
mV
µV/°C
µA
µA
µA
µA
V
dB
dB
dB
dB
dB
dB
0.5
0.7
1
10
0.2
q
5.0
6.0
∆V
OS
/∆T
I
OS
I
B
V
CM
CMRR
PSRR
+
PSRR
–
Input Offset Voltage Drift
Input Offset Current
Input Bias Current (Note 5)
q
3
6
5
10
5.1
– 18
– 35
– 5.1
61
58
58
56
60
58
–5
Input Voltage Range
Common Mode Rejection Ratio
Positive Power Supply Rejection Ratio
Negative Power Supply Rejection Ratio
– 5V
≤
V
CM
≤
5V
q
q
75
85
80
2.4V
≤
V
+
≤
7V, V
CM
= – 5V
q
– 7V
≤
V
–
≤
0V, V
CM
= 5V
q
3
LT1711/LT1712
ELECTRICAL CHARACTERISTICS
The
q
denotes specifications which apply over the full operating temperature range, otherwise specifications are at T
A
= 25°C.
V
+
= 5V, V
–
= – 5V, V
CM
= 0V, V
LATCH
= 0.8V, C
LOAD
= 10pF, V
OVERDRIVE
= 20mV, unless otherwise specified.
SYMBOL PARAMETER
A
V
V
OH
V
OL
I
+
I
–
V
IH
V
IL
I
IL
t
PD
∆t
PD
t
r
t
f
t
LPD
t
SU
t
H
t
DPW
f
MAX
t
JITTER
Small-Signal Voltage Gain
Output Voltage Swing HIGH (Note 8)
Output Voltage Swing LOW (Note 8)
Positive Supply Current (Per Comparator)
Negative Supply Current (Per Comparator)
Latch Pin High Input Voltage
Latch Pin Low Input Voltage
Latch Pin Current
Propagation Delay (Notes 6, 11)
V
LATCH
= V
+
∆V
IN
= 100mV, V
OVERDRIVE
= 20mV
∆V
IN
= 100mV, V
OVERDRIVE
= 20mV
∆V
IN
= 100mV, V
OVERDRIVE
= 5mV
∆V
IN
= 100mV, V
OVERDRIVE
= 20mV
10% to 90%
90% to 10%
I
OUT
= 1mA, V
OVERDRIVE
= 50mV
I
OUT
= 10mA, V
OVERDRIVE
= 50mV
I
OUT
= – 1mA, V
OVERDRIVE
= 50mV
I
OUT
= – 10mA, V
OVERDRIVE
= 50mV
V
OVERDRIVE
= 1V
q
q
q
q
q
CONDITIONS
MIN
1
4.5
4.3
TYP
15
4.8
4.6
0.20
0.30
17
9
MAX
UNITS
V/mV
V
V
0.4
0.5
22
30
12
15
0.8
15
V
V
mA
mA
mA
mA
V
V
µA
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
ps
RMS
V
OVERDRIVE
= 1V
q
q
q
q
2.4
4.5
q
6.0
8.5
1.5
5.5
0.5
2
2
5
1
0
5
Differential Propagation Delay (Notes 6, 11)
Output Rise Time
Output Fall Time
Latch Propagation Delay (Note 7)
Latch Setup Time (Note 7)
Latch Hold Time (Note 7)
Minimum Latch Disable Pulse Width (Note 7)
Maximum Toggle Frequency
Output Timing Jitter
V
IN
= 100mV
P-P
Sine Wave
V
IN
= 630mV
P-P
(0dBm) Sine Wave, f = 30MHz
100
11
Note 1:
Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2:
The LT1711C/LT1712C are guaranteed to meet specified
performance from 0°C to 70°C. They are designed, characterized and
expected to meet specified performance from – 40°C to 85°C but are not
tested or QA sampled at these temperatures. The LT1711I/LT1712I are
guaranteed to meet specified performance from –40°C to 85°C.
Note 3:
The negative supply should not be greater than the ground pin
voltage and the maximum voltage across the positive and negative
supplies should not be greater than 12V.
Note 4:
Input offset voltage (V
OS
) is measured with the LT1711/LT1712 in
a configuration that adds external hysteresis. It is defined as the average of
the two hysteresis trip points.
Note 5:
Input bias current (I
B
) is defined as the average of the two input
currents.
Note 6:
Propagation delay (t
PD
) is measured with the overdrive added to
the actual V
OS
. Differential propagation delay is defined as:
∆t
PD
= t
PD+
– t
PD–
. Load capacitance is 10pF. Due to test system
requirements, the LT1711/LT1712 propagation delay is specified with a
1kΩ load to ground for
±5V
supplies, or to mid-supply for 2.7V or 5V
single supplies.
Note 7:
Latch propagation delay (t
LPD
) is the delay time for the output to
respond when the latch pin is deasserted. Latch setup time (t
SU
) is the
interval in which the input signal must remain stable prior to asserting the
latch signal. Latch hold time (t
H
) is the interval after the latch is asserted in
which the input signal must remain stable. Latch disable pulse width
(t
DPW
) is the width of the negative pulse on the latch enable pin that
latches in new data on the data inputs.
Note 8:
Output voltage swings are characterized and tested at V
+
= 5V and
V
–
= 0V. They are guaranteed by design and correlation to meet these
specifications at V
–
= – 5V.
Note 9:
The input voltage range is tested under the more demanding
conditions of V
+
= 5V and V
–
= –5V. The LT1711/LT1712 are guaranteed
by design and correlation to meet these specifications at V
–
= 0V.
Note 10:
The LT1711/LT1712 voltage gain is tested at V
+
= 5V and
V
–
= –5V only. Voltage gain at single supply V
+
= 5V and V
+
= 2.7V is
guaranteed by design and correlation.
Note 11:
The LT1711/LT1712 t
PD
is tested at V
+
= 5V and 2.7V with
V
–
= 0V. Propagation delay at V
+
= 5V, V
–
= –5V is guaranteed by design
and correlation.
Note 12:
Care must be taken to make sure that the LT1711/LT1712 do not
exceed T
JMAX
when operating with
±5V
supplies over the industrial
temperature range. T
JMAX
is not exceeded for DC inputs, but supply
current increases with switching frequency (see Typical Performance
Characteristics).
4
LT1711/LT1712
TYPICAL PERFOR A CE CHARACTERISTICS
Input Offset Voltage vs
Temperature
2.5
2.0
INPUT OFFSET VOLTAGE (mV)
V
+
= 5V
V
–
= 0V
PROPAGATION DELAY (ns)
PROPAGATION DELAY (ns)
1.5
1.0
0.5
0
– 0.5
– 1.0
– 1.5
– 2.0
– 2.5
–50
–25
50
0
75
25
TEMPERATURE (°C)
100
125
V
CM
= 0V
V
CM
= 5V
V
CM
= 2.5V
6.0
5.5
PROPAGATION DELAY (ns)
PROPAGATION DELAY (ns)
5.0
4.5
4.0
3.5
3.0
–1
T
A
= 25°C
V
+
= 5V
V
–
= 0V
V
OD
= 20mV
V
STEP
= 100mV
C
LOAD
= 10pF
6.0
5.5
5.0
4.5
POSITIVE SUPPLY CURRENT (PER COMPARATOR) (mA)
Propagation Delay
vs Input Common Mode Voltage
t
PD+
t
PD–
0
3
4
5
2
INPUT COMMON MODE (V)
1
NEGATIVE SUPPLY CURRENT (PER COMPARATOR) (mA)
POSITIVE SUPPLY CURRENT (PER COMPARATOR) (mA)
Positive Supply Current
vs Switching Frequency
40
T
A
= 25°C
V
+
= 5V
V
–
= 0V
C
LOAD
= 10pF
30
10
8
6
4
2
0
0
–6
–3 –4
–5
–1
–2
NEGATIVE SUPPLY VOLTAGE (V)
–7
I
–
AT –55°C
I
–
AT 25°C
I
–
AT 85°C
INPUT BIAS CURRENT (µA)
20
10
0
0
10
20
30
40
50
SWITCHING FREQUENCY (MHz)
U W
171112 G01
171112 G04
171112 G07
Propagation Delay
vs Load Capacitance
10
9
8
7
6
5
4
3
0
20
80
60
100
40
LOAD CAPACITANCE (pF)
120
T
A
= 25°C
V
+
= 5V
V
–
= 0V
V
CM
= 2.5V
V
OD
= 20mV
V
STEP
= 100mV
t
PD–
t
PD+
Propagation Delay vs
Temperature
8
7
6
5
4
3
2
1
V
+
= 5V
V
–
= 0V
V
CM
= 2.5V
V
OD
= 20mV
V
STEP
= 100mV
C
LOAD
= 10pF
0
25
50
75
100
125
TEMPERATURE (°C)
171112 G03
t
PD
–
t
PD+
0
–50 –25
171112 G02
Propagation Delay
vs Positive Supply Voltage
T
A
= 25°C
V
–
= 0V
V
CM
= 2.5V
V
OD
= 20mV
V
STEP
= 100mV
C
LOAD
= 10pF
Positive Supply Current
vs Positive Supply Voltage
25
V
–
= – 5V
20
V
–
= 0V
t
PD+
15
t
PD–
4.0
3.5
3.0
10
5
∆V
IN
= 100mV
I
OUT
= 0mA
0
0
I
+
AT –55°C
I
+
AT 25°C
I
+
AT 85°C
12
6
0
6
8
4
POSITIVE SUPPLY VOLTAGE (V)
2
10
171112 G05
4
6
8
10
2
POSITIVE SUPPLY VOLTAGE (V)
171112 G06
Negative Supply Current
vs Negative Supply Voltage
14
12
V
+
= 5V
∆V
IN
= 100mV
I
OUT
= 0mA
10
Input Bias Current
vs Input Common Mode Voltage
V
+
= 5V
V
–
= 0V
∆V
IN
= 0mV
4
–2
–8
–14
I
B
AT –55°C
I
B
AT 25°C
I
B
AT 125°C
–1
3
2
4
0
1
5
INPUT COMMON MODE VOLTAGE (V)
6
60
–20
171112
G08
171112 G09
5
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