Si8920 Data Sheet
Isolated Amplifier for Current Shunt Measurement
KEY FEATURES
The Si8920 is a galvanically isolated analog amplifier. The low-voltage differential input
is ideal for measuring voltage across a current shunt resistor or for any place where a
sensor must be isolated from the control system. The output is a differential analog sig-
nal amplified by either 8.1x or 16.2x.
The very low signal delay of the Si8920 allows control systems to respond quickly to
fault conditions or changes in load. Low offset and gain drift ensure that accuracy is
maintained over the entire operating temperature range. Exceptionally high common-
mode transient immunity means that the Si8920 delivers accurate measurements even
in the presence of high-power switching as is found in motor drive systems and inver-
ters.
The Si8920 isolated amplifier utilizes Silicon Labs’ proprietary isolation technology. It
supports up to 5.0 kVrms withstand voltage per UL1577. This technology enables higher
performance, reduced variation with temperature and age, tighter part-to-part matching,
and longer lifetimes compared to other isolation technologies.
Automotive Grade is available for certain part numbers. These products are built using
automotive-specific flows at all steps in the manufacturing process to ensure the robust-
ness and low defectivity required for automotive applications.
Industrial Applications
• Industrial and renewable energy inver-
ters
• AC, Brushless, and DC motor controls
and drives
• Variable speed motor control in consum-
er white goods
• Isolated switch mode and UPS power
supplies
Safety Regulatory Approvals
• UL 1577 recognized
• Up to 5000 Vrms for 1 minute
• CSA component notice 5A approval
• IEC 60950-1 (reinforced insulation)
• VDE certification conformity
• VDE0884 Part 10 (basic/reinforced
insulation)
• CQC certification approval
• GB4943.1
Automotive Applications
• Hybrid and EV traction inverters
• Onboard chargers
• Charging pedestals
• Low voltage differential input
• ±100 mV and ±200 mV options
• Low signal delay: 0.75 µs
• Input offset: 0.2 mV
• Gain error: <0.5%
• Excellent drift specifications
• 1 µV/°C offset drift
• 10 ppm/°C gain drift
• Nonlinearity: 0.025% full-scale
• Low noise: 0.10 mVrms over 100 kHz
bandwidth
• High common-mode transient immunity: 75
kV/µs
• Compact packages
• 16-pin wide body SOIC
• 8-pin surface mount DIP
• –40 to 125 °C
• AEC-Q100
• Automotive-grade OPNs available
• AIAG compliant PPAP documentation
support
• IMDS and CAMDS listing support
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Rev. 1.02
Si8920 Data Sheet
Ordering Guide
1. Ordering Guide
Table 1.1. Ordering Guide for Valid OPNs
New Ordering Part Number
(OPN)
Si8920AC-IP
Si8920BC-IP
Si8920AD-IS
Si8920BD-IS
Note:
1. All packages are RoHS-compliant.
2. “Si” and “SI” are used interchangeably.
3. AEC-Q100 qualified.
Ordering Options
Specified Input Range
±100 mV
±200 mV
±100 mV
±200 mV
Isolation Rating
3.75 kVrms
3.75 kVrms
5.0 kVrms
5.0 kVrms
Package Type
Gull-wing DIP-8
Gull-wing DIP-8
WB SOIC-16
WB SOIC-16
Automotive Grade OPNs
Automotive-grade devices are built using automotive-specific flows at all steps in the manufacturing process to ensure robustness and
low defectivity. These devices are supported with AIAG-compliant Production Part Approval Process (PPAP) documentation, and fea-
ture International Material Data System (IMDS) and China Automotive Material Data System (CAMDS) listing. Qualifications are compli-
ant with AEC-Q100, and a zero-defect methodology is maintained throughout definition, design, evaluation, qualification, and mass pro-
duction steps.
Table 1.2. Ordering Guide for Automotive Grade OPNs
1, 2, 4, 5
New Ordering Part Number
(OPN)
Si8920BC-AP
Ordering Options
Specified Input Range
±200 mV
Isolation Rating
3.75 kVrms
Package Type
Gull-wing DIP-8
Note:
1. All packages are RoHS-compliant.
2. “Si” and “SI” are used interchangeably.
3. An "R" at the end of the part number denotes tape and reel packaging option.
4. Automotive-Grade devices (with an "–A" suffix) are identical in construction materials, topside marking, and electrical parameters
to their Industrial-Grade (with a "–I" suffix) version counterparts. Automotive-Grade products are produced utilizing full automotive
process flows and additional statistical process controls throughout the manufacturing flow. The Automotive-Grade part number is
included on shipping labels.
5. Additional Ordering Part Numbers may be available in Automotive-Grade. Please contact your local Silicon Labs sales represen-
tative for further information.
6. In Section
6.5 Top Marking: DIP8
and Section
6.6 Top Marking: 16-Pin Wide Body SOIC,
the Manufacturing Code represented by
either “RTTTTT” or “TTTTTT” contains as its first character a letter in the range N through Z to indicate Automotive-Grade.”
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Rev. 1.02 | 2
Table of Contents
1. Ordering Guide
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
2. System Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3. Current Sense Application . . . . . . . . . . . . . . . . . . . . . . . . . . 5
4. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4.1 Typical Operating Characteristics .
4.2 Regulatory Information .
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.11
.13
5. Pin Descriptions
6. Packaging
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
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.16
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.20
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6.1 Package Outline: DIP8 .
6.2 Land Pattern: DIP8 .
6.3 Package Outline: 16-Pin Wide Body SOIC .
6.4 Land Pattern: 16-Pin Wide Body SOIC
6.5 Top Marking: DIP8 .
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6.6 Top Marking: 16-Pin Wide Body SOIC.
7. Revision History
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
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Rev. 1.02 | 3
Si8920 Data Sheet
System Overview
2. System Overview
The input to the Si8920 is designed for low-voltage, differential signals. This is ideal for connection to low resistance current shunt
measurement resistors. The Si8920A has a full scale input range of ±100 mV, and the Si8920B has a full scale input range of ±200 mV.
In both cases, the internal gain is set so that the full scale output is 1.6 V.
The Si8920 modulates the analog signal in a unique way for transmission across the semiconductor based isolation barrier. The input
signal is first converted to a pulse-width modulated digital signal. For transmission across the isolation barrier, the signal is further
modulated with a high frequency carrier. On the other side of the isolation barrier, the signal is demodulated and the carrier portion is
removed. The resulting PWM signal is then used to faithfully reproduce the analog signal. This solution provides exceptional signal
bandwidth and accuracy.
VDDA
UVLO
CMOS Isolation
UVLO
VDDB
AIP
+
_
AIN
GNDA
Mod
AOP
DeMod
+
_
AON
GNDB
Figure 2.1. Functional Block Diagram
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Si8920 Data Sheet
Current Sense Application
3. Current Sense Application
In the driver circuit presented below, the Si8920 is used to amplify the voltage across the sense resistor, RSENSE, and transmit the
analog signal to the low-voltage domain across an isolation barrier. Isolation is needed because the voltage of RSENSE with respect to
ground will swing between 0 V and the high voltage rail connected to the drain of Q1.
High
Voltage Bus
Floating
Low Side
Gate Driver Gate Driver
24V Supply
Supply
3.3 to 5V
Supply
Q1
VDDA
VOA
GNDA
PWM
VDDI
GNDI
DISABLE
C5
0.1uF
VDDB
VOB
GNDB
DT
VDDI
R6
R3
1.82K
C3
0.1uF
RSENSE
R1
D1
5.6V
20
C1
10nF
C2
0.1uF
Q3
Si8234
To
Controller
C4
1
2
VDDA
VDDB
AOP
AON
GNDB
8
7
6
5
0.1uF
R4
C6
R5
R2
20
AIP
3 AIN
4
GNDA
+
_
ADC
Load
Q2
Si8920
Figure 3.1. Current Sense Application
The load in this application can be a motor winding or a similar inductive winding. In a three-phase motor drive application, this circuit
would be repeated three times, one for each phase. RSENSE should be a small resistor value to reduce power loss. However, an ex-
cessively low resistance will reduce the signal-to-noise ratio of the measurement. Si8920 offers two specified full-scale input options,
±100 mV (Si8920A) and ±200 mV (Si8920B), for optimizing the value of RSENSE.
AIP and AIN connections to the RSENSE resistor should be made as close as possible to each end of the RSENSE resistor as trace
resistance will add error to the measurement. The input to the Si8920 is differential, and the PCB traces back to the input pins should
run in parallel. This ensures that any large noise transients that occur on the high-voltage side are coupled equally to the AIP and AIN
pins and will be rejected by the Si8920 as a common-mode signal.
The amplifier bandwidth of the Si8920 is approximately 950 kHz. If further input filtering is required, a passive, differential RC low-pass
filter can be placed between RSENSE and the input pins. Values of R1 = R2 = 20 Ω and C1 = 10 nF, as shown in
Figure 4.8 Step
Response Low to High on page 11,
provides a cutoff at approximately 400 kHz. For the lowest gain error, R1 and R2 should always
be less than 33 Ω to keep the source impedance sufficiently low compared to the Si8920 input impedance.
The common-mode voltage of AIN and AIP must be greater than –0.2 V but less than 1 V with respect to GNDA. To meet this require-
ment, connect GNDA of the Si8920 to one side of the RSENSE resistor. In this example, GNDA, RSENSE, the source of Q1, and the
drain of Q2 are connected. The ground of the gate driver (Silicon Labs’ Si8234 in this circuit) is also commonly connected to the same
node.
The Q1 gate driver has a floating supply, 24 V in this example. Since the input and output of the Si8920 are galvanically isolated from
each other, separate power supplies are necessary on each side. Q3, R3, C3, and D1 make a regulator circuit for powering the input
side of the Si8920 from this floating supply. D1 establishes a voltage of 5.6 V at the base of Q3. R3 is selected to provide a Zener
current of 10 mA for D1. C3 provides filtering at the base of Q3, and the emitter output of Q3 provides approximately 5 V to VDDA. C2
is a bypass capacitor for the supply and should be placed at the VDDA pin with its return trace connecting to the GNDA connection at
RSENSE.
C4, the local bypass capacitor for the B-side of Si8920, should be placed closed to VDDB supply pin with its return close to GNDB. The
output signal at AOP and AON is differential with a nominal gain of 8.1 (Si8920B) or 16.2 (Si8920A) and common mode of 1.1 V. The
outputs are sampled by a differential input ADC. Depending on the sample rate of the ADC, an anti-aliasing filter may be required. A
simple anti-aliasing filter can be made from the passive components, R4, C6, and R5. The characteristics of this filter are dictated by
the input topology and sampling frequency of the ADC. However, to ensure the Si8920 outputs are not overloaded, R4 = R5 > 5 kΩ and
C6 can be calculated by the following equation:
C6
=
1
2 ×
π
×
(
R4
+
R5
)
×
f
3dB
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