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74LVCH16373ADGG,11: 产品描述IC TRANSP LATCH TRI-ST 48TSSOP; 产品类别逻辑逻辑; 文件大小800KB，共17页; 制造商Nexperia; 官网地址https://www.nexperia.com

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74LVCH16373ADGG,11概述

IC TRANSP LATCH TRI-ST 48TSSOP

74LVCH16373ADGG,11规格参数

参数名称	属性值
Brand Name	Nexperia
厂商名称	Nexperia
零件包装代码	TSSOP
包装说明	TSSOP,
针数	48
制造商包装代码	SOT362-1
Reach Compliance Code	compliant
Factory Lead Time	13 weeks
Samacsys Confidence	2
Samacsys Status	Released
Samacsys PartID	5001668
Samacsys Pin Count	48
Samacsys Part Category	Integrated Circuit
Samacsys Package Category	Small Outline Packages
Samacsys Footprint Name	SOT362-1 (TSSOP48)
Samacsys Released Date	2019-11-14 11:29:39
Is Samacsys	N
其他特性	IT ALSO OPERATES AT 1.65 TO 3.6V
系列	LVC/LCX/Z
JESD-30 代码	R-PDSO-G48
JESD-609代码	e4
长度	12.5 mm
逻辑集成电路类型	BUS DRIVER
湿度敏感等级	1
位数	8
功能数量	2
端口数量	2
端子数量	48
最高工作温度	125 °C
最低工作温度	-40 °C
输出特性	3-STATE
输出极性	TRUE
封装主体材料	PLASTIC/EPOXY
封装代码	TSSOP
封装形状	RECTANGULAR
封装形式	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
传播延迟（tpd）	14.4 ns
座面最大高度	1.2 mm
最大供电电压 (Vsup)	3.6 V
最小供电电压 (Vsup)	1.2 V
标称供电电压 (Vsup)	1.8 V
表面贴装	YES
技术	CMOS
温度等级	AUTOMOTIVE
端子面层	Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式	GULL WING
端子节距	0.5 mm
端子位置	DUAL
宽度	6.1 mm
Base Number Matches	1

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74LVC16373A; 74LVCH16373A

16-bit D-type transparent latch with 5 V tolerant

inputs/outputs; 3-state

Rev. 8 — 6 January 2014

Product data sheet

1. General description

The 74LVC16373A and 74LVCH16373A are 16-bit D-type transparent latches featuring

separate D-type inputs with bus hold (74LVCH16373A only) for each latch and 3-state

outputs for bus-oriented applications. One Latch Enable (LE) input and one Output Enable

(OE) are provided for each octal. Inputs can be driven from either 3.3 V or 5 V devices.

When disabled, up to 5.5 V can be applied to the outputs. These features allow the use of

these devices in mixed 3.3 V and 5 V applications.

The device consists of two sections of eight D-type transparent latches with 3-state true

outputs. When LE is HIGH, data at the Dn inputs enter the latches. In this condition, the

latches are transparent, that is, the latch outputs change each time its corresponding

D-input changes. The latches store the information that was present at the D-inputs one

set-up time (t

) preceding the HIGH-to-LOW transition of LE. When OE is LOW, the

contents of the eight latches are available at the outputs. When OE is HIGH, the outputs

go to the high impedance OFF-state. Operation of the OE input does not affect the state of

the latches. Bus hold on the data inputs eliminates the need for external pull-up resistors

to hold unused inputs.

2. Features and benefits



5 V tolerant inputs/outputs for interfacing with 5 V logic

Wide supply voltage range from 1.2 V to 3.6 V

CMOS low power consumption

Multibyte flow-through standard pinout architecture

Multiple low inductance supply pins for minimum noise and ground bounce

Direct interface with TTL levels

All data inputs have bus hold (74LVCH16373A only)

High-impedance when V

= 0 V

Complies with JEDEC standard:



JESD8-7A (1.65 V to 1.95 V)



JESD8-5A (2.3 V to 2.7 V)



JESD8-C/JESD36 (2.7 V to 3.6 V)



ESD protection:



HBM JESD22-A114F exceeds 2000 V



MM JESD22-A115-B exceeds 200 V



CDM JESD22-C101E exceeds 1000 V



Specified from

40 C

to +85

C

and

40 C

to +125

C

74LVCH16373ADGG,11相似产品对比

	74LVCH16373ADGG,11	74LVC16373ADL,118	74LVC16373ADL,112	74LVCH16373ADL,112	74LVC16373ADGG,118	74LVCH16373ADGG:11	74LVCH16373ADL,118
描述	IC TRANSP LATCH TRI-ST 48TSSOP	IC 16BIT D TRANSP LATCH 48SSOP	IC TRANS D-TYPE LATCH 3ST 48SSOP	IC 16BIT BUS TXRX 48SSOP	IC TRANS D-TYP LATCH 3ST 48TSSOP	IC TRANSP LATCH TRI-ST 48TSSOP	IC 16BIT BUS TXRX 48SSOP
Brand Name	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia
厂商名称	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia	Nexperia
零件包装代码	TSSOP	SSOP	SSOP	SSOP	TSSOP	TSSOP	SSOP
包装说明	TSSOP,	7.50 MM, PLASTIC, MO-118, SOT-370-1, SSOP-48	7.50 MM, PLASTIC, MO-118, SOT-370-1, SSOP-48	7.50 MM, PLASTIC, MO-118, SOT-370-1, SSOP-48	TSSOP,	TSSOP,	7.50 MM, PLASTIC, MO-118, SOT-370-1, SSOP-48
针数	48	48	48	48	48	48	48
制造商包装代码	SOT362-1	SOT370-1	SOT370-1	SOT370-1	SOT362-1	SOT362-1	SOT370-1
Reach Compliance Code	compliant	compliant	compliant	compliant	compliant	compliant	compliant
Is Samacsys	N	N	N	N	N	N	N
系列	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z	LVC/LCX/Z
JESD-30 代码	R-PDSO-G48	R-PDSO-G48	R-PDSO-G48	R-PDSO-G48	R-PDSO-G48	R-PDSO-G48	R-PDSO-G48
长度	12.5 mm	15.875 mm	15.875 mm	15.875 mm	12.5 mm	12.5 mm	15.875 mm
逻辑集成电路类型	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER	BUS DRIVER
位数	8	8	8	8	8	8	8
功能数量	2	2	2	2	2	2	2
端口数量	2	2	2	2	2	2	2
端子数量	48	48	48	48	48	48	48
最高工作温度	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C	125 °C
最低工作温度	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C	-40 °C
输出特性	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
输出极性	TRUE	TRUE	TRUE	TRUE	TRUE	TRUE	TRUE
封装主体材料	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
封装代码	TSSOP	SSOP	SSOP	SSOP	TSSOP	TSSOP	SSOP
封装形状	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
封装形式	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH
传播延迟（tpd）	14.4 ns	7 ns	7 ns	7 ns	7 ns	14.4 ns	7 ns
座面最大高度	1.2 mm	2.8 mm	2.8 mm	2.8 mm	1.2 mm	1.2 mm	2.8 mm
最大供电电压 (Vsup)	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V	3.6 V
最小供电电压 (Vsup)	1.2 V	1.2 V	1.2 V	1.2 V	1.2 V	1.2 V	1.2 V
标称供电电压 (Vsup)	1.8 V	2.7 V	2.7 V	2.7 V	2.7 V	1.8 V	2.7 V
表面贴装	YES	YES	YES	YES	YES	YES	YES
技术	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
温度等级	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE	AUTOMOTIVE
端子形式	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING	GULL WING
端子节距	0.5 mm	0.635 mm	0.635 mm	0.635 mm	0.5 mm	0.5 mm	0.635 mm
端子位置	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
宽度	6.1 mm	7.5 mm	7.5 mm	7.5 mm	6.1 mm	6.1 mm	7.5 mm
Base Number Matches	1	1	1	1	1	1	1
Samacsys Confidence	2	2	2	-	2	2	-
Samacsys Status	Released	Released	Released	-	Released	Released	-
Samacsys PartID	5001668	1264231	1264233	-	280070	1153525	-
Samacsys Pin Count	48	48	48	-	48	48	-
Samacsys Part Category	Integrated Circuit	Integrated Circuit	Integrated Circuit	-	Integrated Circuit	Integrated Circuit	-
Samacsys Package Category	Small Outline Packages	Small Outline Packages	Small Outline Packages	-	Small Outline Packages	Small Outline Packages	-
Samacsys Footprint Name	SOT362-1 (TSSOP48)	SSOP48	SSOP48	-	SOT362-1 (TSSOP48)	SOT362-1 (TSSOP48)	-
Samacsys Released Date	2019-11-14 11:29:39	2019-11-12 07:41:52	2019-11-12 07:41:52	-	2019-11-12 07:41:52	2019-11-12 07:41:52	-
JESD-609代码	e4	e4	e4	e4	e4	-	e4
湿度敏感等级	1	1	1	1	1	-	1
端子面层	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	Nickel/Palladium/Gold (Ni/Pd/Au)	-	Nickel/Palladium/Gold (Ni/Pd/Au)
是否Rohs认证	-	符合	符合	符合	-	-	符合
峰值回流温度（摄氏度）	-	260	260	260	NOT SPECIFIED	NOT SPECIFIED	260
处于峰值回流温度下的最长时间	-	30	30	30	NOT SPECIFIED	NOT SPECIFIED	30

74LVCH16373ADGG,11

74LVCH16373ADGG,11概述

74LVCH16373ADGG,11规格参数

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