电子工程世界电子工程世界电子工程世界

关键词

搜索

型号

搜索

LT3992IUH#TRPBF

产品描述IC REG BUCK ADJ 3A DL 38-QFN
产品类别半导体    电源管理   
文件大小218KB,共6页
制造商Linear ( ADI )
官网地址http://www.analog.com/cn/index.html
标准
下载文档 详细参数 全文预览

LT3992IUH#TRPBF概述

IC REG BUCK ADJ 3A DL 38-QFN

LT3992IUH#TRPBF规格参数

参数名称属性值
功能降压
输出配置
拓扑降压
输出类型可调式
输出数2
电压 - 输入(最小值)3V
电压 - 输入(最大值)60V
电压 - 输出(最小值/固定)0.8V
电压 - 输出(最大值)57V
电流 - 输出3A
频率 - 开关110kHz ~ 2.5MHz
同步整流器
工作温度-40°C ~ 125°C (TJ)
安装类型表面贴装
封装/外壳32-WFQFN 裸露焊盘
供应商器件封装32-QFN(5x5)

文档预览

下载PDF文档
DEMO MANUAL DC1537A
LT3992A
Monolithic Dual Tracking 3A
Step-Down Switching Regulator
DESCRIPTION
The demo circuit 1537A is a dual current mode PWM
step-down DC/DC converter featuring LT
®
3992. The demo
circuit is designed for 5V and 3.3V outputs from a 7V to
60V input. The current capability of each channel is up to 3A
when running individually and 2A when both are sourcing
the same current without special heat sinking. Individual
soft-start, current limit, comparator, input voltage for each
output as well as frequency division and synchronous
and clock output functions simplify the complex design
of dual-output power converters
Both converters are synchronized to either a common
external clock input or a resistor programmable 250kHz to
2MHz internal oscillator. At all frequencies, a 180° phase
shift between channels is maintained, reducing voltage
ripple. Programmable frequency allows optimization be-
tween efficiency and external component size. Each output
can be independently disabled using its own SHDN pin
and be placed in a low quiescent current shutdown mode.
The LT3992 data sheet gives complete description of the
device, operation and application information. The data
sheet must be read in conjunction with this quick start
guide for demo circuit 1537A.
Design files for this circuit board are available at
http://www.linear.com/demo
100
95
90
EFFICIENCY (%)
85
80
75
70
65
V
OUT1
= 5V
V
OUT2
= 3.3V
60
0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3.0
LOAD CURRENT FOR SIGNAL CHANNEL (A)
DC1537a F01
Figure 1. Single Channel Efficiency at V
IN
= 24V,
f = 300kHz
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
PERFORMANCE SUMMARY
PARAMETER
Minimum Input Voltage
Maximum Input Voltage
Specifications are at T
A
= 25°C.
VALUE
7V
60V (For Transient. Continuous Operation
if D3 and D4 Are Replaced with Higher
Voltage Rated Schottky Diodes)
CONDITIONS
Output Voltage V
OUT1
Output Voltage V
OUT2
Switching Frequency
Maximum Output Current I
OUT1
Maximum Output Current I
OUT2
Voltage Ripple V
OUT1
Voltage Ripple V
OUT2
V
IN
= 7~ 60V
V
IN
= 7~ 60V
V
IN
= 7~ 60V
V
IN
= 7~ 60V
V
IN
= 12V, I
OUT1
= 3A
V
IN
= 12V, I
OUT2
= 3A
5.0V ±3%
3.3V ±3%
300kHz ±10%
3A Individually, 2A Both Running
3A Individually, 2A Both Running
<20mV
<20mV
dc1537af
1
系统共享
虚拟机共享终于成功了 本帖最后由 wuquan-1230 于 2010-3-21 09:24 编辑 ]...
wuquan-1230 嵌入式系统
有关USB接口HID设备的通讯问题
http://topic.eeworld.net/u/20090220/17/0618432f-cc0b-4e4e-91fa-a55e5ce8856d.html 之前的发错版块了,重发一下! 之前发过帖子,也在网上下过代码,几经修改之后, 终于可以读取HID设 ......
cy214 嵌入式系统
EEWORLD大学堂----正确测试MLCC
正确测试MLCC:https://training.eeworld.com.cn/course/4830你有没有遇到过这种情况——MLCC(多层陶瓷电容)测量值要么较低,要么超出规格。 其实,很可能你在做测试时的第一步就走错了…… ......
老白菜 测试/测量
EPLD要替代, 该怎么验证
公司有个很老的产品要做EPLD替代, 已经选好替代品, 请问该怎么验证或者测试呢? ...
hnui FPGA/CPLD
3G Android移动开发名家大讲堂(12月19日Google北京总部
作为目前最流行的Linux开源平台,Google公司的Android手机操作系统,在2007年11月推出后,即受到了广大技术爱好者的普遍关注。凭借其开放性和优异性,Android平台在发展的过程中也得到了包括大 ......
bjfarsighttop 嵌入式系统

 
EEWorld订阅号

 
EEWorld服务号

 
汽车开发圈

 
机器人开发圈

About Us 关于我们 客户服务 联系方式 器件索引 网站地图 最新更新 手机版

站点相关: 大学堂 TI培训 Datasheet 电子工程 索引文件: 1735  951  899  1059  2614  35  20  19  22  53 

器件索引   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

北京市海淀区中关村大街18号B座15层1530室 电话:(010)82350740 邮编:100190

电子工程世界版权所有 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号 Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved