AR0134CS
1/3‐inch 1.2 Mp CMOS
Digital Image Sensor
with Global Shutter
Description
The AR0134CS from ON Semiconductor is a 1/3-inch 1.2 Mp
CMOS digital image sensor with an active-pixel array of 1280 (H)
×
960 (V). It is designed for low light performance and features a global
shutter for accurate capture of moving scenes. It includes sophisticated
camera functions such as auto exposure control, windowing, scaling,
row skip mode, and both video and single frame modes. It is
programmable through a simple two-wire serial interface. The
AR0134CS produces extraordinarily clear, sharp digital pictures, and
its ability to capture both continuous video and single frames makes it
the perfect choice for a wide range of applications, including scanning
and industrial inspection.
Table 1. KEY PERFORMANCE PARAMETERS
Parameter
Optical Format
Active Pixels
Pixel Size
Color Filter Array
Shutter Type
Input Clock Range
Output Pixel Clock (Maximum)
Output
Serial
Parallel
Frame Rate
Full Resolution
720p
Responsivity
Monochrome
Color
SNR
MAX
Dynamic Range
Supply Voltage
I/O
Digital
Analog
HiSPi
Power Consumption
Operating Temperature
Package Options
Typical Value
1/3-inch (6 mm)
1280 (H)
×
960 (V) = 1.2 Mp
3.75
mm
RGB Bayer or Monochrome
Global Shutter
6–50 MHz
74.25 MHz
HiSPi
12-bit
54 fps
60 fps
6.1 V/lux−sec
5.3 V/lux−sec
38.6 dB
64 dB
1.8 or 2.8 V
1.8 V
2.8 V
0.4 V
< 400 mW
–30°C to + 70°C (Ambient)
–30°C to + 80°C (Junction)
9
×
9 mm 63-pin iBGA
10
×
10 mm 48-pin iLCC
Bare Die
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IBGA63 9
y
9
CASE 503AG
ILCC48 10
y
10
CASE 847AE
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
Features
•
ON Semiconductor’s 3
rd
Generation Global
•
•
•
•
•
•
•
•
•
Shutter Technology
Superior Low-light Performance
HD Video (720p60)
Video/Single Frame Mode
Flexible Row-skip Modes
On-chip AE and Statistics Engine
Parallel and Serial Output
Support for External LED or Flash
Auto Black Level Calibration
Context Switching
Applications
•
Scene Processing
•
Scanning and Machine Vision
•
720p60 Video Applications
©
Semiconductor Components Industries, LLC, 2012
1
March, 2017 − Rev. 9
Publication Order Number:
AR0134CS/D
AR0134CS
ORDERING INFORMATION
Table 2. ORDERABLE PART NUMBERS
Part Number
AR0134CSSM25SUEA0
AR0134CSSM00SUEA0
AR0134CSSM00SUEAH
AR0134CSSM00SUEAD
AR0134CSSC00SUEA0
AR0134CSSC00SUEAH
AR0134CSSC00SUEAD
AR0134CSSM00SPCA0
AR0134CSSM25SPCA0
AR0134CSSC00SPCA0
AR0134CSSC00SPD20
AR0134CSSM00SPD20
AR0134CSSM25SPD20
Mono, iBGA, 25° Shift
Mono, iBGA
Mono, iBGA, Head Board
Mono, iBGA, Demo Kit
Color, iBGA
Color, iBGA, Head Board
Color, iBGA, Demo Kit
Mono, iLCC (Parallel)
Mono, iLCC (Parallel), 25° Shift
Color, iLCC (Parallel)
Color, Bare Die
Mono, Bare Die
Mono, Bare Die, 25° Shift
Description
See the ON Semiconductor Device Nomenclature
document (TND310/D) for a full description of the naming
convention used for image sensors. For reference
GENERAL DESCRIPTION
The ON Semiconductor AR0134CS can be operated in its
default mode or programmed for frame size, exposure, gain,
and other parameters. The default mode output is
a full-resolution image at 54 frames per second (fps). It
outputs 12-bit raw data, using either the parallel or serial
(HiSPi) output ports. The device may be operated in video
(master) mode or in frame trigger mode.
FRAME_VALID and LINE_VALID signals are output on
dedicated pins, along with a synchronized pixel clock.
FUNCTIONAL OVERVIEW
The AR0134CS is a progressive-scan sensor that
generates a stream of pixel data at a constant frame rate. It
uses an on-chip, phase-locked loop (PLL) that can be
optionally enabled to generate all internal clocks from a
documentation, including information on evaluation kits,
please visit our web site at
www.onsemi.com.
A dedicated FLASH pin can be programmed to control
external LED or flash exposure illumination.
The AR0134CS includes additional features to allow
application-specific tuning: windowing, adjustable
auto-exposure control, auto black level correction, on-board
temperature sensor, and row skip and digital binning modes.
The sensor is designed to operate in a wide temperature
range (–30°C to +70°C).
single master input clock running between 6 and 50 MHz.
The maximum output pixel rate is 74.25 Mp/s,
corresponding to a clock rate of 74.25 MHz. Figure 1 shows
a block diagram of the sensor.
Temperature
Sensor
Active Pixel Sensor
(APS)
Array
OTPM
Memory
PLL
External
Clock
Power
Timing and Control
(Sequencer)
Auto Exposure
and Stats Engine
Serial
Output
Trigger
Two-wire
Serial
Interface
Analog Processing and
A/D Conversion
Pixel Data Path
(Signal Processing)
Parallel
Output
Flash
Control Registers
Figure 1. Block Diagram
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2
AR0134CS
User interaction with the sensor is through the two-wire
serial bus, which communicates with the array control,
analog signal chain, and digital signal chain. The core of the
sensor is a 1.2 Mp Active-Pixel Sensor array. The
AR0134CS features global shutter technology for accurate
capture of moving images. The exposure of the entire array
is controlled by programming the integration time by
register setting. All rows simultaneously integrate light prior
to readout. Once a row has been read, the data from the
FEATURES OVERVIEW
The AR0134CS Global Sensor shutter has a wide array of
features to enhance functionality and to increase versatility.
A summary of features follows. Please refer to the
AR0134CS Developer Guide for detailed feature
descriptions, register settings, and tuning guidelines and
recommendations.
•
Operating Modes
The AR0134CS works in master (video), trigger (single
frame), or Auto Trigger modes. In master mode, the
sensor generates the integration and readout timing.
In trigger mode, it accepts an external trigger to start
exposure, then generates the exposure and readout
timing. The exposure time is programmed through the
two-wire serial interface for both modes. Trigger mode
is not compatible with the HiSPi interface.
•
Window Control
Configurable window size and blanking times allow
a wide range of resolutions and frame rates. Digital
binning and skipping modes are supported, as are
vertical and horizontal mirror operations.
•
Context Switching
Context switching may be used to rapidly switch
between two sets of register values. Refer to the
AR0134CS Developer Guide for a complete set of
context switchable registers.
•
Gain
The AR0134CS Global Shutter sensor can be
configured for analog gain of up to 8x, and digital gain
of up to 8x.
•
Automatic Exposure Control
The integrated automatic exposure control may be used
to ensure optimal settings of exposure and gain are
computed and updated every other frame. Refer to the
AR0134CS Developer Guide for more details.
•
HiSPi
The AR0134CS Global Shutter image sensor supports
two or three lanes of Streaming-SP or Packetized-SP
protocols of ON Semiconductor’s High-Speed Serial
Pixel Interface.
•
PLL
An on chip PLL provides reference clock flexibility and
supports spread spectrum sources for improved EMI
performance.
columns is sequenced through an analog signal chain
(providing offset correction and gain), and then through an
analog-to-digital converter (ADC). The output from the
ADC is a 12-bit value for each pixel in the array. The ADC
output passes through a digital processing signal chain
(which provides further data path corrections and applies
digital gain). The pixel data are output at a rate of up to
74.25 Mp/s, in parallel to frame and line synchronization
signals.
•
Reset
•
•
The AR0134CS may be reset by a register write, or by
a dedicated input pin.
Output Enable
The AR0134CS output pins may be tri-stated using
a dedicated output enable pin.
Temperature Sensor
The temperature sensor is only guaranteed to be
functional when the AR0134CS is initially powered-up
or is reset at temperatures at or above 0°C.
Black Level Correction
Row Noise Correction
Column Correction
Test Patterns
Several test patterns may be enabled for debug
purposes. These include a solid color, color bar, fade to
grey, and a walking 1s test pattern.
•
•
•
•
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3
AR0134CS
PIXEL DATA FORMAT
Pixel Array Structure
The AR0134CS pixel array is configured as 1412 columns
by 1028 rows, (see Figure 2). The dark pixels are optically
black and are used internally to monitor black level. Of the
right 108 columns, 64 are dark pixels used for row noise
correction. Of the top 24 rows of pixels, 12 of the dark rows
are used for black level correction. There are 1296 columns
by 976 rows of optically active pixels. While the sensor’s
1412
format is 1280
×
960, the additional active columns and
active rows are included for use when horizontal or vertical
mirrored readout is enabled, to allow readout to start on the
same pixel. The pixel adjustment is always performed for
monochrome or color versions. The active area is
surrounded with optically transparent dummy pixels to
improve image uniformity within the active area. Not all
dummy pixels or barrier pixels can be read out.
1028
2 Light Dummy +
4 Barrier +
24 Dark +
4 Barrier +
6 Dark Dummy
2 Light Dummy +
4 Barrier +
100 Dark +
4 Barrier
1296
×
976 (1288
×
968 Active)
4.86
×
3.66 mm
2
(4.83
×
3.63 mm
2
)
2 Light Dummy +
4 Barrier +
6 Dark Dummy
2 Light Dummy +
4 Barrier
Dark Pixel
Barrier Pixel
Light Dummy
Pixel
Active Pixel
Figure 2. Pixel Array Description
Column Readout Direction
…
Active Pixel (0, 0)
Array Pixel (110, 40)
Row Readout Direction
R
G
R
G
R
G
B
G
B
G
…
R
G
R
G
R
G
B
G
B
G
R
G
R
G
R
G
B
G
B
G
G
R
G
B
G
B
G
R
G
B
G
B
G
R
G
B
G
B
Figure 3. Pixel Color Pattern Detail (Top Right Corner)
Default Readout Order
By convention, the sensor core pixel array is shown with
the first addressable (logical) pixel (0,0) in the top right
corner (see Figure 3). This reflects the actual layout of the
array on the die. Also, the physical location of the first pixel
data read out of the sensor in default condition is that of pixel
(110, 40).
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4
AR0134CS
CONFIGURATION AND PINOUT
The figures and tables below show a typical configuration
for the AR0134CS image sensor and show the package
pinouts.
Digital
I/O
Power
1
Digital
Core
Power
1
HiSPi
Power
1
PLL
Power
1
Analog
Power
1
Analog
Power
1
1.5 kW
2, 3
1.5 kW
2
V
DD
_IO
V
DD
V
DD
_SLVS
V
DD
_PLL
V
AA
V
AA
_PIX
SLVS0_P
SLVS0_N
SLVS1_P
Master Clock
(6−50 MHz)
EXTCLK
SLVS1_N
SLVS2_P
SLVS2_N
From
Controller
S
DATA
S
CLK
OE_BAR
STANDBY
RESET_BAR
SLVS3_P
SLVS3_N
7
7
To Controller
SLVSC_P
SLVSC_N
FLASH
TEST
D
GND
A
GND
Digital
Ground
V
DD
_IO
V
DD
V
DD
_SLVS
V
DD
_PLL
Analog
Ground
V
AA
V
AA
_PIX
Notes:
1. All power supplies must be adequately decoupled.
2. ON Semiconductor recommends a resistor value of 1.5 kW, but a greater value may be used for slower two-wire speed.
3. This pull-up resistor is not required if the controller drives a valid logic level on S
CLK
at all times.
4. The parallel interface output pads can be left unconnected if the serial output interface is used.
5. ON Semiconductor recommends that 0.1
mF
and 10
mF
decoupling capacitors for each power supply are mounted as close as possible
to the pad. Actual values and results may vary depending on the layout and design considerations. Refer to the AR0134CS demo head-
board schematics for circuit recommendations.
6. ON Semiconductor recommends that analog power planes be placed in a manner such that coupling with the digital power planes is mini-
mized.
7. Although 4 serial lanes are shown, the AR0134CS supports only 2- or 3-lane HiSPi.
Figure 4. Serial 4-lane HiSPi Interface
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