FEATURES
s
s
LT1568
Very Low Noise,
High Frequency Active RC,
Filter Building Block
DESCRIPTIO
The LT
®
1568 is an easy-to-use, active-RC filter building
block with rail-to-rail inputs and outputs. The internal ca-
pacitors of the IC and the GBW product of the internal low
noise op amps are trimmed such that consistent and repeat-
able filter responses can be achieved. With a single resis-
tor value, the LT1568 provides a pair of
matched
2-pole
Butterworth lowpass filters with unity gain suitable for I/Q
channels.
By using unequal-valued external resistors, the two 2-pole
sections can create different frequency responses or
gains. In addition, the two stages may be cascaded to
create a single 4-pole filter with a programmable re-
sponse. Capable of cutoff frequencies up to 10MHz, the
LT1568 is ideal for antialiasing or channel filtering in high
speed data communications systems. The LT1568 can
also be used as a bandpass filter.
The LT1568 features very low noise, supporting signal-to-
noise ratios of over 90dB. It also provides single-ended to
differential signal conversion for directly driving high
speed A/D converters. The LT1568 has a shutdown mode
that reduces supply current to approximately 0.5mA on a
5V supply.
The LT1568 is available in a narrow 16-lead SSOP
package.
, LTC and LT are registered trademarks of Linear Technology Corporation.
s
s
s
s
s
s
s
s
s
Up to 10MHz Center Frequency on a Single 3V
Supply
Easy to Use—A Single Resistor Value Sets Lowpass
Cutoff Frequency (200kHz
≤ ƒ
C
≤
5MHz), Unequal
Resistor Values Extend Cutoff Frequency Up to
10MHz
Extremely Flexible—Different Resistor Values
Allow Lowpass Transfer Functions with or Without
Gain (Butterworth, Chebyshev or Custom)
SNR = 92dB (ƒ
C
= 2MHz, 2V
P-P
)
THD = –84dB (ƒ
C
= 2MHz, 1V
P-P
)
Internal Capacitors Trimmed to
±0.75%
Single 4-Pole Lowpass Filter or
Matched Pair
of
2-Pole Lowpass Filters
Can be Connected as a Bandpass Filter
Single-Ended or Differential Output
Operates from Single 3V (2.7V Min) to
±5V
Supply
Rail-to-Rail Input and Output Voltages
APPLICATIO S
s
s
s
s
s
Replaces Discrete RC Active Filters and LC Filter
Modules
Antialiasing/Reconstruction Filters
Dual or I-and-Q Channels (Two Matched 2nd Order
Filters in One Package)
Single-Ended to Differential Conversion
Video Signal Processing
TYPICAL APPLICATIO
3V
0.1µF
1
511Ω
V
INA
V
OUTA
V
OUTA
511Ω
511Ω
2
3
4
5
6
0.1µF 7
8
Amplitude and Phase Matched Dual Butterworth 2.5MHz Lowpass
Filter with Differential Output. Single 3V Supply Operation
16
V
+
LT1568
15
INVA
INVB
14
SA
SB
13
OUTA
OUTB
12
OUTA
OUTB
11
GNDA GNDB
10
NC
EN
9
V
–
V
–
V
+
Amplitude Response
3
0
–3
511Ω
511Ω
GAIN (dB)
–6
V
INB
V
OUTB
511Ω
V
OUTB
THE PROPRIETARY ARCHITECTURE
ALLOWS FOR A SIMPLE RESISTOR
CALCULATION:
10MHz
R = 128Ω •
;
ƒ
C
= CUTOFF FREQUENCY
ƒ
C
–9
–12
–15
–18
–21
–24
–27
100k
1M
FREQUENCY (Hz)
10M
1568 TA02
1568 TA01
U
U
U
1568f
1
LT1568
ABSOLUTE
(Note 1)
AXI U
RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW
V
+
INVA
SA
OUTA
OUTA
GNDA
NC
V
–
1
2
3
4
5
6
7
8
16 V
+
15 INVB
14 SB
13 OUTB
12 OUTB
11 GNDB
10 EN
9
V
–
Total Supply Voltage (V
+
to V
–
) ........................... 11.6V
Input Voltage on INVA, INVB, GNDA and
GNDB Pins ....................................................... V
+
to V
–
Input Current on INVA, INVB, GNDA and
GNDB Pins (Note 2) ...........................................
±10mA
Output Short-Circuit Duration on OUTA, OUTB, OUTA
and OUTB Pins ............................................... Indefinite
Maximum Continuous Output Current (Note 3)
DC ...............................................................
±100mA
Specified Temperature Range (Note 9)
LT1568C ............................................ – 40°C to 85°C
LT1568I ............................................. – 40°C to 85°C
Junction Temperature .......................................... 150°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
ORDER PART
NUMBER
LT1568CGN
LT1568IGN
GN PART
MARKING
1568
1568I
GN PACKAGE
16-LEAD PLASTIC SSOP
T
JMAX
= 150°C,
θ
JA
= 135°C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
SYMBOL
V
S
I
S
PARAMETER
Total Supply Voltage
Supply Current
The
q
denotes the specifications which apply over the full operating
temperature range, otherwise specifications and typical values are at T
A
= 25°C. V
S
= single 5V, EN pin to logic “low,” R
L
= 400Ω,
connected to midsupply, R
FIL
= R11 = R21 = R31 = R12 = R22 = R32, unless otherwise noted (see Block Diagram).
CONDITIONS
q
MIN
2.7
q
q
q
q
q
q
q
q
q
q
q
q
q
q
TYP
24
26
28
0.3
0.5
1.0
MAX
11
35
36
38
1.0
1.3
2.5
UNITS
V
mA
mA
mA
mA
mA
mA
V
V
V
V
V
S
= 3V
V
S
= 5V
V
S
=
±5V
V
S
= 3V, V
EN
= 2.4V
V
S
= 5V, V
EN
= 4.4V
V
S
=
±5V,
V
EN
= 4.4V
V
S
= 3V, R
FIL
= 1.28k, R
L
= 1k
V
S
= 5V, R
FIL
= 1.28k, R
L
= 1k
V
S
= 5V, R
FIL
= 128Ω, R
L
= 400Ω
V
S
=
±5V,
R
FIL
= 1.28k, R
L
= 1k
V
S
= 3V, R
FIL
= 1.28k, R
L
= 1k
V
S
= 5V, R
FIL
= 1.28k, R
L
= 1k
V
S
= 5V, R
FIL
= 128Ω, R
L
= 400Ω
V
S
=
±5V,
R
FIL
= 1.28k, R
L
= 1k
V
S
= 3V
V
S
= 5V
V
S
=
±5V
V
S
= 3V
V
S
= 5V
V
S
=
±5V
Shutdown Supply Current
Output Voltage Swing High
(OUTA, OUTA, OUTB, OUTB Pins)
2.75
4.60
4.50
4.60
2.85
4.80
4.65
4.75
0.05
0.07
0.20
±80
0.12
0.15
0.40
–4.7
1.5
2.5
4.5
7.0
4.5
2.0
Output Voltage Swing Low
(OUTA, OUTA, OUTB, OUTB Pins)
I
OUT
Maximum Output Current
Op Amp Input Offset Voltage
q
q
q
q
q
q
–2.5
–2.5
–2.0
–2
–10
–12
–0.5
0.2
1.2
2.5
0.6
–4.0
Inverter Output Offset Voltage
2
U
V
V
V
V
mA
mV
mV
mV
mV
mV
mV
1568f
W
U
U
W W
W
LT1568
ELECTRICAL CHARACTERISTICS
SYMBOL
I
B
PARAMETER
Op Amp Input Bias Current
The
q
denotes the specifications which apply over the full operating
temperature range, otherwise specifications and typical values are at T
A
= 25°C. V
S
= single 5V, EN pin to logic “low,” R
L
= 400Ω,
connected to midsupply, R
FIL
= R11 = R21 = R31 = R12 = R22 = R32, unless otherwise noted (see Block Diagram).
CONDITIONS
V
S
= 3V
V
S
= 5V
V
S
=
±5V
Frequency = DC
Frequency = 2MHz
Frequency = 10MHz
Frequency = DC
Frequency = 2MHz
Frequency = 10MHz
q
q
q
MIN
TYP
0.5
0.4
–0.2
55
MAX
2
2
2
0.2
UNITS
µA
µA
µA
MHz
dB
dB
dB
DEG
DEG
DEG
V/µs
V
V
V
Inverter Bandwidth (Note 4)
Inverter Gain (Sections A and B, Note 5)
q
–0.2
0.01
0.01
0.27
180
179
176
53
Inverter Phase Shift (Sections A and B,
Note 5)
SR
V
CM
Slew Rate (OUTA, OUTB, OUTA,
OUTB) Pins
Common Mode Input Voltage Range
(GNDA and GNDB Pins, Note 6)
Single Supply GND Reference Voltage
V
IL
V
IH
t
DIS
t
EN
EN Input Logic Low Level
EN Input Logic High Level
EN Input Pull-Up Resistor
Disable (Shutdown) Time
Enable (Start-Up) Time
V
S
= 3V
V
S
=
±5V
V
S
= 5V, GNDA Tied to GNDB
V
S
= 3V, 5V or
±5V
V
S
= 3V, 5V or
±5V
EN Pin Steps from 0V to V
+
EN Pin Steps from V
+
to 0V
q
q
1 to 1.9
–3.4 to 2.7
2.5
V
+
– 2.1
V
+
– 0.6
30
40
20
100
V
V
kΩ
µs
µs
FILTER ELECTRICAL CHARACTERISTICS
Specifications are for the output (OUTA or OUTB) of a
single 2nd order section
(A or B) with respect to V
GND
= V
GNDA
= V
GNDB
,
gain = –1, R
FIL
= R11 = R21 = R31 = R12 = R22 = R32, (see Block Diagram). The
q
denotes the specifications which apply over the
full operating temperature range, otherwise specifications and typical values are at T
A
= 25°C. V
S
= single 5V, EN pin to logic “low,”
R
L
= 400Ω, unless otherwise noted.
SYMBOL
ADC
V
OS(OUT)
PARAMETER
DC Gain
DC Offset Voltage
(V
OUTA
– V
GNDA
) or (V
OUTB
– V
GNDB
)
DC Offset Voltage Mismatch
(V
OUTA
– V
GNDA
) – (V
OUTB
– V
GNDB
)
Cutoff Frequency Range (Note 7)
Cutoff Frequency Temperature Coefficient
V
S
= 3V, f
C
= 1MHz, R
FIL
= 1.28k
V
S
= 5V, f
C
= 1MHz, R
FIL
= 1.28k
V
S
=
±5V,
f
C
= 1MHz, R
FIL
= 1.28k
V
S
= 3V, f
C
= 1MHz, R
FIL
= 1.28k
V
S
= 5V, V
S
=
±5V,
f
C
= 1MHz, R
FIL
= 1.28k
V
S
= 3V, V
S
= 5V, V
S
=
±5V
CONDITIONS
q
q
q
q
q
q
MIN
–1.01
–5
–10
–12
–8
–10
0.2
TYP
–1
2.6
0.6
–4.0
±4
±4
MAX
–0.99
15
10
4
8
10
10
UNITS
V/V
mV
mV
mV
mV
mV
MHz
ppm/°C
∆V
OS(OUT)
Transfer Function Characteristics for Each Section (A or B) to Single-Ended Output (OUTA or OUTB)
f
C
TC
q
q
±1
1568f
3
LT1568
FILTER ELECTRICAL CHARACTERISTICS
Specifications are for the output
(OUTA or OUTB) of a single 2nd order section
(A or B) with respect to V
GND
= V
GNDA
= V
GNDB
,
gain = –1, R
FIL
= R11 = R21 = R31 = R12 = R22 = R32, (see Block Diagram). The
q
denotes the specifications which apply over the
full operating temperature range, otherwise specifications and typical values are at T
A
= 25°C. V
S
= single 5V, EN pin to logic “low,”
R
L
= 400Ω connected to midsupply, unless otherwise noted.
SYMBOL
PARAMETER
Filter Gain, f
C
= 1MHz,
V
S
= 5V, R
FIL
= 1.28k
(Measured with Respect to DC Gain)
CONDITIONS
Test Frequency = 300kHz (0.3 • f
C
)
Test Frequency = 750kHz (0.75 • f
C
)
Test Frequency = 1MHz (1 • f
C
)
Test Frequency = 2MHz (2 • f
C
)
Test Frequency = 4MHz (4 • f
C
)
Test Frequency = 1MHz (0.1 • f
C
)
Test Frequency = 7.5MHz (0.75 • f
C
)
Test Frequency = 10MHz (1 • f
C
)
Test Frequency = 20MHz (2 • f
C
)
Test Frequency = 40MHz (4 • f
C
)
f
C
= 1MHz, f
IN
= f
C
f
C
= 10MHz, f
IN
= f
C
f
C
= 1MHz, R
FIL
= 1.28k, BW = 2MHz
f
C
= 10MHz, R
FIL
= 128Ω, BW = 20MHz
f
C
= 1MHz, R
FIL
= 1.28k,
f
IN
= 200kHz, V
IN
= 1V
P-P
f
C
= 10MHz, R
FIL
= 128Ω,
f
IN
= 2MHz, V
IN
= 1V
P-P
q
q
q
q
q
q
q
q
q
q
MIN
–0.05
–1.45
–3.60
–13.7
–0.1
–1.5
–3.5
–14.2
–0.25
–0.30
TYP
0.05
–1.20
–3.20
–13.2
–25.0
0.02
–1.0
–3.0
–13.2
–27.5
±0.02
±0.02
18
34
– 84
– 69
MAX
0.25
–0.85
–2.80
–12.5
0.25
–0.50
–2.40
–12.2
0.25
0.30
UNITS
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
µV
RMS
µV
RMS
dB
dB
Filter Gain, f
C
= 10MHz,
V
S
= 5V, R
FIL
= 128Ω
(Measured with Respect to DC Gain)
Filter Gain Mismatch
(
V
OUTA
–
V
OUTB
)
Wideband Output Noise
THD
Total Harmonic Distortion
Specifications are for the
OUTA or OUTB of a single 2nd order section
(A or B) with respect to V
GND
= V
GNDA
= V
GNDB
, gain = 1,
R
FIL
= R11 = R21 = R31 = R12 = R22 = R32, (see Block Diagram) The
q
denotes the specifications which apply over the full
operating temperature range, otherwise specifications and typical values are at T
A
= 25°C. V
S
= single 5V, EN pin to logic “low,”
R
L
= 400Ω connected to midsupply, unless otherwise noted.
SYMBOL
ADC
V
OS(OUT)
∆V
OS(OUT)
PARAMETER
DC Gain
DC Offset Voltage
(V
OUTA
– V
GNDA
) or (V
OUTB
– V
GNDB
)
DC Offset Voltage Mismatch
(V
OUTA
– V
GNDA
) – (V
OUTB
– V
GNDB
)
Cutoff Frequency Range (Note 7)
Cutoff Frequency Temperature Coefficient
Filter Gain, f
C
= 1MHz,
V
S
= 5V, R
FIL
= 1.28k
(Measured with Respect to DC Gain)
Test Frequency = 300kHz (0.3 • f
C
)
Test Frequency = 750kHz (0.75 • f
C
)
Test Frequency = 1MHz (1 • f
C
)
Test Frequency = 2MHz (2 • f
C
)
Test Frequency = 4MHz (4 • f
C
)
V
S
= 3V, f
C
= 1MHz, R
FIL
= 1.28k
V
S
= 5V, V
S
=
±5V,
f
C
= 1MHz, R
FIL
= 1.28k
V
S
= 3V, f
C
= 1MHz, R
FIL
= 1.28k
V
S
= 5V, V
S
=
±5V,
f
C
= 1MHz, R
FIL
= 1.28k
V
S
= 3V, V
S
= 5V, V
S
=
±5V
CONDITIONS
q
q
q
q
q
MIN
0.99
–9
–10
–8
–10
0.2
TYP
1
–2
–1
±2
±2
MAX
1.01
5
10
8
10
10
UNITS
V/V
mV
mV
mV
mV
MHz
ppm/°C
dB
dB
dB
dB
dB
Transfer Function Characteristics for Each Section (A or B) to Single-Ended Output (OUTA or OUTB)
f
C
TC
q
q
q
q
q
q
±1
–0.10
–1.40
–3.50
–13.7
0.15
–1.00
–3.10
–13.0
–25.0
0.40
–0.65
–2.60
–12.5
1568f
4
LT1568
FILTER ELECTRICAL CHARACTERISTICS
Specifications are for the
OUTA or OUTB of a single 2nd order section
(A or B) with respect to V
GND
= V
GNDA
= V
GNDB
, gain = 1,
R
FIL
= R11 = R21 = R31 = R12 = R22 = R32, (see Block Diagram) The
q
denotes the specifications which apply over the full
operating temperature range, otherwise specifications and typcial values are at T
A
= 25°C. V
S
= single 5V, EN pin to logic “low,”
R
L
= 400Ω connected to midsupply, unless otherwise noted.
SYMBOL
PARAMETER
Filter Gain, f
C
= 10MHz,
V
S
= 5V, R
FIL
= 128Ω
(Measured with Respect to DC Gain)
CONDITIONS
Test Frequency = 1MHz (0.1 • f
C
)
Test Frequency = 7.5MHz (0.75 • f
C
)
Test Frequency = 10MHz (1 • f
C
)
Test Frequency = 20MHz (2 • f
C
)
Test Frequency = 40MHz (4 • f
C
)
f
C
= 1MHz, f
IN
= f
C
f
C
= 10MHz, f
IN
= f
C
f
C
= 1MHz, R
FIL
= 1.28k, BW = 2MHz
f
C
= 10MHz, R
FIL
= 128Ω, BW = 20MHz
f
C
= 1MHz, R
FIL
= 1.28k,
f
IN
= 200kHz, V
IN
= 1V
P-P
f
C
= 10MHz, R
FIL
= 128Ω,
f
IN
= 2MHz, V
IN
= 1V
P-P
q
q
q
q
q
q
MIN
–0.3
–1.2
–3.1
–12.2
–0.4
–0.5
TYP
0.15
–0.50
–2.30
–11.2
–19.1
±0.02
±0.02
22
60
– 84
– 75
MAX
0.5
0.0
–1.5
–10.2
0.4
0.5
UNITS
dB
dB
dB
dB
dB
dB
dB
µV
RMS
µV
RMS
dB
dB
Filter Gain Mismatch
(
V
OUTA
–
V
OUTB
)
Wideband Output Noise
THD
Total Harmonic Distortion
Specifications are for the
differential output (OUTA – OUTA or OUTB – OUTB) of a single 2nd order section
(A or B), gain = –2,
R
FIL
= R11 = R21 = R31 = R12 = R22 = R32. All voltages are with respect to V
GND
= V
GNDA
= V
GNDB
. The
q
denotes the specifications
which apply over the full operating temperature range, otherwise specifications and typical values are at T
A
= 25°C.
V
S
= single 5V, EN pin to logic “low,” R
LDIFF
= 800Ω connected at midsupply, unless otherwise noted.
SYMBOL
ADC
V
OS(OUT)
PARAMETER
DC Gain
DC Offset Voltage
(OUTA – OUTA) or (OUTB – OUTB)
DC Offset Voltage Mismatch
(OUTA – OUTA) – (OUTB – OUTB)
V
S
= 3V, f
C
= 1MHz, R
FIL
= 1.28k
V
S
= 5V, f
C
= 1MHz, R
FIL
= 1.28k
V
S
=
±5V,
f
C
= 1MHz, R
FIL
= 1.28k
V
S
= 3V, f
C
= 1MHz, R
FIL
= 1.28k
V
S
= 5V, f
C
= 1MHz, R
FIL
= 1.28k
V
S
=
±5V,
f
C
= 1MHz, R
FIL
= 1.28k
V
S
= 3V, V
S
= 5V, V
S
=
±5V
Test Frequency = 300kHz (0.3 • f
C
)
Test Frequency = 750kHz (0.75 • f
C
)
Test Frequency = 1MHz (1 • f
C
)
Test Frequency = 2MHz (2 • f
C
)
Test Frequency = 4MHz (4 • f
C
)
Test Frequency = 1MHz (0.1 • f
C
)
Test Frequency = 7.5MHz (0.75 • f
C
)
Test Frequency = 10MHz (1 • f
C
)
Test Frequency = 20MHz (2 • f
C
)
Test Frequency = 40MHz (4 • f
C
)
CONDITIONS
q
q
q
q
q
q
q
MIN
–4
–12
–20
–8
–12
–15
0.2
TYP
–2
6
2
–5
2
–2
2
MAX
16
15
10
8
12
15
10
UNITS
V/V
mV
mV
mV
mV
mV
mV
MHz
ppm/°C
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
∆V
OS(OUT)
Transfer Function Characteristics for Each Section (A or B) to Differential Output (OUTA – OUTA or OUTB – OUTB)
f
C
TC
Cutoff Frequency Range (Note 7)
Cutoff Frequency Temperature Coefficient
Filter Gain, f
C
= 1MHz,
V
S
= 5V, R
FIL
= 1.28k (Note 8)
(Measured with Respect to DC Gain)
q
q
q
q
q
q
q
q
q
q
±1
–0.05
–1.40
–3.60
–13.7
–0.20
–1.30
–3.30
–13.1
0.10
–1.10
–3.20
–13.1
–25.0
0.1
–0.8
–2.6
–12.1
–24.3
0.25
–0.80
–2.70
–12.5
0.30
–0.20
–1.90
–11.1
Filter Gain, f
C
= 10MHz,
V
S
= 5V, R
FL
= 128Ω (Note 8)
(Measured with Respect to DC Gain)
1568f
5
FPGA/CPLD
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